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AgeCommit message (Expand)Author
2025-12-03x86/vsyscall: Do not require X86_PF_INSTR to emulate vsyscallKirill A. Shutemov
2025-12-03x86/resctrl: Fix miscount of bandwidth event when reactivating previously una...Babu Moger
2025-12-03x86/bugs: Fix reporting of LFENCE retpolineDavid Kaplan
2025-10-29KVM: x86: Don't (re)check L1 intercepts when completing userspace I/OSean Christopherson
2025-10-29x86/umip: Fix decoding of register forms of 0F 01 (SGDT and SIDT aliases)Sean Christopherson
2025-10-29x86/umip: Check that the instruction opcode is at least two bytesSean Christopherson
2025-10-29x86/vdso: Fix output operand size of RDPIDUros Bizjak
2025-10-02KVM: SVM: Sync TPR from LAPIC into VMCB::V_TPR even if AVIC is activeMaciej S. Szmigiero
2025-09-09KVM: x86: Take irqfds.lock when adding/deleting IRQ bypass producerSean Christopherson
2025-09-04KVM: x86: use array_index_nospec with indices that come from guestThijs Raymakers
2025-08-28x86/fpu: Delay instruction pointer fixup until after warningDave Hansen
2025-08-28x86/mce/amd: Add default names for MCA banks and blocksYazen Ghannam
2025-07-17x86/mm: Disable hugetlb page table sharing on 32-bitJann Horn
2025-07-17x86/mce: Make sure CMCI banks are cleared during shutdown on IntelJP Kobryn
2025-07-17x86/mce: Don't remove sysfs if thresholding sysfs init failsYazen Ghannam
2025-07-17x86/mce/amd: Fix threshold limit resetYazen Ghannam
2025-06-27Revert "x86/bugs: Make spectre user default depend on MITIGATION_SPECTRE_V2" ...Breno Leitao
2025-06-27x86/boot/compressed: prefer cc-option for CFLAGS additionsNick Desaulniers
2025-06-27x86/mtrr: Check if fixed-range MTRRs exist in mtrr_save_fixed_ranges()Jiaqing Zhao
2025-06-27x86/cpu: Sanitize CPUID(0x80000000) outputAhmed S. Darwish
2025-06-04x86/nmi: Add an emergency handler in nmi_desc & use it in nmi_shootdown_cpus()Waiman Long
2025-06-04x86/bugs: Make spectre user default depend on MITIGATION_SPECTRE_V2Breno Leitao
2025-06-04um: Store full CSGSFS and SS register from mcontextBenjamin Berg
2025-05-02x86/bugs: Don't fill RSB on VMEXIT with eIBRS+retpolineJosh Poimboeuf
2025-05-02perf/x86/intel/uncore: Fix the scale of IIO free running counters on SNRKan Liang
2025-05-02perf/x86/intel: Allow to update user space GPRs from PEBS recordsDapeng Mi
2025-05-02x86/e820: Fix handling of subpage regions when calculating nosave ranges in e...Myrrh Periwinkle
2025-05-02x86/cpu: Don't clear X86_FEATURE_LAHF_LM flag in init_amd_k8() on AMD when ru...Max Grobecker
2025-04-10x86/mm: Fix flush_tlb_range() when used for zapping normal PMDsJann Horn
2025-04-10x86/tsc: Always save/restore TSC sched_clock() on suspend/resumeGuilherme G. Piccoli
2025-04-10x86/dumpstack: Fix inaccurate unwinding from exception stacks due to misplace...Jann Horn
2025-04-10x86/entry: Fix ORC unwinder for PUSH_REGS with save_ret=1Jann Horn
2025-04-10x86/platform: Only allow CONFIG_EISA for 32-bitArnd Bergmann
2025-04-10x86/fpu: Avoid copying dynamic FP state from init_task in arch_dup_task_struct()Benjamin Berg
2025-04-10x86/mm/pat: cpa-test: fix length for CPA_ARRAY testMike Rapoport (Microsoft)
2025-04-10x86/microcode/AMD: Fix out-of-bounds on systems with CPU-less NUMA nodesFlorent Revest
2025-04-10x86/irq: Define trace events conditionallyArnd Bergmann
2025-04-10clockevents/drivers/i8253: Fix stop sequence for timer 0David Woodhouse
2025-03-13x86/cpu: Properly parse CPUID leaf 0x2 TLB descriptor 0x63Ahmed S. Darwish
2025-03-13x86/cpu: Validate CPUID leaf 0x2 EDX outputAhmed S. Darwish
2025-03-13x86/cacheinfo: Validate CPUID leaf 0x2 EDX outputAhmed S. Darwish
2025-03-13x86/CPU: Fix warm boot hang regression on AMD SC1100 SoC systemsRussell Senior
2025-03-13x86/i8253: Disable PIT timer 0 when not in useDavid Woodhouse
2025-03-13Grab mm lock before grabbing pt lockMaksym Planeta
2025-03-13x86/xen: allow larger contiguous memory regions in PV guestsJuergen Gross
2025-03-13xen: remove a confusing comment on auto-translated guest I/OPetr Tesarik
2025-03-13x86/mm: Don't disable PCID when INVLPG has been fixed by microcodeXi Ruoyao
2025-03-13x86/amd_nb: Restrict init function to AMD-based systemsYazen Ghannam
2024-12-14perf/x86/intel/pt: Fix buffer full but size is 0 caseAdrian Hunter
2024-12-14crypto: x86/aegis128 - access 32-bit arguments as 32-bitEric Biggers