| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-04-16 | riscv,entry: fix misaligned base for excp_vect_table | Zihao Yu |
| 2019-10-11 | riscv: Avoid interrupts being erroneously enabled in handle_exception() | Vincent Chen |
| 2018-08-13 | RISC-V: implement low-level interrupt handling | Christoph Hellwig |
| 2018-03-14 | RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler | Palmer Dabbelt |
| 2018-02-20 | RISC-V: Enable IRQ during exception handling | zongbox@gmail.com |
| 2018-01-30 | riscv: disable SUM in the exception handler | Christoph Hellwig |
| 2018-01-07 | riscv: rename SR_* constants to match the spec | Christoph Hellwig |
| 2017-09-26 | RISC-V: Task implementation | Palmer Dabbelt |
 |
index : kernel.git | |
| Hosts the 0x221E linux distro kernel. |
| summaryrefslogtreecommitdiff |