diff options
| author | George Moussalem | 2025-06-30 16:35:00 +0400 |
|---|---|---|
| committer | Bjorn Andersson | 2025-07-16 23:09:46 -0500 |
| commit | f6a4a55ae5d99f865e106916a9295548e381de47 (patch) | |
| tree | 56821cf897689bde00087f7e6c600d23f6b7282b | |
| parent | 9723807046601f6596fa71515a3bc81f202cde5c (diff) | |
clk: qcom: gcc-ipq5018: fix GE PHY reset
The MISC reset is supposed to trigger a resets across the MDC, DSP, and
RX & TX clocks of the IPQ5018 internal GE PHY. So let's set the bitmask
of the reset definition accordingly in the GCC as per the downstream
driver.
Link: https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/00743c3e82fa87cba4460e7a2ba32f473a9ce932
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://lore.kernel.org/r/20250630-ipq5018-ge-phy-v6-1-01be06378c15@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | drivers/clk/qcom/gcc-ipq5018.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c index 24eb4c40da63..dcda2be8c1a5 100644 --- a/drivers/clk/qcom/gcc-ipq5018.c +++ b/drivers/clk/qcom/gcc-ipq5018.c @@ -3660,7 +3660,7 @@ static const struct qcom_reset_map gcc_ipq5018_resets[] = { [GCC_WCSS_AXI_S_ARES] = { 0x59008, 6 }, [GCC_WCSS_Q6_BCR] = { 0x18004, 0 }, [GCC_WCSSAON_RESET] = { 0x59010, 0}, - [GCC_GEPHY_MISC_ARES] = { 0x56004, 0 }, + [GCC_GEPHY_MISC_ARES] = { 0x56004, .bitmask = GENMASK(3, 0) }, }; static const struct of_device_id gcc_ipq5018_match_table[] = { |