diff options
| author | Neil Armstrong | 2025-01-15 14:44:01 +0100 |
|---|---|---|
| committer | Bjorn Andersson | 2025-02-25 21:54:23 -0600 |
| commit | 2c885d85dff832d9be99093bdae73e77795f0aec (patch) | |
| tree | 3326ef626a7fc6351d33d75e86090d79e284bd7a | |
| parent | 5cddecc3d1dce1e20bb64364cb6cd5d8edf376b3 (diff) | |
arm64: dts: qcom: sm8650: add QUP serial engines OPP tables
The QUP Serial Engines requires different power domain level
depending on their working frequency, add the required OPP
table with the level associated with all possible frequencies.
For the "I2C Hub" serial engines, sinse they only support a
single Operating Point, only add a single power domain level
property.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250115-topic-sm8x50-upstream-dt-icc-update-v1-9-eaa8b10e2af7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8650.dtsi | 216 |
1 files changed, 216 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index e6938d04c40b..38c433e79fac 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -493,6 +493,62 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + qup_opp_table_100mhz: opp-table-qup100mhz { + compatible = "operating-points-v2"; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + }; + + qup_opp_table_120mhz: opp-table-qup120mhz { + compatible = "operating-points-v2"; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-120000000 { + opp-hz = /bits/ 64 <120000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + }; + + qup_opp_table_128mhz: opp-table-qup128mhz { + compatible = "operating-points-v2"; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-128000000 { + opp-hz = /bits/ 64 <128000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + }; + + qup_opp_table_240mhz: opp-table-qup240mhz { + compatible = "operating-points-v2"; + + opp-150000000 { + opp-hz = /bits/ 64 <150000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-240000000 { + opp-hz = /bits/ 64 <240000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + }; + memory@a0000000 { device_type = "memory"; /* We expect the bootloader to fill in the size */ @@ -1822,6 +1878,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>, <&gpi_dma2 1 0 QCOM_GPI_I2C>; dma-names = "tx", @@ -1855,6 +1915,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>, <&gpi_dma2 1 0 QCOM_GPI_SPI>; dma-names = "tx", @@ -1888,6 +1952,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>, <&gpi_dma2 1 1 QCOM_GPI_I2C>; dma-names = "tx", @@ -1921,6 +1989,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>, <&gpi_dma2 1 1 QCOM_GPI_SPI>; dma-names = "tx", @@ -1954,6 +2026,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>, <&gpi_dma2 1 2 QCOM_GPI_I2C>; dma-names = "tx", @@ -1987,6 +2063,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>, <&gpi_dma2 1 2 QCOM_GPI_SPI>; dma-names = "tx", @@ -2020,6 +2100,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>, <&gpi_dma2 1 3 QCOM_GPI_I2C>; dma-names = "tx", @@ -2053,6 +2137,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>, <&gpi_dma2 1 3 QCOM_GPI_SPI>; dma-names = "tx", @@ -2086,6 +2174,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>, <&gpi_dma2 1 4 QCOM_GPI_I2C>; dma-names = "tx", @@ -2119,6 +2211,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>, <&gpi_dma2 1 4 QCOM_GPI_SPI>; dma-names = "tx", @@ -2152,6 +2248,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, <&gpi_dma2 1 5 QCOM_GPI_I2C>; dma-names = "tx", @@ -2185,6 +2285,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>, <&gpi_dma2 1 5 QCOM_GPI_SPI>; dma-names = "tx", @@ -2215,6 +2319,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_128mhz>; + pinctrl-0 = <&qup_uart14_default>, <&qup_uart14_cts_rts>; pinctrl-names = "default"; @@ -2237,6 +2345,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + pinctrl-0 = <&qup_uart15_default>; pinctrl-names = "default"; @@ -2275,6 +2387,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c0_data_clk>; pinctrl-names = "default"; @@ -2302,6 +2418,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c1_data_clk>; pinctrl-names = "default"; @@ -2329,6 +2449,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c2_data_clk>; pinctrl-names = "default"; @@ -2356,6 +2480,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c3_data_clk>; pinctrl-names = "default"; @@ -2383,6 +2511,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c4_data_clk>; pinctrl-names = "default"; @@ -2410,6 +2542,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c5_data_clk>; pinctrl-names = "default"; @@ -2437,6 +2573,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c6_data_clk>; pinctrl-names = "default"; @@ -2464,6 +2604,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c7_data_clk>; pinctrl-names = "default"; @@ -2491,6 +2635,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c8_data_clk>; pinctrl-names = "default"; @@ -2518,6 +2666,10 @@ interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd RPMHPD_CX>; + + required-opps = <&rpmhpd_opp_low_svs>; + pinctrl-0 = <&hub_i2c9_data_clk>; pinctrl-names = "default"; @@ -2597,6 +2749,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, <&gpi_dma1 1 0 QCOM_GPI_I2C>; dma-names = "tx", @@ -2630,6 +2786,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>, <&gpi_dma1 1 0 QCOM_GPI_SPI>; dma-names = "tx", @@ -2663,6 +2823,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, <&gpi_dma1 1 1 QCOM_GPI_I2C>; dma-names = "tx", @@ -2696,6 +2860,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>, <&gpi_dma1 1 1 QCOM_GPI_SPI>; dma-names = "tx", @@ -2729,6 +2897,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_240mhz>; + dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, <&gpi_dma1 1 2 QCOM_GPI_I2C>; dma-names = "tx", @@ -2762,6 +2934,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_240mhz>; + dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>, <&gpi_dma1 1 2 QCOM_GPI_SPI>; dma-names = "tx", @@ -2795,6 +2971,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, <&gpi_dma1 1 3 QCOM_GPI_I2C>; dma-names = "tx", @@ -2828,6 +3008,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>, <&gpi_dma1 1 3 QCOM_GPI_SPI>; dma-names = "tx", @@ -2861,6 +3045,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, <&gpi_dma1 1 4 QCOM_GPI_I2C>; dma-names = "tx", @@ -2894,6 +3082,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>, <&gpi_dma1 1 4 QCOM_GPI_SPI>; dma-names = "tx", @@ -2927,6 +3119,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, <&gpi_dma1 1 5 QCOM_GPI_I2C>; dma-names = "tx", @@ -2960,6 +3156,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>, <&gpi_dma1 1 5 QCOM_GPI_SPI>; dma-names = "tx", @@ -2993,6 +3193,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>, <&gpi_dma1 1 6 QCOM_GPI_I2C>; dma-names = "tx", @@ -3026,6 +3230,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_120mhz>; + dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>, <&gpi_dma1 1 6 QCOM_GPI_SPI>; dma-names = "tx", @@ -3059,6 +3267,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>, <&gpi_dma1 1 7 QCOM_GPI_I2C>; dma-names = "tx", @@ -3092,6 +3304,10 @@ "qup-config", "qup-memory"; + power-domains = <&rpmhpd RPMHPD_CX>; + + operating-points-v2 = <&qup_opp_table_100mhz>; + dmas = <&gpi_dma1 0 7 QCOM_GPI_SPI>, <&gpi_dma1 1 7 QCOM_GPI_SPI>; dma-names = "tx", |
