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2025-10-23wifi: ath11k: fix VHT MCS assignmentBaochen Qiang
While associating, firmware needs to know peer's receive capability to calculate its own VHT transmit MCS, currently host sends this information to firmware via mcs->rx_mcs_set field, this is wrong as firmware actually takes it from mcs->tx_mcs_set field. Till now there is no failure seen due to this, most likely because almost all peers are advertising the same capability for both transmit and receive. Swap the assignment to fix it. Besides, rate control mask is meant to limit our own transmit MCS, hence need to go via mcs->tx_mcs_set field. With the aforementioned swapping done, change is needed as well to apply it to the peer's receive capability rather than transmit capability. Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.41 Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00199-QCAHKSWPL_SILICONZ-1 Fixes: d5c65159f289 ("ath11k: driver for Qualcomm IEEE 802.11ax devices") Signed-off-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com> Link: https://patch.msgid.link/20251017-ath11k-mcs-assignment-v1-1-da40825c1783@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-10-23ovpn: use datagram_poll_queue for socket readiness in TCPRalf Lici
openvpn TCP encapsulation uses a custom queue to deliver packets to userspace. Currently it relies on datagram_poll, which checks sk_receive_queue, leading to false readiness signals when that queue contains non-userspace packets. Switch ovpn_tcp_poll to use datagram_poll_queue with the peer's user_queue, ensuring poll only signals readiness when userspace data is actually available. Also refactor ovpn_tcp_poll in order to enforce the assumption we can make on the lifetime of ovpn_sock and peer. Fixes: 11851cbd60ea ("ovpn: implement TCP transport") Signed-off-by: Antonio Quartulli <antonio@openvpn.net> Signed-off-by: Ralf Lici <ralf@mandelbit.com> Reviewed-by: Sabrina Dubroca <sd@queasysnail.net> Link: https://patch.msgid.link/20251021100942.195010-4-ralf@mandelbit.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-10-23memory: tegra210: Fix incorrect client idsAaron Kling
The original commit had typos for two of the memory client ids. Fix them to reference the correct bindings. Fixes: 3804cef4c597 ("memory: tegra210: Use bindings for client ids") Signed-off-by: Aaron Kling <webgeek1234@gmail.com> Link: https://patch.msgid.link/20251021-t210-mem-clientid-fixup-v1-1-5094946faa31@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-10-23memory: renesas-rpc-if: Add suspend/resume supportBiju Das
On RZ/G3E using PSCI, s2ram powers down the SoC. Add suspend/resume callbacks to control spi/spix2 clocks. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20251019180940.157088-1-biju.das.jz@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-10-23leds: leds-lp50xx: Allow LED 0 to be added to module bankChristian Hitz
led_banks contains LED module number(s) that should be grouped into the module bank. led_banks is 0-initialized. By checking the led_banks entries for 0, un-set entries are detected. But a 0-entry also indicates that LED module 0 should be grouped into the module bank. By only iterating over the available entries no check for unused entries is required and LED module 0 can be added to bank. Cc: stable@vger.kernel.org Fixes: 242b81170fb8 ("leds: lp50xx: Add the LP50XX family of the RGB LED driver") Signed-off-by: Christian Hitz <christian.hitz@bbv.ch> Reviewed-by: Jacek Anaszewski <jacek.anaszewski@gmail.com> Link: https://patch.msgid.link/20251008123222.1117331-1-christian@klarinett.li Signed-off-by: Lee Jones <lee@kernel.org>
2025-10-23spi: spi-qpic-snand: make qcom_spi_ecc_engine_ops_pipelined constCan Peng
Marking the qcom_spi_ecc_engine_ops_pipelined as const provides memory protection by preventing accidental modification of critical function pointers at runtime. It also enables memory optimization by placing the structure in read-only sections and improves code safety by explicitly documenting the design intent that these operations should not change after initialization. Signed-off-by: Can Peng <pengcan@kylinos.cn> Link: https://patch.msgid.link/20251023024250.3181084-1-pengcan@kylinos.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2025-10-23pinctrl: realtek: Select REGMAP_MMIO for RTD driverYu-Chun Lin
The pinctrl-rtd driver uses 'devm_regmap_init_mmio', which requires 'REGMAP_MMIO' to be enabled. Without this selection, the build fails with an undefined reference: aarch64-none-linux-gnu-ld: drivers/pinctrl/realtek/pinctrl-rtd.o: in function rtd_pinctrl_probe': pinctrl-rtd.c:(.text+0x5a0): undefined reference to __devm_regmap_init_mmio_clk' Fix this by selecting 'REGMAP_MMIO' in the Kconfig. Fixes: e99ce78030db ("pinctrl: realtek: Add common pinctrl driver for Realtek DHC RTD SoCs") Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-10-23regulator: rpmh-regulator: Add RPMH regulator support for PMR735DJishnu Prakash
Add support for PMR735D PMIC voltage regulators which are present on Kaanapali boards. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251023-pmr735d_regulator-v2-2-452e1b28cd38@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-10-23gpio: ljca: Fix duplicated IRQ mappingHaotian Zhang
The generic_handle_domain_irq() function resolves the hardware IRQ internally. The driver performed a duplicative mapping by calling irq_find_mapping() first, which could lead to an RCU stall. Delete the redundant irq_find_mapping() call and pass the hardware IRQ directly to generic_handle_domain_irq(). Fixes: c5a4b6fd31e8 ("gpio: Add support for Intel LJCA USB GPIO driver") Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn> Link: https://lore.kernel.org/r/20251023070231.1305-1-vulab@iscas.ac.cn [Bartosz: remove unused variable] Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-10-23ata: pata_it821x: Replace deprecated strcpy with strscpy in it821x_display_diskThorsten Blum
strcpy() is deprecated; use strscpy() instead. Replace the hard-coded buffer size 8 with sizeof(mbuf) when using snprintf() while we're at it. Link: https://github.com/KSPP/linux/issues/88 Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Niklas Cassel <cassel@kernel.org>
2025-10-23USB: serial: option: add Telit FN920C04 ECM compositionsLI Qingwu
Add support for the Telit Cinterion FN920C04 module when operating in ECM (Ethernet Control Model) mode. The following USB product IDs are used by the module when AT#USBCFG is set to 3 or 7. 0x10A3: ECM + tty (NMEA) + tty (DUN) [+ tty (DIAG)] T: Bus=01 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#= 3 Spd=480 MxCh= 0 D: Ver= 2.00 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=64 #Cfgs= 1 P: Vendor=1bc7 ProdID=10a3 Rev= 5.15 S: Manufacturer=Telit Cinterion S: Product=FN920 S: SerialNumber=76e7cb38 C:* #Ifs= 5 Cfg#= 1 Atr=e0 MxPwr=500mA I:* If#= 0 Alt= 0 #EPs= 1 Cls=02(comm.) Sub=06 Prot=00 Driver=cdc_ether E: Ad=82(I) Atr=03(Int.) MxPS= 16 Ivl=32ms I: If#= 1 Alt= 0 #EPs= 0 Cls=0a(data ) Sub=00 Prot=00 Driver=cdc_ether I:* If#= 1 Alt= 1 #EPs= 2 Cls=0a(data ) Sub=00 Prot=00 Driver=cdc_ether E: Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=60 Driver=option E: Ad=84(I) Atr=03(Int.) MxPS= 10 Ivl=32ms E: Ad=83(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 3 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=40 Driver=option E: Ad=86(I) Atr=03(Int.) MxPS= 10 Ivl=32ms E: Ad=85(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=03(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 4 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=30 Driver=option E: Ad=04(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=87(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms 0x10A8: ECM + tty (DUN) + tty (AUX) [+ tty (DIAG)] T: Bus=03 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#= 3 Spd=480 MxCh= 0 D: Ver= 2.00 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=64 #Cfgs= 1 P: Vendor=1bc7 ProdID=10a8 Rev= 5.15 S: Manufacturer=Telit Cinterion S: Product=FN920 S: SerialNumber=76e7cb38 C:* #Ifs= 5 Cfg#= 1 Atr=e0 MxPwr=500mA I:* If#= 0 Alt= 0 #EPs= 1 Cls=02(comm.) Sub=06 Prot=00 Driver=cdc_ether E: Ad=82(I) Atr=03(Int.) MxPS= 16 Ivl=32ms I: If#= 1 Alt= 0 #EPs= 0 Cls=0a(data ) Sub=00 Prot=00 Driver=cdc_ether I:* If#= 1 Alt= 1 #EPs= 2 Cls=0a(data ) Sub=00 Prot=00 Driver=cdc_ether E: Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=40 Driver=option E: Ad=84(I) Atr=03(Int.) MxPS= 10 Ivl=32ms E: Ad=83(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 3 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=40 Driver=option E: Ad=86(I) Atr=03(Int.) MxPS= 10 Ivl=32ms E: Ad=85(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=03(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 4 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=30 Driver=option E: Ad=04(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=87(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms Adding these IDs allows the option driver to automatically create the corresponding /dev/ttyUSB* ports under ECM mode. Tested with FN920C04 under ECM configuration (USBCFG=3 and 7). Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn> Cc: stable@vger.kernel.org Signed-off-by: Johan Hovold <johan@kernel.org>
2025-10-23gpio: regmap: Bypass cache for aliased inputsSander Vanheule
GPIO chips often have data input and output registers aliased to the same offset. The output register is non-valitile and could in theory be cached. The input register however is volatile by nature and hence should not be cached, resulting in different requirements for reads and writes. The generic gpio chip implementation stores a shadow value of the pin output data, which is updated and written to hardware on output data changes in bgpio_set(), bgpio_set_set(). Pin input values are always obtained by reading the aliased data register from hardware. For gpio-regmap the situation is more complex as the output data could be in multiple registers, but we can use the regmap cache to shadow the output values when marking the data registers as non-volatile. By using regmap_read_bypassed() we can still treat the input values as volatile, irrespective of the regmap config. This ensures proper functioning of writing the output register with regmap_write_bits(), which will then use and update the cache only on data writes, gaining some performance from the cached output values. Signed-off-by: Sander Vanheule <sander@svanheule.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20251021142407.307753-3-sander@svanheule.net Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-10-23gpio: regmap: Force writes for aliased data regsSander Vanheule
GPIO chips often have data input and output fields aliased to the same offset. Since gpio-regmap performs a value update before the direction update (to prevent glitches), a pin currently configured as input may cause regmap_update_bits() to not perform a write. This may cause unexpected line states when the current input state equals the requested output state: OUT IN OUT DIR ''''''\...|.../'''''' pin ....../'''|'''\...... (1) (2) (3) 1. Line was configurad as out-low, but is reconfigured to input. External logic results in high value. 2. Set output value high. regmap_update_bits() sees the value is already high and discards the register write. 3. Line is switched to output, maintaining the stale output config (low) instead of the requested config (high). By switching to regmap_write_bits(), a write of the requested output value can be forced, irrespective of the read state. Do this only for aliased registers, so the more efficient regmap_update_bits() can still be used for distinct registers. Signed-off-by: Sander Vanheule <sander@svanheule.net> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20251021142407.307753-2-sander@svanheule.net Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-10-23Merge branch 'acpi-property'Rafael J. Wysocki
Merge an ACPI device properties handling change fixing the order of __acpi_node_get_property_reference() arguments broken by a recent update (Sunil V L) * 'acpi-property': ACPI: property: Fix argument order in __acpi_node_get_property_reference()
2025-10-23Merge branches 'pm-cpuidle' and 'pm-cpufreq'Rafael J. Wysocki
Merge cpuidle and cpufreq fixes for 6.18-rc3: - Revert a cpuidle menu governor change that introduced a serious performance regression on Chromebooks with Intel Jasper Lake processors (Rafael Wysocki) - Fix an amd-pstate driver regression leading to EPP=0 after hibernation (Mario Limonciello) * pm-cpuidle: Revert "cpuidle: menu: Avoid discarding useful information" * pm-cpufreq: cpufreq/amd-pstate: Fix a regression leading to EPP 0 after hibernate
2025-10-23net: phy: micrel: Add support for non PTP SKUs for lan8814Horatiu Vultur
The lan8814 has 4 different SKUs and for 2 of these SKUs the PTP is disabled. All these SKUs have the same value in the register 2 and 3. Meaning that we can't differentiate them based on device id, therefore check the SKU register and based on this allow or not to create a PTP device. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20251021070726.3690685-1-horatiu.vultur@microchip.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-10-23net: bonding: fix possible peer notify event loss or dup issueTonghao Zhang
If the send_peer_notif counter and the peer event notify are not synchronized. It may cause problems such as the loss or dup of peer notify event. Before this patch: - If should_notify_peers is true and the lock for send_peer_notif-- fails, peer event may be sent again in next mii_monitor loop, because should_notify_peers is still true. - If should_notify_peers is true and the lock for send_peer_notif-- succeeded, but the lock for peer event fails, the peer event will be lost. This patch locks the RTNL for send_peer_notif, events, and commit simultaneously. Fixes: 07a4ddec3ce9 ("bonding: add an option to specify a delay between peer notifications") Cc: Jay Vosburgh <jv@jvosburgh.net> Cc: Andrew Lunn <andrew+netdev@lunn.ch> Cc: Eric Dumazet <edumazet@google.com> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Paolo Abeni <pabeni@redhat.com> Cc: Hangbin Liu <liuhangbin@gmail.com> Cc: Nikolay Aleksandrov <razor@blackwall.org> Cc: Vincent Bernat <vincent@bernat.ch> Cc: <stable@vger.kernel.org> Signed-off-by: Tonghao Zhang <tonghao@bamaicloud.com> Acked-by: Jay Vosburgh <jv@jvosburgh.net> Link: https://patch.msgid.link/20251021050933.46412-1-tonghao@bamaicloud.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-10-23accel/ivpu: Add support for Nova Lake's NPUMaciej Falkowski
Add support for NPU6 generation that will be present on Nova Lake CPUs. As with previous generations, it maintains compatibility so no bigger functional changes apart from removing deprecated call to soc_cpu_drive() function. Quiescing TOP_MMIO in SOC_CPU_NOC as part of boot procedure is no longer needed starting from 60XX. Remove soc_cpu_drive() call from NPU6 onward. The VPU_CPU_NOC_QREQN, VPU_CPU_NOC_QACCEPTN, and VPU_CPU_NOC_QDENY registers are deprecated and non-functional on 60XX. They will be removed in future generations. Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com> Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Signed-off-by: Maciej Falkowski <maciej.falkowski@linux.intel.com> Link: https://lore.kernel.org/r/20251022105348.2237273-1-maciej.falkowski@linux.intel.com
2025-10-23drm/xe/cri: Add CRI platform definitionBalasubramani Vivekanandan
Add platform definition and PCI IDs for Crescent Island. Other platforms use INTEL_VGA_DEVICE since they have a PCI_BASE_CLASS_DISPLAY class. This is not the case for CRI, so just match on devid, which should be sufficient. Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Reviewed-by: Shekhar Chauhan <shekhar.chauhan@intel.com> Link: https://lore.kernel.org/r/20251021-cri-v1-1-bf11e61d9f49@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-10-23drm/xe/migrate: skip bounce buffer path on xe2Matthew Auld
Now that we support MEM_COPY we should be able to use the PAGE_COPY mode, otherwise falling back to BYTE_COPY mode when we have odd sizing/alignment. v2: - Use info.has_mem_copy_instr - Rebase on latest changes. v3 (Matt Brost): - Allow various pitches including 1byte pitch for MEM_COPY Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20251022163836.191405-8-matthew.auld@intel.com
2025-10-23drm/xe/migrate: support MEM_COPY instructionMatthew Auld
Make this the default on xe2+ when doing a copy. This has a few advantages over the exiting copy instruction: 1) It has a special PAGE_COPY mode that claims to be optimised for page-in/page-out, which is the vast majority of current users. 2) It also has a simple BYTE_COPY mode that supports byte granularity copying without any restrictions. With 2) we can now easily skip the bounce buffer flow when copying buffers with strange sizing/alignment, like for memory_access. But that is left for the next patch. v2 (Matt Brost): - Use device info to check whether device should use the MEM_COPY path. This should fit better with making this a configfs tunable. - And with that also keep old path still functional on xe2 for possible experimentation. - Add a define for PAGE_COPY page-size. v3 (Matt Brost): - Fallback to an actual linear copy for pitch=1. - Also update NVL. BSpec: 57561 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20251022163836.191405-7-matthew.auld@intel.com
2025-10-23drm/xe/migrate: trim batch buffer sizingMatthew Auld
We have an extra two dwords, but it looks like we should only need one for the extra bb_end. Likely this is just leftover from back when the arb handling was moved into the ring programming. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20251022163836.191405-6-matthew.auld@intel.com
2025-10-23drm/xe/migrate: fix batch buffer sizingMatthew Auld
In xe_migrate_vram() the copy can straddle page boundaries, so the len might look like a single page, but actually accounting for the offset within the page we will need to emit more than one PTE. Otherwise in some cases the batch buffer will be undersized leading to warnings later. We already have npages so use that instead. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20251022163836.191405-5-matthew.auld@intel.com
2025-10-23drm/xe/migrate: fix chunk handling for 2M page emitMatthew Auld
On systems with PAGE_SIZE > 4K the chunk will likely be rounded down to zero, if say we have single 2M page, so one huge pte, since we also try to align the chunk to PAGE_SIZE / XE_PAGE_SIZE, which will be 16 on 64K systems. Make the ALIGN_DOWN conditional for 4K PTEs where we can encounter gpu_page_size < PAGE_SIZE. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20251022163836.191405-4-matthew.auld@intel.com
2025-10-23drm/xe/migrate: rework size restrictions for sram pte emitMatthew Auld
We allow the input size to not be aligned to PAGE_SIZE, which leads to various bugs in build_pt_update_batch_sram() for PAGE_SIZE > 4K systems. For example if ptes is exactly one gpu_page_size then the chunk size is rounded down to zero. The simplest fix looks to be forcing PAGE_SIZE aligned inputs. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20251022163836.191405-3-matthew.auld@intel.com
2025-10-23drm/xe/migrate: fix offset and len checkMatthew Auld
Restriction here is pitch of 4bytes to match pixel width (32b), and hw restriction where src and dst must be aligned to 64bytes. If any of that is not possible then we need a bounce buffer. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20251022163836.191405-2-matthew.auld@intel.com
2025-10-23net: ti: icssg-prueth: Omit a variable reassignment in prueth_netdev_init()Markus Elfring
An error code was assigned to a variable and checked accordingly. This value was passed to a dev_err_probe() call in an if branch. This function is documented in the way that the same value is returned. Thus delete two redundant variable reassignments. The source code was transformed by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Link: https://patch.msgid.link/71f7daa3-d4f4-4753-aae8-67040fc8297d@web.de Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-10-23drm/xe/compat: drop include xe_device.h from i915_drv.hJani Nikula
xe_device.h and xe_device_has_flat_ccs() are no longer needed since commit 3a5c5c472c0e ("drm/i915/display: add HAS_AUX_CCS() feature check"). Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20251022121450.452649-2-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-23drm/i915/display: drop a few unnecessary i915_drv.h includesJani Nikula
We've stopped using struct drm_i915_private in intel_fb.c and skl_universal_plane.c, so we can drop the i915_drv.h includes. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20251022121450.452649-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-23usb: typec: ps883x: Fix missing mutex_unlock()Konrad Dybcio
There's a missing mutex_unlock() in the error-return path inside ps883x_sw_set(). Simply delete that return since there's another one 3 lines below. Fixes: f83cb615cb7a ("usb: typec: ps883x: Cache register settings, not Type-C mode") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202510231023.aJ09O6pk-lkp@intel.com/ Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20251023-topic-ps883x_fixup-v1-1-2afb5b85f09b@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-10-23drm/sysfb: Use new CRTC state in begin_fb_accessThomas Zimmermann
Retrieve the CRTC's new state with drm_atomic_get_new_crtc_state() in drm_sysfb_plane_helper_begin_fb_access(). The blit function might be incorrect otherwise. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Fixes: cb71de092553 ("drm/sysfb: Lookup blit function during atomic check") Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Closes: https://lore.kernel.org/dri-devel/aPJrs7_u8KcalNsC@intel.com/ Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Javier Martinez Canillas <javierm@redhat.com> Cc: dri-devel@lists.freedesktop.org Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://lore.kernel.org/r/20251020125227.41308-1-tzimmermann@suse.de
2025-10-23Merge tag 'intel-gpio-v6.18-1' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-current intel-gpio fixes for v6.18-1 * Make set debounce errors non-fatal in GPIO ACPI case * Use human readable error when printing a message in GPIO ACPI code
2025-10-23gpio: bt8xx: use generic power managementVaibhav Gupta
Switch to the generic PCI power management framework and remove legacy callbacks like .suspend() and .resume(). With the generic framework, the standard PCI related work like: - pci_save/restore_state() - pci_enable/disable_device() - pci_set_power_state() is handled by the PCI core and this driver should implement only gpio-bt8xx specific operations in its respective callback functions. Signed-off-by: Vaibhav Gupta <vaibhavgupta40@gmail.com> Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20251016163618.1355923-1-vaibhavgupta40@gmail.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-10-23mtd: rawnand: cadence: fix DMA device NULL pointer dereferenceNiravkumar L Rabara
The DMA device pointer `dma_dev` was being dereferenced before ensuring that `cdns_ctrl->dmac` is properly initialized. Move the assignment of `dma_dev` after successfully acquiring the DMA channel to ensure the pointer is valid before use. Fixes: d76d22b5096c ("mtd: rawnand: cadence: use dma_map_resource for sdma address") Cc: stable@vger.kernel.org Signed-off-by: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-10-23gpiolib: acpi: Use %pe when passing an error pointer to dev_err()Andy Shevchenko
One of the coccinelle recipe suggests to use %pe when we deal with an error pointer. Do it so. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Julia Lawall <julia.lawall@inria.fr> Closes: https://lore.kernel.org/r/202510231350.calxvXIm-lkp@intel.com/ Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-10-23cpufreq: tegra186: add OPP support and set bandwidthAaron Kling
Add support to use OPP table from DT in Tegra186 cpufreq driver. Tegra SoC's receive the frequency lookup table (LUT) from BPMP-FW. Cross check the OPP's present in DT against the LUT from BPMP-FW and enable only those DT OPP's which are present in LUT also. The OPP table in DT has CPU Frequency to bandwidth mapping where the bandwidth value is per MC channel. DRAM bandwidth depends on the number of MC channels which can vary as per the boot configuration. This per channel bandwidth from OPP table will be later converted by MC driver to final bandwidth value by multiplying with number of channels before being handled in the EMC driver. If OPP table is not present in DT, then use the LUT from BPMP-FW directly as the CPU frequency table and not do the DRAM frequency scaling which is same as the current behavior. Signed-off-by: Aaron Kling <webgeek1234@gmail.com> [ Viresh: Fix _free() definitions ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-10-23cpufreq: dt-platdev: Add JH7110S SOC to the allowlistHal Feng
Add the compatible strings for supporting the generic cpufreq driver on the StarFive JH7110S SoC. Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-10-23cpufreq: s5pv210: fix refcount leakShuhao Fu
In function `s5pv210_cpu_init`, a possible refcount inconsistency has been identified, causing a resource leak. Why it is a bug: 1. For every clk_get, there should be a matching clk_put on every successive error handling path. 2. After calling `clk_get(dmc1_clk)`, variable `dmc1_clk` will not be freed even if any error happens. How it is fixed: For every failed path, an extra goto label is added to ensure `dmc1_clk` will be freed regardlessly. Signed-off-by: Shuhao Fu <sfual@cse.ust.hk> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-10-23gpiolib: acpi: Make set debounce errors non fatalHans de Goede
Commit 16c07342b542 ("gpiolib: acpi: Program debounce when finding GPIO") adds a gpio_set_debounce_timeout() call to acpi_find_gpio() and makes acpi_find_gpio() fail if this fails. But gpio_set_debounce_timeout() failing is a somewhat normal occurrence, since not all debounce values are supported on all GPIO/pinctrl chips. Making this an error for example break getting the card-detect GPIO for the micro-sd slot found on many Bay Trail tablets, breaking support for the micro-sd slot on these tablets. acpi_request_own_gpiod() already treats gpio_set_debounce_timeout() failures as non-fatal, just warning about them. Add a acpi_gpio_set_debounce_timeout() helper which wraps gpio_set_debounce_timeout() and warns on failures and replace both existing gpio_set_debounce_timeout() calls with the helper. Since the helper only warns on failures this fixes the card-detect issue. Fixes: 16c07342b542 ("gpiolib: acpi: Program debounce when finding GPIO") Cc: stable@vger.kernel.org Cc: Mario Limonciello <superm1@kernel.org> Signed-off-by: Hans de Goede <hansg@kernel.org> Acked-by: Andy Shevchenko <andy@kernel.org> Link: https://lore.kernel.org/stable/20250920201200.20611-1-hansg%40kernel.org Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-10-23OPP: Initialize scope-based pointers inlineViresh Kumar
Uninitialized pointers with `__free` attribute can cause undefined behaviour as the memory allocated to the pointer is freed automatically when the pointer goes out of scope. The OPP core doesn't have any bugs related to this as of now, but it is better to initialize pointers marked with `__free` attribute at declaration to simplify the code and ensure proper scope-based cleanup. Reported-by: Joe Perches <joe@perches.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-10-23crypto: hisilicon/qm - restore original qos valuesnieweiqiang
When the new qos valus setting fails, restore to the original qos values. Fixes: 72b010dc33b9 ("crypto: hisilicon/qm - supports writing QoS int the host") Signed-off-by: nieweiqiang <nieweiqiang@huawei.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-23crypto: sun8i-ss - Move j init earlier in sun8i_ss_hash_runHerbert Xu
With gcc-14 I get ../drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c: In function ‘sun8i_ss_hash_run’: ../drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c:631:21: warning: ‘j’ may be used uninitialized [-Wmaybe-uninitialized] 631 | j = hash_pad(bf, 4096, j, byte_count, true, bs); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c:493:13: note: ‘j’ was declared here 493 | int j, i, k, todo; | ^ Fix this false positive by moving the initialisation of j earlier. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-23crypto: aspeed - fix double free caused by devmHaotian Zhang
The clock obtained via devm_clk_get_enabled() is automatically managed by devres and will be disabled and freed on driver detach. Manually calling clk_disable_unprepare() in error path and remove function causes double free. Remove the manual clock cleanup in both aspeed_acry_probe()'s error path and aspeed_acry_remove(). Fixes: 2f1cf4e50c95 ("crypto: aspeed - Add ACRY RSA driver") Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-22clk: socfpga: agilex5: add clock driver for Agilex5Khairul Anuar Romli
Add the new Clock manager driver to support new Agilex5 platform. The new driver got rid of the clk_parent_data structures as there are no 'clock-names' property in the DT bindings and use parent_names internally. This is based on the previous feedback from the maintainer. Signed-off-by: Ang Tien Sung <tiensung.ang@altera.com> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-10-22nvme-pci: use blk_map_iter for p2p metadataKeith Busch
The dma_map_bvec helper doesn't work for p2p data, so use the same blk_map_iter method that sgl uses for this memory type. Reported-by: Leon Romanovsky <leon@kernel.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Keith Busch <kbusch@kernel.org>
2025-10-22eth: fbnic: fix integer overflow warning in TLV_MAX_DATA definitionPei Xiao
The TLV_MAX_DATA macro calculates (PAGE_SIZE - 512) which can exceed the maximum value of a 16-bit unsigned integer on architectures with large page sizes, causing compiler warnings: drivers/net/ethernet/meta/fbnic/fbnic_tlv.h:83:24: warning: conversion from 'long unsigned int' to 'short unsigned int' changes value from '261632' to '65024' [-Woverflow] Fix this by explicitly masking the result to 16 bits using bitwise AND with 0xFFFF, ensuring the value fits within the expected data type while maintaining the intended behavior for normal page sizes. This preserves the existing functionality while eliminating the compiler warning and potential undefined behavior from integer truncation. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202510190832.3SQkTCHe-lkp@intel.com/ Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn> Link: https://patch.msgid.link/182b9d0235d044d69d7a57c1296cc6f46e395beb.1761039651.git.xiaopei01@kylinos.cn Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-10-22net: spacemit: Avoid -Wflex-array-member-not-at-end warningsGustavo A. R. Silva
-Wflex-array-member-not-at-end was introduced in GCC-14, and we are getting ready to enable it, globally. Use regular arrays instead of flexible-array members (they're not really needed in this case) in a couple of unions, and fix the following warnings: 1 drivers/net/ethernet/spacemit/k1_emac.c:122:42: warning: structure containing a flexible array member is not at the end of another structure [-Wflex-array-member-not-at-end] 1 drivers/net/ethernet/spacemit/k1_emac.c:122:32: warning: structure containing a flexible array member is not at the end of another structure [-Wflex-array-member-not-at-end] 1 drivers/net/ethernet/spacemit/k1_emac.c:121:42: warning: structure containing a flexible array member is not at the end of another structure [-Wflex-array-member-not-at-end] 1 drivers/net/ethernet/spacemit/k1_emac.c:121:32: warning: structure containing a flexible array member is not at the end of another structure [-Wflex-array-member-not-at-end] Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Acked-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/aPd0YjO-oP60Lgvj@kspp Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-10-22ptp: ocp: Fix typo using index 1 instead of i in SMA initialization loopJiasheng Jiang
In ptp_ocp_sma_fb_init(), the code mistakenly used bp->sma[1] instead of bp->sma[i] inside a for-loop, which caused only SMA[1] to have its DIRECTION_CAN_CHANGE capability cleared. This led to inconsistent capability flags across SMA pins. Fixes: 09eeb3aecc6c ("ptp_ocp: implement DPLL ops") Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com> Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Link: https://patch.msgid.link/20251021182456.9729-1-jiashengjiangcool@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-10-22net: stmmac: replace has_xxxx with core_typeRussell King (Oracle)
Replace the has_gmac, has_gmac4 and has_xgmac ints, of which only one can be set when matching a core to its driver backend, with an enumerated type carrying the DWMAC core type. Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Acked-by: Chen-Yu Tsai <wens@kernel.org> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Tested-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/E1vB6ld-0000000BIPy-2Qi4@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-10-22net: ravb: Ensure memory write completes before ringing TX doorbellLad Prabhakar
Add a final dma_wmb() barrier before triggering the transmit request (TCCR_TSRQ) to ensure all descriptor and buffer writes are visible to the DMA engine. According to the hardware manual, a read-back operation is required before writing to the doorbell register to guarantee completion of previous writes. Instead of performing a dummy read, a dma_wmb() is used to both enforce the same ordering semantics on the CPU side and also to ensure completion of writes. Fixes: c156633f1353 ("Renesas Ethernet AVB driver proper") Cc: stable@vger.kernel.org Co-developed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://patch.msgid.link/20251017151830.171062-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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