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path: root/drivers/gpu/drm
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2023-12-14drm/amd/pm: fix a double-free in si_dpm_initZhipeng Lu
When the allocation of adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries fails, amdgpu_free_extended_power_table is called to free some fields of adev. However, when the control flow returns to si_dpm_sw_init, it goes to label dpm_failed and calls si_dpm_fini, which calls amdgpu_free_extended_power_table again and free those fields again. Thus a double-free is triggered. Fixes: 841686df9f7d ("drm/amdgpu: add SI DPM support (v4)") Signed-off-by: Zhipeng Lu <alexious@zju.edu.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/pm: Remove unneeded semicolonYang Li
./drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c:1418:2-3: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7743 Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amdgpu/debugfs: fix error code when smc register accessors are NULLAlex Deucher
Should be -EOPNOTSUPP. Fixes: 5104fdf50d32 ("drm/amdgpu: Fix a null pointer access when the smc_rreg pointer is NULL") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/display: Add 3x4 CTM support for plane CTMJoshua Ashton
Create drm_color_ctm_3x4 to support 3x4-dimension plane CTM matrix and convert DRM CTM to DC CSC float matrix. v3: - rename ctm2 to ctm_3x4 (Harry) Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Joshua Ashton <joshua@froggi.es> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/display: add plane CTM supportMelissa Wen
Map the plane CTM driver-specific property to DC plane, instead of DC stream. The remaining steps to program DPP block are already implemented on DC shared-code. v3: - fix comment about plane and CRTC CTMs priorities (Harry) Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/pm: add power save mode workload for smu 13.0.10Kenneth Feng
add power save mode workload for smu 13.0.10, so that in compute mode, pmfw will add margin since some applications requres higher margin. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amdgpu/vpe: enable vpe dpmPeyton Lee
enable vpe dpm Signed-off-by: Peyton Lee <peytolee@amd.com> Reviewed-by: Lang Yu <lang.yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/display: add plane CTM driver-specific propertyMelissa Wen
Plane CTM for pre-blending color space conversion. Only enable driver-specific plane CTM property on drivers that support both pre- and post-blending gamut remap matrix, i.e., DCN3+ family. Otherwise it conflits with DRM CRTC CTM property. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/display: copy 3D LUT settings from crtc state to stream_updateJoshua Ashton
When commiting planes, we copy color mgmt resources to the stream state. Do the same for shaper and 3D LUTs. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Joshua Ashton <joshua@froggi.es> Co-developed-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/pm: support return vpe clock tablePeyton Lee
pm supports return vpe clock table and soc clock table Signed-off-by: Peyton Lee <peytolee@amd.com> Reviewed-by: Li Ma <li.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amdgpu: fix ftrace event amdgpu_bo_move always move on same heapWang, Beyond
Issue: during evict or validate happened on amdgpu_bo, the 'from' and 'to' is always same in ftrace event of amdgpu_bo_move where calling the 'trace_amdgpu_bo_move', the comment says move_notify is called before move happens, but actually it is called after move happens, here the new_mem is same as bo->resource Fix: move trace_amdgpu_bo_move from move_notify to amdgpu_bo_move Signed-off-by: Wang, Beyond <Wang.Beyond@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/display: allow newer DC hardware to use degamma ROM for PQ/HLGJoshua Ashton
Need to funnel the color caps through to these functions so it can check that the hardware is capable. v2: - remove redundant color caps assignment on plane degamma map (Harry) - pass color caps to degamma params v3: - remove unused color_caps parameter from set_color_properties (Harry) Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Joshua Ashton <joshua@froggi.es> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/display: add plane blend LUT and TF supportJoshua Ashton
Map plane blend properties to DPP blend gamma. Plane blend is a post-3D LUT curve that linearizes color space for blending. It may be defined by a user-blob LUT and/or predefined transfer function. As hardcoded curve (ROM) is not supported on blend gamma, we use AMD color module to fill parameters when setting non-linear TF with empty LUT. v2: - rename DRM TFs to AMDGPU TFs Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Joshua Ashton <joshua@froggi.es> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/display: handle empty LUTs in __set_input_tfJoshua Ashton
Unlike degamma, blend gamma doesn't support hardcoded curve (predefined/ROM), but we can use AMD color module to fill blend gamma parameters when we have non-linear plane gamma TF without plane gamma LUT. The regular degamma path doesn't hit this. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Joshua Ashton <joshua@froggi.es> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/amd/display: add plane 3D LUT supportMelissa Wen
Wire up DC 3D LUT to DM plane color management (pre-blending). On AMD display HW, 3D LUT comes after a shaper curve and we always have to program a shaper curve to delinearize or normalize the color space before applying a 3D LUT (since we have a reduced number of LUT entries). In this version, the default values of 3D LUT for size and bit_depth are 17x17x17 and 12-bit, but we already provide here a more generic mechanisms to program other supported values (9x9x9 size and 10-bit). v2: - started with plane 3D LUT instead of CRTC 3D LUT support v4: - lut3d_size is the max dimension size instead of # of entries Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-14drm/tegra: output: Fix missing i2c_put_adapter() in the error handling paths ↵Christophe JAILLET
of tegra_output_probe() If an error occurs after a successful of_get_i2c_adapter_by_node() call, it should be undone by a corresponding i2c_put_adapter(). Add the missing i2c_put_adapter() call. Fixes: 9be7d864cf07 ("drm/tegra: Implement panel support") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/b38604178991e1f08b2cda219103be266be2d680.1693667005.git.christophe.jaillet@wanadoo.fr
2023-12-14drm/tegra: rgb: Fix missing clk_put() in the error handling paths of ↵Christophe JAILLET
tegra_dc_rgb_probe() If clk_get_sys(..., "pll_d2_out0") fails, the clk_get_sys() call must be undone. Add the missing clk_put and a new 'put_pll_d_out0' label in the error handling path, and use it. Fixes: 0c921b6d4ba0 ("drm/tegra: dc: rgb: Allow changing PLLD rate on Tegra30+") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/0182895ead4e4730426616b0d9995954c960b634.1693667005.git.christophe.jaillet@wanadoo.fr
2023-12-14drm/tegra: rgb: Fix some error handling paths in tegra_dc_rgb_probe()Christophe JAILLET
If an error occurs after calling tegra_output_probe(), tegra_output_remove() should be called as already done in the remove function. Fixes: 59d29c0ec93f ("drm/tegra: Allocate resources at probe time") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/0001f61eb89048bc36241629b564195689cf54b6.1693667005.git.christophe.jaillet@wanadoo.fr
2023-12-14drm/tegra: hdmi: Fix some error handling paths in tegra_hdmi_probe()Christophe JAILLET
If an error occurs after calling tegra_output_probe(), tegra_output_remove() should be called as already done in the remove function. Fixes: 59d29c0ec93f ("drm/tegra: Allocate resources at probe time") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/9b7c564eb71977678b20abd73ee52001a51cf327.1693667005.git.christophe.jaillet@wanadoo.fr
2023-12-14drm/tegra: dsi: Fix missing pm_runtime_disable() in the error handling path ↵Christophe JAILLET
of tegra_dsi_probe() If an error occurs after calling pm_runtime_enable(), pm_runtime_disable() should be called as already done in the remove function. Fixes: ef8187d75265 ("drm/tegra: dsi: Implement runtime PM") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/ee4a15c9cd4b574a55cd67c30d2411239ba2cee9.1693667005.git.christophe.jaillet@wanadoo.fr
2023-12-14drm/tegra: dsi: Fix some error handling paths in tegra_dsi_probe()Christophe JAILLET
If an error occurs after calling tegra_output_probe(), tegra_output_remove() should be called as already done in the remove function. Fixes: dec727399a4b ("drm/tegra: Add DSI support") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/16820073278d031f6c474a08d5f22a255158585e.1693667005.git.christophe.jaillet@wanadoo.fr
2023-12-14drm/tegra: dpaux: Fix PM disable depth imbalance in tegra_dpaux_probeZhang Shurong
The pm_runtime_enable function increases the power disable depth, which means that we must perform a matching decrement on the error handling path to maintain balance within the given context. Additionally, we need to address the same issue for pm_runtime_get_sync. We fix this by invoking pm_runtime_disable and pm_runtime_put_sync when error returns. Fixes: 82b81b3ec1a7 ("drm/tegra: dpaux: Implement runtime PM") Signed-off-by: Zhang Shurong <zhang_shurong@foxmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/tencent_B13DB7F6C0023C46157250A524966F326A09@qq.com
2023-12-14drm/tegra: include drm/drm_edid.h only where neededJani Nikula
Reduce the need for rebuilds when drm_edid.h is modified by including it only where needed. v2: Fix build (kernel test robot <lkp@intel.com>) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231213101951.3932273-1-jani.nikula@intel.com
2023-12-14drm/tegra: dsi: Add missing check for of_find_device_by_nodeChen Ni
Add check for the return value of of_find_device_by_node() and return the error if it fails in order to avoid NULL pointer dereference. Fixes: e94236cde4d5 ("drm/tegra: dsi: Add ganged mode support") Signed-off-by: Chen Ni <nichen@iscas.ac.cn> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231024080738.825553-1-nichen@iscas.ac.cn
2023-12-14drm/mediatek: Fix underrun in VDO1 when switches off the layerHsiao Chien Sung
Do not reset Merge while using CMDQ because reset API doesn't wait for frame done event as CMDQ does and could lead to underrun when the layer is switching off. Fixes: aaf94f7c3ae6 ("drm/mediatek: Add display merge async reset control") Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-23-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Remove the redundant driver data for DPIHsiao Chien Sung
DPI input is in 1T2P mode on both MT8195 and MT8188. Remove the redundant driver data to align the settings, or the screen will glitch. Fixes: 2847cd7e6403 ("drm/mediatek: Add mt8188 dpi compatibles and platform data") Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-22-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Return error if MDP RDMA failed to enable the clockHsiao Chien Sung
Return the result of clk_prepare_enable() instead of always returns 0. Fixes: f8946e2b6bb2 ("drm/mediatek: Add display MDP RDMA support for MT8195") Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-21-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Support MT8188 Padding in display driverHsiao Chien Sung
Padding is a new display module on MT8188, it provides ability to add pixels to width and height of a layer with specified colors. Due to hardware design, Mixer in VDOSYS1 requires width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled, we need Padding to deal with odd width. Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-19-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Refine device table of OVL adaptorHsiao Chien Sung
- Adjust indentation to align with other files - Sort device table in alphabetical order - Add sentinel to device table Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-18-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Sort OVL adaptor componentsHsiao Chien Sung
Sort OVL adaptor components' names in alphabetical order. Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-17-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Start/Stop components with function pointersHsiao Chien Sung
By registering component related functions to the pointers, we can easily manage them within a for-loop and simplify the logic of component start/stop process. Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-16-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Power on/off devices with function pointersHsiao Chien Sung
Different from OVL, OVL adaptor is a pseudo device so we didn't define it in the device tree, consequently, pm_runtime_resume_and_get() called by .atomic_enable() powers on no device. For this reason, we implement a function to power on the RDMAs in OVL adaptor, and the system will make sure the IOMMUs are powered on as well because of the device link (iommus) in the RDMA nodes in DTS. This patch separates power and clock management process, it would be easier to maintain and add extensions. Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-15-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Manage component's clock with function pointersHsiao Chien Sung
By registering component related functions to the pointers, we can easily manage them within a for-loop and simplify the logic of clock control significantly. Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-14-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Add component ID to component match structureHsiao Chien Sung
Add component ID to component match structure so we can configure them with a for-loop. The main reason we do such code refactoring is that there is a new hardware component called "Padding" since MT8188, while MT8195 doesn't have this module, we can't use the original logic to manage the components. While MT8195 does not define Padding in the device tree, the corresponding components will be NULL and being skipped by the functions. Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-13-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/mediatek: Rename OVL_ADAPTOR_TYPE_RDMAHsiao Chien Sung
Rename OVL_ADAPTOR_TYPE_RDMA to OVL_ADAPTOR_TYPE_MDP_RDMA to align the naming rule of mtk_ovl_adaptor_comp_id. Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231214055847.4936-12-shawn.sung@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-12-14drm/ioc32: replace __attribute__((packed)) with __packedJani Nikula
__packed is preferred over __attribute__((packed)). Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Simon Ser <contact@emersion.fr> Link: https://patchwork.freedesktop.org/patch/msgid/20231212132557.3777281-2-jani.nikula@intel.com
2023-12-14drm/ttm/tests: Add tests for ttm_bo functionsKarolina Stolarek
Test reservation and release of TTM buffer objects. Add tests to check pin and unpin operations. Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com> Tested-by: Amaranath Somalapuram <Amaranath.Somalapuram@amd.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/fcd53970f55ae4be8c738e03f9fcf45366d20b47.1701257386.git.karolina.stolarek@intel.com Signed-off-by: Christian König <christian.koenig@amd.com>
2023-12-14drm/ttm/tests: Add tests for ttm_ttKarolina Stolarek
Test initialization, creation and destruction of ttm_tt instances. Export ttm_tt_destroy and ttm_tt_create symbols for testing purposes. Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Tested-by: Amaranath Somalapuram <Amaranath.Somalapuram@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/4459cb89c666bfa377753ae18d0c8917131638e8.1701257386.git.karolina.stolarek@intel.com Signed-off-by: Christian König <christian.koenig@amd.com>
2023-12-14drm/ttm/tests: Add tests for ttm_resource and ttm_sys_manKarolina Stolarek
Test initialization of ttm_resource using different memory domains. Add tests for a system memory manager and functions that can be tested without a fully-featured resource manager. Update ttm_bo_kunit_init() to initialize BO's kref and a genuine GEM drm object. Export ttm_resource_alloc for test purposes only. Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com> Tested-by: Amaranath Somalapuram <Amaranath.Somalapuram@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/68b8b293b6bf5f1170d49a1a089ccce9172e2855.1701257386.git.karolina.stolarek@intel.com Signed-off-by: Christian König <christian.koenig@amd.com>
2023-12-14drm/msm/dp: call dp_display_get_next_bridge() during probeDmitry Baryshkov
The funcion dp_display_get_next_bridge() can return -EPROBE_DEFER if the next bridge is not (yet) available. However returning -EPROBE_DEFER from msm_dp_modeset_init() is not ideal. This leads to -EPROBE return from component_bind, which can easily result in -EPROBE_DEFR loops. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # sc8180x-primus Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/566208/ Link: https://lore.kernel.org/r/20231107004424.2112698-1-dmitry.baryshkov@linaro.org
2023-12-14drm/msm/dpu: Drop enable and frame_count parameters from dpu_hw_setup_misr()Jessica Zhang
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they are always set to the same values. In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as frame_count is always set to the same value. Fixes: 7b37523fb1d1 ("drm/msm/dpu: Move MISR methods to dpu_hw_util") Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/572009/ Link: https://lore.kernel.org/r/20231213-encoder-fixup-v4-2-6da6cd1bf118@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-14drm/msm/dpu: Set input_sel bit for INTFJessica Zhang
Set the input_sel bit for encoders as it was missed in the initial implementation. Reported-by: Rob Clark <robdclark@gmail.com> Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39 Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface") Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/572007/ Link: https://lore.kernel.org/r/20231213-encoder-fixup-v4-1-6da6cd1bf118@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-14drm/msm/dpu: move CSC tables to dpu_hw_util.cDmitry Baryshkov
Move CSC tables out of the header file to fix following kind of warnings: In file included from drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h:8, from drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:5: drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h:54:33: warning: ‘dpu_csc10_rgb2yuv_601l’ defined but not used [-Wunused-const-variable=] 54 | static const struct dpu_csc_cfg dpu_csc10_rgb2yuv_601l = { | ^~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h:39:33: warning: ‘dpu_csc10_YUV2RGB_601L’ defined but not used [-Wunused-const-variable=] 39 | static const struct dpu_csc_cfg dpu_csc10_YUV2RGB_601L = { | ^~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h:24:33: warning: ‘dpu_csc_YUV2RGB_601L’ defined but not used [-Wunused-const-variable=] 24 | static const struct dpu_csc_cfg dpu_csc_YUV2RGB_601L = { | ^~~~~~~~~~~~~~~~~~~~ Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/571869/ Link: https://lore.kernel.org/r/20231213005728.53060-1-dmitry.baryshkov@linaro.org
2023-12-14drm/msm/dpu: Add mutex lock in control vblank irqPaloma Arellano
Add a mutex lock to control vblank irq to synchronize vblank enable/disable operations happening from different threads to prevent race conditions while registering/unregistering the vblank irq callback. v4: -Removed vblank_ctl_lock from dpu_encoder_virt, so it is only a parameter of dpu_encoder_phys. -Switch from atomic refcnt to a simple int counter as mutex has now been added v3: Mistakenly did not change wording in last version. It is done now. v2: Slightly changed wording of commit message Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571854/ Link: https://lore.kernel.org/r/20231212231101.9240-2-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-14drm/msm/dpu: add cdm blocks to dpu snapshotAbhinav Kumar
Now that CDM block support has been added to DPU lets also add its entry to the DPU snapshot to help debugging. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571835/ Link: https://lore.kernel.org/r/20231212205254.12422-16-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-14drm/msm/dpu: introduce separate wb2_format arrays for rgb and yuvAbhinav Kumar
Lets rename the existing wb2_formats array wb2_formats_rgb to indicate that it has only RGB formats and can be used on any chipset having a WB block. Introduce a new wb2_formats_rgb_yuv array to the catalog to indicate support for YUV formats to writeback in addition to RGB. Chipsets which have support for CDM block will use the newly added wb2_formats_rgb_yuv array. changes in v3: - change type of wb2_formats_rgb/wb2_formats_rgb_yuv to u32 to fix checkpatch warnings Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571837/ Link: https://lore.kernel.org/r/20231212205254.12422-15-quic_abhinavk@quicinc.com [DB: fixed newer catalog entries] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-14drm/msm/dpu: reserve cdm blocks for writeback in case of YUV outputAbhinav Kumar
Reserve CDM blocks for writeback if the format of the output fb is YUV. At the moment, the reservation is done only for writeback but can easily be extended by relaxing the checks once other interfaces are ready to output YUV. changes in v3: - squash CDM disable during encoder cleanup into this change changes in v2: - use needs_cdm from topology struct - drop fb related checks from atomic_mode_set() Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571838/ Link: https://lore.kernel.org/r/20231212205254.12422-14-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-14drm/msm/dpu: plug-in the cdm related bits to writeback setupAbhinav Kumar
To setup and enable CDM block for the writeback pipeline, lets add the pieces together to set the active bits and the flush bits for the CDM block. changes in v2: - passed the cdm idx to update_pending_flush_cdm() (have retained the R-b as its a minor change) Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571831/ Link: https://lore.kernel.org/r/20231212205254.12422-13-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-14drm/msm/dpu: add an API to setup the CDM block for writebackAbhinav Kumar
Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by the writeback encoder to setup the CDM block. Currently, this is defined and used within the writeback's physical encoder layer however, the function can be modified to be used to setup the CDM block even for non-writeback interfaces. Until those modifications are planned and made, keep it local to writeback. changes in v3: - call bind_pingpong_blk() directly as disable() is dropped - add dpu_csc10_rgb2yuv_601l to dpu_hw_util.h and use it - fix kbot error on the function doc - document that dpu_encoder_helper_phys_setup_cdm() doesn't handle DPU_CHROMA_H1V2 changes in v2: - add the RGB2YUV CSC matrix to dpu util as needed by CDM - use dpu_hw_get_csc_cfg() to get and program CSC - drop usage of setup_csc_data() and setup_cdwn() cdm ops as they both have been merged into enable() - drop reduntant hw_cdm and hw_pp checks Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312102149.qmbCdsg2-lkp@intel.com/ Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571833/ Link: https://lore.kernel.org/r/20231212205254.12422-12-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-12-14drm/msm/dpu: add CDM related logic to dpu_hw_ctl layerAbhinav Kumar
CDM block will need its own logic to program the flush and active bits in the dpu_hw_ctl layer. Make necessary changes in dpu_hw_ctl to support CDM programming. changes in v3: - drop unused cdm_active as reported by kbot - retained the R-b as its a trivial change changes in v2: - remove unused empty line - pass in cdm_num to update_pending_flush_cdm() Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312102047.S0I69pCs-lkp@intel.com/ Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571829/ Link: https://lore.kernel.org/r/20231212205254.12422-11-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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