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path: root/drivers/gpu/drm/amd
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2024-05-02drm/amd/amdgpu: enable 3D cgcg and 3D cglsKenneth Feng
enable 3D cgcg and 3D cgls on gc 12.0.1 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amd/amdgpu: enable mgcg on gfx 12.0.1Kenneth Feng
enable mgcg on gfx 12.0.1 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amd/amdgpu: enable cgcg and cglsKenneth Feng
enable cgcg and cgls on gc 12.0.1 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/vcn5: Add VCN5 capabilitiesDavid (Ming Qiang) Wu
Add VCN5 encode and decode capabilities support Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/vcn5: enable DPG mode supportSonny Jiang
Enable DPG mode Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/jpeg5: enable power gatingSonny Jiang
Enable PG on JPEG5 Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02amdgpu/vcn: enable AMD_PG_SUPPORT_VCNDavid (Ming Qiang) Wu
turn on AMD_PG_SUPPORT_VCN flag for power saving Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: Fix physical address maskDavid Belanger
Mask should be 44-bit. Signed-off-by: David Belanger <david.belanger@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/discovery: add mes v12_0 ip blockLikun Gao
Add mes v12_0 ip block. v2: squash in update (Alex) v3: rebase on unified mes changes (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/discovery: add gfx v12_0 ip blockLikun Gao
Add gfx v12_0 ip block. v2: Squash in update (Alex) v3: add exp flag (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/mes12: disable logging outputJack Xiao
Random page fault was oberserved, temporarily disable mes log buffer output. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: add module parameter 'amdgpu_uni_mes'Jack Xiao
Add module parameter 'amdgpu_uni_mes' to enable/disable unified mes fw support. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/mes12: add legacy setting hw resource interfaceJack Xiao
For unified mes fw, add the legacy interface to set hardware resources. v2: remove warning (Alex) Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: Disable unmapped doorbell handling basic mode on mes 12shaoyunl
The new mechanism for unmapped doorbell handling requires both driver side and MES fw side change. The FW side changes are still not released. Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/gfx: enable mes to map legacy queue supportJack Xiao
Enable mes to map legacy queue support. v2: drop unused gfx_v12_0_kiq_enable_kgq() (Alex) Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/mes12: add mes mapping legacy queue supportJack Xiao
Add mes12 map legacy queue packet submission. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/mes12: enable uni_mes fw on mes pipe0Jack Xiao
Enable the unified mes firmware on mes pipe0. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/mes12: add uni_mes fw loading supportJack Xiao
Add the unified mes firmware loading support. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/mes: add uni_mes fw loading supportJack Xiao
Add the unified mes firmware loading support. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: mark GFX12 system and peer GPU memory mappings as MTYPE_NCSreekant Somasekharan
Due to a HW bug, the system memory mappings and peer GPU mappings on GFX12 need to be marked as MTYPE_NC. Cc: Joe Greathouse <joseph.greathouse@amd.com> Cc: David Belanger <david.belanger@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amd/amdkfd: Add GFX12 PTE flag to SVM get PTE functionSreekant Somasekharan
Add new GFX12 PTE flag AMDGPU_PTE_IS_PTE to svm_range_get_pte_flags function. This resolves the issues related to SVM enablement in GFX12. Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Enable atomic support for GFX12David Belanger
Enable flag in KFD and set the atomic support bit in MQD. Signed-off-by: David Belanger <david.belanger@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: fix NULL ptr for debugfs mqds on GFX v12Eric Huang
mqd_stride function in gfx v12 is not implemented, that causes NULL ptr error. Add the generic func to fix it. Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: enable single alu ops for gfx12Jonathan Kim
GFX12 debugging requires setting up precise ALU operation for catching ALU exceptions. Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Tested-by: Lancelot Six <lancelot.six@amd.com> Reviewed-by: Eric Huang <jinhuieric.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: fix support for trap on wave start and end for gfx12Jonathan Kim
Similar to GFX11, GFX12 supports trapping on wave start and end. Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: always enable ttmp setup for gfx12Jonathan Kim
Similar to GFX11, always enable the setup of trap temporaries on GFX12. Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Enable GFX12 trap handlerDavid Belanger
Updated switch statement to use GFX12 trap handler. Signed-off-by: David Belanger <david.belanger@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: enable missed single-step workaround for gfx12Laurent Morichetti
When trap_ctrl.trap_after_inst is set, it is possible for a wave to enter the trap handler, after single-stepping an instruction and a save_context is raised, with only save_context set in excp_flag_priv. Because excp_flag_priv.trap_after_inst is not reliably set, we need to use the missed single-step workaround for gfx12 as well. Also add wave_start and wave_end as exceptions that should be handled by the 2nd level trap handler. Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com> Tested-by: Lancelot Six <lancelot.six@amd.com> Reviewed-by: Jonathan Kim <jonathan.kim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: save and restore barrier state for gfx12Lancelot SIX
Add support to save and restore the work group barrier state in gfx12 CWSR trap handler. There is no support to directly restore the signal count of a barrier state, so instead this patch repeatedly calls s_barrier_signal to increment the signal count to the desired value. In this patch, I have implemented the logic to restore the barrier at the end of the block restoring the HWREGs. This process needs to be done by exactly 1 wave per work group. To achieve this, the initial value of s_restore_spi_init_hi (containing a FIRST_WAVE bit) needs to be saved up until that point. An alternative could be restore the barrier earlier in the process (around when LDS is restored, as the same wave does both). Doing this would break the pattern that the restore procedure follows the CWSR area layout. Before restoring the barrier, this patch checks if the barrier was whose state was saved has the "valid" bit set, even if I don't think this barrier can be in an invalid state during context save. I expect this test to always be true. Signed-off-by: Lancelot SIX <lancelot.six@amd.com> Reviewed-by: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Add gfx12 trap handler supportJay Cornwall
- HWREG changes since gfx11 - Save/restore barrier state - get_wave_size is now reserved by assembler v2: rebase (Alex) Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Move trap handler coherence flags to preprocessorJay Cornwall
No functional change. Preparation for gfx12 support. v2: drop unrelated change (Alex) Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Added gfx_v12_kfd2kgd interface for GFX12.David Belanger
Initial implementation, based on GFX11. v2: Removed functions not needed by cp scheduler. v3: Fixed typos. v4: squash in warning fix (Alex) Signed-off-by: David Belanger <david.belanger@amd.com> Acked-by: Jonathan Kim <jonathan.kim@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Added device queue manager files for GFX12.David Belanger
Initial implementation, based on GFX11. v2: squash in include fix from David (Alex) Signed-off-by: David Belanger <david.belanger@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Added MQD manager files for GFX12.David Belanger
Initial implementation, based on GFX11. v2: Removed dbg_wa code as not needed on GFX12. v3: squash in SDMA queue fixes (Alex) v4: rebase (Alex) Signed-off-by: David Belanger <david.belanger@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Added temporary changes for GFX12.David Belanger
Added cases for GFX12 in switch statement, code relying on GFX11 implementation until GFX12 implementation is complete. Signed-off-by: David Belanger <david.belanger@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdkfd: Basic SDMA and cache info changes for GFX12.David Belanger
Added GFX12 support to a few switch statements. Signed-off-by: David Belanger <david.belanger@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: Enable event log on MES 12shaoyunl
Enable event log through the HW specific FW API Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: Enable unmapped doorbell handling basic mode on mes 12shaoyunl
Enable basic mode handling for doorbell ring on unmapped CP queue. In this mode, MES can start schedule the queue mapping based on HW interrupt instead of timer. Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: Switch to smuio func to get gpu clk counterHawking Zhang
Switch to smuio callback to query gpu clock counter Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: init gfxhub setting to align with mmhubLikun Gao
Align gfxhub settings with mmhub when program rlc ram. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: skip dpm check to init imu fwLikun Gao
Skip dpm check to init imu firmware for imu v12. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: fix active rb and cu number for gfx12Likun Gao
Correct the algorithm of active CU and RB to bypass the disabled SA for gfx12. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: use new method to program rlc ramLikun Gao
Program rlc ram with golden setting data instead. The old method (program_imu_rlc_ram_old) should be retired in the future. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amd/amdgpu: add cgcg&cgls interface for gfx 12.0Kenneth Feng
add cgcg&cgls interface for gfx 12.0 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amd/amdgpu: update GFX12 wave data registersTom St Denis
Update the registers for gfx12. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Jonathan Kim <jonathan.kim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: set different fw data addr for mec pipeLikun Gao
For MEC fw data, different pipe should programed into different address. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amd/amdgpu: workaround for the imu fw loadingKenneth Feng
workaournd for the imu fw loading on gfx 12.0 without psp Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amd: Move fw init from sw_init to early_init for imu v12Likun Gao
Move microcode loading from sw_init to early_init to align with the perious version of imu init sequence. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu: support S&R fw load for gfx v12Likun Gao
Support Save & Restore related fw load with backdoor RLC autoload type on gfx v12. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-02drm/amdgpu/gfx12: recalculate available compute rings to useJack Xiao
Recalculate the number of compute rings to use based on the gfx hardware configuration. As needed reserve half of compute rings for mes, kgd can't use up all compute rings. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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