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2025-08-23arm64: dts: qcom: sm8750-mtp: Add speaker Soundwire port mappingKrzysztof Kozlowski
Add appropriate mappings of Soundwire ports of WSA883x speaker to correctly map the Speaker ports to the WSA macro ports. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250820141233.216713-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: sdm845: Fix slimbam num-channels/eesStephan Gerhold
Reading the hardware registers of the &slimbam on RB3 reveals that the BAM supports only 23 pipes (channels) and supports 4 EEs instead of 2. This hasn't caused problems so far since nothing is using the extra channels, but attempting to use them would lead to crashes. The bam_dma driver might warn in the future if the num-channels in the DT are wrong, so correct the properties in the DT to avoid future regressions. Cc: stable@vger.kernel.org Fixes: 27ca1de07dc3 ("arm64: dts: qcom: sdm845: add slimbus nodes") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250821-sdm845-slimbam-channels-v1-1-498f7d46b9ee@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: lemans-evk: Enable Display PortShashank Maurya
Lemans EVK board has two mini-DP connectors, connected to EDP0 and EDP1 phys. Other EDP phys are available on expansion connectors for the mezzanine boards. Enable EDP0 and EDP1 along with their corresponding PHYs. Signed-off-by: Shashank Maurya <quic_ssmaurya@quicinc.com> Signed-off-by: Prahlad Valluru <venkata.valluru@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250821-enable-iq9-dp-v3-1-8c3a719e3b9a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23ARM: dts: qcom: apq8064-mako: Minor whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' or '{' characters. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250819131717.86713-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23ARM: defconfig: cleanup orphaned CONFIGsTrevor Woerner
Drop CONFIG_ARCH_MSM8X60 and CONFIG_ARCH_MSM8960 which were removed in commit 99497df59427 ("ARM: qcom: merge remaining subplatforms into sensible Kconfig entry"). Drop CONFIG_ARCH_MSM8916 and CONFIG_ARCH_MSM8974 which were removed in commit 85148df36835 ("ARM: qcom: drop most of 32-bit ARCH_QCOM subtypes"). Signed-off-by: Trevor Woerner <twoerner@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250819231652.15938-1-twoerner@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: qcs615: Add CPU scaling clock nodeTaniya Das
Add cpufreq-hw node to support CPU frequency scaling. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250814-qcs615-mm-cpu-dt-v6-v6-2-a06f69928ab5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: qcs615: Add clock nodes for multimedia clockTaniya Das
Add support for video, camera, display and gpu clock controller nodes for QCS615 platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250814-qcs615-mm-cpu-dt-v6-v6-1-a06f69928ab5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: sm6150: move standard clocks to SoC dtsiDmitry Baryshkov
Follow the example of all other platforms and reference standard clocks (XO, sleep) from the SoC DT even if they are defined in the board DT file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250816-qcs615-move-clocks-v1-1-bc5665d6e1c3@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: use DT label for DSI outputsDmitry Baryshkov
Instead of keeping a copy of the DT tree going down to the DSI output endpoint use the label to reference it directly, making DTs less error-prone. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250815-msm-dsi-outs-v2-1-3662704e833f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: ipq9574-rdp433: remove unused 'sdc-default-state'Gabor Juhos
Since commit 8140d10568a8 ("arm64: dts: qcom: ipq9574: Remove eMMC node"), the 'sdc-default-state' pinctrl state is not used so remove that. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250701-rdp433-remove-sdc-state-v1-1-ca0f156a42d5@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: sm8550: Correct the min/max voltages for vreg_l6n_3p3Kamal Wadhwa
Voltage regulator 'vreg_l6n_3p3' max-microvolt prop is currently configured at 3304000uV in different sm8550 board files. However this is not a valid voltage value for 'pmic5_pldo502ln' type voltage regulators. Check below the max value(3200mV) in the regulator summary for min/max used as 2800mV/3304mV in DT:- logs: [ 0.294781] vreg_l6n_3p3: Setting 2800000-3304000uV regulator summary: regulator use open bypass opmode voltage current min max --------------------------------------------------------------------- .. vreg_l6n_3p3 0 0 0 normal 2800mV 0mA 2800mV 3200mV .. Correct the min/max value to 3200000uV, as that is the closest valid value to 3.3V and Hardware team has also confirmed that its good to support the consumers(camera sensors) of this regulator. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250620-sm8550-correct-vreg_l6n_3p3-vol-v2-1-b397f3e91d7b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: sdm845-oneplus-*: set constant-charge-current-max-microampCasey Connolly
Set the maximum constant charge current to use for this battery. While the battery is likely comfortably capable of 4A or so, OnePlus didn't include a secondary charger IC for parallel charging (instead they have their proprietary Dash Charging). It's possible that this value could be safely increased after some testing (and when we have support for modelling the charger as a cooling device properly), but for now this value is acceptable. This is references from qcom,usb-icl-ua property in the downstream vendor devicetree. Signed-off-by: Casey Connolly <casey.connolly@linaro.org> Link: https://lore.kernel.org/r/20250619-smb2-smb5-support-v1-2-ac5dec51b6e1@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: ipq9574: use 'pcie' as node name for 'pcie0'Gabor Juhos
The PCI controller at address 28000000 supports PCIe only, so use 'pcie' as node name for that. This ensures that all PCIe controller instance nodes are using the same name. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250618-ipq9574-pcie0-name-v1-1-f0a8016ea504@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: sc8280xp: Enable GPI DMAPengyu Luo
Enable GPI DMA for sc8280xp based devices. Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Link: https://lore.kernel.org/r/20250612075724.707457-4-mitltlatltl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: sc8280xp: Describe GPI DMA controller nodesPengyu Luo
SPI on SC8280XP requires DMA (GSI) mode to function properly. Without it, SPI controllers fall back to FIFO mode, which causes: [ 0.901296] geni_spi 898000.spi: error -ENODEV: Failed to get tx DMA ch [ 0.901305] geni_spi 898000.spi: FIFO mode disabled, but couldn't get DMA, fall back to FIFO mode ... [ 45.605974] goodix-spi-hid spi0.0: SPI transfer timed out [ 45.605988] geni_spi 898000.spi: Can't set CS when prev xfer running [ 46.621555] spi_master spi0: failed to transfer one message from queue [ 46.621568] spi_master spi0: noqueue transfer failed [ 46.621577] goodix-spi-hid spi0.0: spi transfer error: -110 [ 46.621585] goodix-spi-hid spi0.0: probe with driver goodix-spi-hid failed with error -110 Therefore, describe GPI DMA controller nodes for qup{0,1,2}, and describe DMA channels for SPI and I2C, UART is excluded for now, as it does not yet support this mode. Note that, since there is no public schematic, this is derived from Windows drivers. The drivers do not expose any DMA channel mask information, so all available channels are enabled. Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Link: https://lore.kernel.org/r/20250612075724.707457-3-mitltlatltl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: x1e80100-pmics: Disable pm8010 by defaultAleksandrs Vinarskis
pm8010 is a camera specific PMIC, and may not be present on some devices. These may instead use a dedicated vreg for this purpose (Dell XPS 9345, Dell Inspiron..) or use USB webcam instead of a MIPI one alltogether (Lenovo Thinbook 16, Lenovo Yoga..). Disable pm8010 by default, let platforms that actually have one onboard enable it instead. Cc: stable@vger.kernel.org Fixes: 2559e61e7ef4 ("arm64: dts: qcom: x1e80100-pmics: Add the missing PMICs") Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Link: https://lore.kernel.org/r/20250701183625.1968246-2-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23arm64: dts: qcom: sc8180x: modernize MDSS device definitionDmitry Baryshkov
Follow the lead of other platforms and update DT description of the MDSS device: - Use generic node names (dislpay-subsystem, display-controller, phy) instead of the platform-specific ones (mdss, mdp, dsi-phy) - Add platform-specific compatible string to DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250704-mdss-schema-v1-4-e978e4e73e14@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23ARM: dts: qcom: msm8226-samsung-ms013g: Add touch keysRaymond Hackley
Touch keys feature on Galaxy Grand 2 is provided by Zinitix touchscreen. Add property linux,keycodes to enable touch keys. Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250708122118.157791-1-raymondhackley@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-22arm64: dts: rockchip: add vcc3v3-lcd-s0 regulator to roc-rk3576-pcHeiko Stuebner
This fixed regulator is described by the schematics as being part of the baseboard and its output supply is then routed to the 30pin DSI connector on the board. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-13-heiko@sntech.de
2025-08-22arm64: dts: rockchip: add the dsi controller to rk3576Heiko Stuebner
The RK3576 comes with one DSI2 controllers based on the same newer Synopsis IP as the ones on the RK3588. Add the necessary node for it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-12-heiko@sntech.de
2025-08-22arm64: dts: rockchip: add mipi-dcphy to rk3576Heiko Stuebner
Add the MIPI-DC-phy node to the RK3576, that will be used by the one DSI2 controller and hopefully in some future also for camera input. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-11-heiko@sntech.de
2025-08-22mips: lantiq: xway: sysctrl: rename the etop nodeAleksander Jan Bajkowski
Bindig requires a node name matching ‘^ethernet@[0-9a-f]+$’. This patch changes the clock name from “etop” to “ethernet”. This fixes the following warning: arch/mips/boot/dts/lantiq/danube_easy50712.dtb: etop@e180000 (lantiq,etop-xway): $nodename:0: 'etop@e180000' does not match '^ethernet@[0-9a-f]+$' from schema $id: http://devicetree.org/schemas/net/lantiq,etop-xway.yaml# Fixes: dac0bad93741 ("dt-bindings: net: lantiq,etop-xway: Document Lantiq Xway ETOP bindings") Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Acked-by: Jakub Kicinski <kuba@kernel.org>
2025-08-22mips: dts: lantiq: danube: add missing burst length propertyAleksander Jan Bajkowski
The upstream dts lacks the lantiq,{rx/tx}-burst-length property. Other issues were also fixed: arch/mips/boot/dts/lantiq/danube_easy50712.dtb: etop@e180000 (lantiq,etop-xway): 'interrupt-names' is a required property from schema $id: http://devicetree.org/schemas/net/lantiq,etop-xway.yaml# arch/mips/boot/dts/lantiq/danube_easy50712.dtb: etop@e180000 (lantiq,etop-xway): 'lantiq,tx-burst-length' is a required property from schema $id: http://devicetree.org/schemas/net/lantiq,etop-xway.yaml# arch/mips/boot/dts/lantiq/danube_easy50712.dtb: etop@e180000 (lantiq,etop-xway): 'lantiq,rx-burst-length' is a required property from schema $id: http://devicetree.org/schemas/net/lantiq,etop-xway.yaml# Fixes: 14d4e308e0aa ("net: lantiq: configure the burst length in ethernet drivers") Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Acked-by: Jakub Kicinski <kuba@kernel.org>
2025-08-22arm64: dts: ti: k3-am69-sk: Switch to PCIe Multilink + USB configurationSiddharth Vadapalli
The SERDES0 instance of SERDES on the AM69 SoC is a Cadence Torrent SERDES and it has 4 lanes which are allocated in the following manner: Lane0 and Lane1 to PCIe1 Lane2 to PCIe3 Lane3 to USB0 Until [0], the Cadence Torrent SERDES driver only supported configuring the SERDES for a PCIe + USB configuration whereby all lanes of the SERDES configured for PCIe will operate at the same speed. As a result, PCIe1 and PCIe3 instances of PCIe will either fall down to a common speed based on the PCIe peers that they are each connected to, or, the PCIe link could fail to be setup. Since [0] enables support for PCIe Multilink + USB configuration, it is now possible for the SERDES lanes allocated to PCIe1 and PCIe3 to link up and operate at different speeds. USB continues to remain functional. Hence, update the 'serdes0' node as well as the 'pcie1_rc' and 'pcie3_rc' nodes to switch to the PCIe Multilink + USB configuration that is now supported by the Cadence Torrent SERDES driver. [0]: commit 351e07e6b2ec ("phy: cadence-torrent: Add PCIe multilink + USB with same SSC register config for 100 MHz refclk") Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://patch.msgid.link/20250819105717.372893-1-s-vadapalli@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2025-08-22arm64: dts: ti: k3-j721s2: Add default PCI interrupt controller address cellsKrzysztof Kozlowski
Add missing address-cells 0 to the PCI interrupt node to silence W=1 warning: k3-j721s2-main.dtsi:1431.3-1434.29: Warning (interrupt_map): /bus@100000/pcie@2910000:interrupt-map: Missing property '#address-cells' in node /bus@100000/pcie@2910000/interrupt-controller, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250822133309.312189-2-krzysztof.kozlowski@linaro.org Signed-off-by: Nishanth Menon <nm@ti.com>
2025-08-22arm64: dts: ti: k3-am6548: Minor whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250819131651.86569-8-krzysztof.kozlowski@linaro.org Signed-off-by: Nishanth Menon <nm@ti.com>
2025-08-22x86/mtrr: Remove license boilerplate text with bad FSF addressThomas Huth
The Free Software Foundation does not reside in "675 Mass Ave, Cambridge" anymore, so no need to mention that address in the source code here. But instead of updating the address to their current location, just drop the license boilerplate text and use a proper SPDX license identifier instead. The text talks about the "GNU *Library* General Public License" and "any later version", so LGPL-2.0+ is the right choice here. [ bp: Massage commit message. ] Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/20250801084531.34089-1-thuth@redhat.com
2025-08-22x86/asm: Use RDPKRU and WRPKRU mnemonics in <asm/special_insns.h>Uros Bizjak
Current minimum required version of binutils is 2.30, which supports RDPKRU and WRPKRU instruction mnemonics. Replace the byte-wise specification of RDPKRU and WRPKRU with these proper mnemonics. No functional change intended. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/20250616083611.157740-1-ubizjak@gmail.com
2025-08-22ARM: dts: microchip: Minor whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' or '{' characters. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20250819131736.86862-2-krzysztof.kozlowski@linaro.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-08-22arm64: dts: rockchip: Add naneng-combphy for RK3528Yao Zi
Rockchip RK3528 ships a naneng-combphy that is shared by PCIe and USB 3.0 controllers. Describe it and the pipe-phy grf which it depends on. Signed-off-by: Yao Zi <ziyao@disroot.org> Link: https://lore.kernel.org/r/20250728102947.38984-8-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-22x86/mm: Change cpa_flush() to call flush_kernel_range() directlyYu-cheng Yu
The function cpa_flush() calls __flush_tlb_one_kernel() and flush_tlb_all(). Replacing that with a call to flush_tlb_kernel_range() allows cpa_flush() to make use of INVLPGB or RAR without any additional changes. Initialize invlpgb_count_max to 1, since flush_tlb_kernel_range() can now be called before invlpgb_count_max has been initialized to the value read from CPUID. [riel: remove now unused __cpa_flush_tlb] Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> Signed-off-by: Rik van Riel <riel@surriel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Dave Hansen <dave.hansen@linux.intel.com> Link: https://lore.kernel.org/all/20250606171112.4013261-4-riel%40surriel.com
2025-08-22x86/tdx: Skip clearing reclaimed pages unless X86_BUG_TDX_PW_MCE is presentAdrian Hunter
Avoid clearing reclaimed TDX private pages unless the platform is affected by the X86_BUG_TDX_PW_MCE erratum. This significantly reduces VM shutdown time on unaffected systems. Background KVM currently clears reclaimed TDX private pages using MOVDIR64B, which: - Clears the TD Owner bit (which identifies TDX private memory) and integrity metadata without triggering integrity violations. - Clears poison from cache lines without consuming it, avoiding MCEs on access (refer TDX Module Base spec. 1348549-006US section 6.5. Handling Machine Check Events during Guest TD Operation). The TDX module also uses MOVDIR64B to initialize private pages before use. If cache flushing is needed, it sets TDX_FEATURES.CLFLUSH_BEFORE_ALLOC. However, KVM currently flushes unconditionally, refer commit 94c477a751c7b ("x86/virt/tdx: Add SEAMCALL wrappers to add TD private pages") In contrast, when private pages are reclaimed, the TDX Module handles flushing via the TDH.PHYMEM.CACHE.WB SEAMCALL. Problem Clearing all private pages during VM shutdown is costly. For guests with a large amount of memory it can take minutes. Solution TDX Module Base Architecture spec. documents that private pages reclaimed from a TD should be initialized using MOVDIR64B, in order to avoid integrity violation or TD bit mismatch detection when later being read using a shared HKID, refer April 2025 spec. "Page Initialization" in section "8.6.2. Platforms not Using ACT: Required Cache Flush and Initialization by the Host VMM" That is an overstatement and will be clarified in coming versions of the spec. In fact, as outlined in "Table 16.2: Non-ACT Platforms Checks on Memory" and "Table 16.3: Non-ACT Platforms Checks on Memory Reads in Li Mode" in the same spec, there is no issue accessing such reclaimed pages using a shared key that does not have integrity enabled. Linux always uses KeyID 0 which never has integrity enabled. KeyID 0 is also the TME KeyID which disallows integrity, refer "TME Policy/Encryption Algorithm" bit description in "Intel Architecture Memory Encryption Technologies" spec version 1.6 April 2025. So there is no need to clear pages to avoid integrity violations. There remains a risk of poison consumption. However, in the context of TDX, it is expected that there would be a machine check associated with the original poisoning. On some platforms that results in a panic. However platforms may support "SEAM_NR" Machine Check capability, in which case Linux machine check handler marks the page as poisoned, which prevents it from being allocated anymore, refer commit 7911f145de5fe ("x86/mce: Implement recovery for errors in TDX/SEAM non-root mode") Improvement By skipping the clearing step on unaffected platforms, shutdown time can improve by up to 40%. On platforms with the X86_BUG_TDX_PW_MCE erratum (SPR and EMR), continue clearing because these platforms may trigger poison on partial writes to previously-private pages, even with KeyID 0, refer commit 1e536e1068970 ("x86/cpu: Detect TDX partial write machine check erratum") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Kirill A. Shutemov <kas@kernel.org> Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> Acked-by: Kai Huang <kai.huang@intel.com> Acked-by: Vishal Annapurve <vannapurve@google.com> Link: https://lore.kernel.org/all/20250819155811.136099-4-adrian.hunter%40intel.com
2025-08-22x86/tdx: Tidy reset_pamt functionsAdrian Hunter
tdx_quirk_reset_paddr() was renamed to reflect that, in fact, the clearing is necessary only for hardware with a certain quirk. That is dealt with in a subsequent patch. Rename reset_pamt functions to contain "quirk" to reflect the new functionality, and remove the now misleading comment. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> Acked-by: Kai Huang <kai.huang@intel.com> Acked-by: Vishal Annapurve <vannapurve@google.com> Link: https://lore.kernel.org/all/20250819155811.136099-3-adrian.hunter%40intel.com
2025-08-22x86/tdx: Eliminate duplicate code in tdx_clear_page()Adrian Hunter
tdx_clear_page() and reset_tdx_pages() duplicate the TDX page clearing logic. Rename reset_tdx_pages() to tdx_quirk_reset_paddr() and create tdx_quirk_reset_page() to call tdx_quirk_reset_paddr() and be used in place of tdx_clear_page(). The new name reflects that, in fact, the clearing is necessary only for hardware with a certain quirk. That is dealt with in a subsequent patch but doing the rename here avoids additional churn. Note reset_tdx_pages() is slightly different from tdx_clear_page() because, more appropriately, it uses mb() in place of __mb(). Except when extra debugging is enabled (kcsan at present), mb() just calls __mb(). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Kirill A. Shutemov <kas@kernel.org> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com> Acked-by: Kai Huang <kai.huang@intel.com> Acked-by: Sean Christopherson <seanjc@google.com> Acked-by: Vishal Annapurve <vannapurve@google.com> Link: https://lore.kernel.org/all/20250819155811.136099-2-adrian.hunter%40intel.com
2025-08-22Merge tag 's390-6.17-3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Alexander Gordeev: - When kernel lockdown is active userspace tools that rely on read operations only are unnecessarily blocked. Fix that by avoiding ioctl registration during lockdown - Invalid NULL pointer accesses succeed due to the lowcore is always mapped the identity mapping pinned to zero. To fix that never map the first two pages of physical memory with identity mapping - Fix invalid SCCB present check in the SCLP interrupt handler - Update defconfigs * tag 's390-6.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/hypfs: Enable limited access during lockdown s390/hypfs: Avoid unnecessary ioctl registration in debugfs s390/mm: Do not map lowcore with identity mapping s390/sclp: Fix SCCB present check s390/configs: Set HZ=1000 s390/configs: Update defconfigs
2025-08-22Merge tag 'for-linus-6.17-rc3-tag' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen fixes from Juergen Gross: "Two small cleanups which are both relevant only when running as a Xen guest" * tag 'for-linus-6.17-rc3-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: drivers/xen/xenbus: remove quirk for Xen 3.x compiler: remove __ADDRESSABLE_ASM{_STR,}() again
2025-08-22arm64: dts: marvell: Minor whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2025-08-22ARM64: dts: mcbin: fix SATA ports on MacchiatobinRussell King (Oracle)
Booting 6.16 on the Macchiatobin, I discover that I can no longer access my disks, and thus the userspace boot fails. The cause appears to be that one of the SATA controllers doesn't have any ports: [ 1.190312] ahci f4540000.sata: supply ahci not found, using dummy regulator [ 1.196255] ahci f4540000.sata: supply phy not found, using dummy regulator [ 1.202026] ahci f4540000.sata: No port enabled This is as a result of the blamed commit below which added a default disabled status to the .dtsi, but didn't properly update the mcbin dtsi file. Fix this regression. Fixes: 30023876aef4 ("arm64: dts: marvell: only enable complete sata nodes") Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2025-08-22ARM: dts: armada-370-db: Fix stereo audio input routing on Armada 370Jihed Chaibi
The simple-audio-card configuration for the Armada 370 development board incorrectly routed the left channel signal ("AIN1L") to both sides of the stereo "In Jack". This commit corrects the typo for the right channel, changing the second "AIN1L" entry to "AIN1R" to enable proper stereo input recording. Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2025-08-22x86/idle: Use MONITORX and MWAITX mnemonics in <asm/mwait.h>Uros Bizjak
Current minimum required version of binutils is 2.30, which supports MONITORX and MWAITX instruction mnemonics. Replace the byte-wise specification of MONITORX and MWAITX with these proper mnemonics. No functional change intended. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/20250616083056.157460-1-ubizjak@gmail.com
2025-08-22x86/entry/fred: Push __KERNEL_CS directlyXin Li (Intel)
Push __KERNEL_CS directly, rather than moving it into RAX and then pushing RAX. No functional changes. Suggested-by: H. Peter Anvin (Intel) <hpa@zytor.com> Signed-off-by: Xin Li (Intel) <xin@zytor.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/20250822071644.1405268-1-xin@zytor.com
2025-08-22arm64: dts: imx95: add fsl,phy-tx-vref-tune-percent tuning properties for ↵Xu Yang
USB3 PHY Add it to improve USB signal quality. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22arm64: dts: imx95: Fix JPEG encoder node assigned clockMarek Vasut
The assigned clock for JPEG encoder IP has to be IMX95_CLK_VPUBLK_JPEG_ENC and not IMX95_CLK_VPUBLK_JPEG_DEC (_ENC at the end, not _DEC). This is a simple copy-paste error, fix it. Fixes: 153c039a7357 ("arm64: dts: imx95: add jpeg encode and decode nodes") Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22ARM: dts: vfxxx: add arm,num-irq-priority-bits for nvicFrank Li
Add arm,num-irq-priority-bits(4) for nvic to fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dtb: interrupt-controller@e000e100 (arm,armv7m-nvic): 'arm,num-irq-priority-bits' is a required property from schema $id: http://devicetree.org/schemas/interrupt-controller/arm,nvic.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22ARM: dts: vf610: add grp surfix to pinctrlFrank Li
Add grp surfix for pinctrl to fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dtb: pinctrl@40048000 (fsl,vf610-iomuxc): i2c0grp-gpio: {'fsl,pins': [[144, 0, 0, 0, 12738, 148, 0, 0, 0, 12738]], 'phandle': 19} is not of type 'array' from schema $id: http://devicetree.org/schemas/gpio/gpio-consumer.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22ARM: dts: vf: Change the NAND controller node nameFabio Estevam
fsl,vf610-nfc.yaml references nand-controller.yaml, which only allows the node to be 'nand-controller'. Change it accordingly to fix the following dt-schema warning: $nodename:0: 'nand@400e0000' does not match '^nand-controller(@.*)?' Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22ARM: dts: vf: Change the pinctrl node nameFabio Estevam
fsl,vf610-iomuxc.yaml references pinctrl.yaml, which only allows the node to be either 'pinctrl' or 'pinmux'. Change the node name to 'pinctrl' to fix the following dt-schema warning: iomuxc@40048000' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$' Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22crypto: hash - Make HASH_MAX_DESCSIZE a bit more obviousHerbert Xu
Move S390_SHA_CTX_SIZE into crypto/hash.h so that the derivation of HASH_MAX_DESCSIZE is less cryptic. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-08-22arm64: dts: freescale: Minor whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' or '{' characters. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22ARM: dts: nxp: imx6ull: Minor whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>