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2025-09-10arm64: dts: allwinner: a527: cubie-a5e: Add ethernet PHY reset settingChen-Yu Tsai
The external Ethernet PHY has a reset pin that is connected to the SoC. It is missing from the original submission. Add it to complete the description. Fixes: acca163f3f51 ("arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board") Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250908181059.1785605-7-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-09-10x86/startup/sev: Document the CPUID flow in the boot #VC handlerTom Lendacky
Document the CPUID reading the different SEV guest types do - the SNP one which relies on the presence of a CPUID table and the SEV-ES one, which reads the CPUID supplied by the hypervisor. The intent being to clarify the two back-to-back, similar CPUID invocations. No functional changes. [ bp: Turn into a proper patch. ] Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/fbb24767-0e06-d1d6-36e0-1757d98aca66@amd.com
2025-09-10fbcon: Use screen info to find primary deviceMario Limonciello (AMD)
On systems with non VGA GPUs fbcon can't find the primary GPU because video_is_primary_device() only checks the VGA arbiter. Add a screen info check to video_is_primary_device() so that callers can get accurate data on such systems. Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Suggested-by: Thomas Zimmermann <tzimmermann@suse.de> Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20250811162606.587759-4-superm1@kernel.org Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
2025-09-10Fix access to video_is_primary_device() when compiled without CONFIG_VIDEOMario Limonciello (AMD)
When compiled without CONFIG_VIDEO the architecture specific implementations of video_is_primary_device() include prototypes and assume that video-common.c will be linked. Guard against this so that the fallback inline implementation that returns false will be used when compiled without CONFIG_VIDEO. Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202506221312.49Fy1aNA-lkp@intel.com/ Link: https://lore.kernel.org/r/20250811162606.587759-2-superm1@kernel.org Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
2025-09-10arm64: versal-net: Describe L1/L2/L3/LLC cachesMichal Simek
Add missing cache layout description. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f740bf2d0af1e7e50d76196ec050c0fdbeceb049.1757338426.git.michal.simek@amd.com
2025-09-10arm64: zynqmp: Enable DP in kr260/kv260 revAMichal Simek
Enable DP output in both CC (Carrier Cards). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/3160658ea2c4dd09a1d68918271177cf55437a8f.1756799774.git.michal.simek@amd.com
2025-09-10arm64: zynqmp: Describe ethernet controllers via aliases on SOMMichal Simek
Add ethernet aliases to CC (Carrier card) description to create a connection which is used by U-BOOT (fdt_fixup_ethernet()) for updating local-mac-address in DT. On Kria SOM MAC address is read from i2c eeprom at start and based on it environment variables are created. Without creating aliases U-Boot is not able to inject local-mac-address DT property and OS won't get the same MAC address unless another i2c read is happening in OS. Also aliases are using string not phandle (because of dtso) that's why full path has to be provided but that shouldn't be a big issue because location of ethernet controller is fixed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/72304150f87fd5e3338e31e2be8cf5d29955cc02.1756799774.git.michal.simek@amd.com
2025-09-10arm64: zynqmp: Revert usb node drive strength and slew rate for zcu106Radhey Shyam Pandey
On a few zcu106 boards USB devices (Dell MS116 USB Optical Mouse, Dell USB Entry Keyboard) are not enumerated on linux boot due to commit 'b8745e7eb488 ("arm64: zynqmp: Fix usb node drive strength and slew rate")'. To fix it as a workaround revert to working version and then investigate at board level why drive strength from 12mA to 4mA and slew from fast to slow is not working. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/85a70cb014ec1f07972fccb60b875596eeaa6b5c.1756799774.git.michal.simek@amd.com
2025-09-10arm64: zynqmp: Disable coresight by defaultQuanyang Wang
When secure-boot mode of bootloader is enabled, the registers of coresight are not permitted to access that's why disable it by default. Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7e308b8efe977c4912079b4d1b1ab3d24908559e.1756799774.git.michal.simek@amd.com
2025-09-10riscv: dts: allwinner: rename devterm i2c-gpio node to comply with bindingConor Dooley
The i2c controller binding does not permit permit the node name to contain "gpio", resulting in two warnings: i2c-gpio-0 (i2c-gpio): $nodename:0: 'i2c-gpio-0' does not match '^i2c(@.+|-[a-z0-9]+)?$' i2c-gpio-0 (i2c-gpio): Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'adc@54' were unexpected) Drop it to satisfy dtbs_check. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250909-frown-wrinkle-f16df243a970@spud Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-09-10um: Fix FD copy size in os_rcv_fd_msg()Tiwei Bie
When copying FDs, the copy size should not include the control message header (cmsghdr). Fix it. Fixes: 5cde6096a4dd ("um: generalize os_rcv_fd") Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: virtio_uml: Fix use-after-free after put_device in probeMiaoqian Lin
When register_virtio_device() fails in virtio_uml_probe(), the code sets vu_dev->registered = 1 even though the device was not successfully registered. This can lead to use-after-free or other issues. Fixes: 04e5b1fb0183 ("um: virtio: Remove device on disconnect") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Don't mark stack executableRichard Weinberger
On one of my machines UML failed to start after enabling SELinux. UML failed to start because SELinux's execmod rule denies executable pages on a modified file mapping. Historically UML marks it's stack rwx. AFAICT, these days this is no longer needed, so let's remove PROT_EXEC. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Remove unused ipi_pipe field from cpuinfo_umTiwei Bie
It's no longer used after the removal of the SMP implementation in TT mode by commit 28fa468f5316 ("um: Remove broken SMP support"). While at it, remove the outdated comment. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Remove unused cpu_data and current_cpu_data macrosTiwei Bie
These two macros have no users. Remove them. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Stop tracking virtual CPUs via mm_cpumask()Tiwei Bie
In UML, each user address space is represented as a separate stub process on the host. Therefore, user address spaces do not require TLB management on UML virtual CPUs, and it's unnecessary to track which virtual CPUs they have executed on. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Centralize stub size calculationsTiwei Bie
Currently, the stub size is calculated in multiple places. Define a macro that performs the calculation so that the code is easier to read and maintain. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Remove outdated comment about STUB_DATA_PAGESTiwei Bie
STUB_DATA_PAGES is no longer required to be a power of two since commit 91f0a0c5cc5b ("um: Calculate stub data address relative to stub code"). Remove the outdated comment. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Remove unused offset and child_err fields from stub_dataTiwei Bie
They are no longer used. Remove them. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Indent time-travel help messagesTiwei Bie
Indent the help messages for time-travel to make them consistent with the format of other help messages. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Fix help message for ssl-non-rawTiwei Bie
Add the missing option name in the help message. Additionally, switch to __uml_help(), because this is a global option rather than a per-channel option. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: vector: Fix indentation for help messageTiwei Bie
For consistency with other help messages, use four spaces for indentation instead of a tab plus a space. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Add missing trailing newline to help messagesTiwei Bie
Some help messages are missing a trailing newline. They should end with two newlines, but only one is present. Add the missing newline to make the --help output more readable. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: virtio-pci: implement .shutdown()Johannes Berg
We don't want queues stopped since the shutdown can still be doing things with PCI devices, so implement .shutdown() to avoid the generic virtio shutdown. Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10um: Support SPARSE_IRQSinan Nalkaya
Motivation: IRQ KUnit tests are going to require CONFIG_SPARSE_IRQ [1] in order to: (a) reliably allocate additional (fake) IRQs and (b) ensure we can test managed affinity, which is only supported with SPARSE_IRQ. It seems that the only thing necessary for ARCH=um is to tell the genirq core to skip over our preallocated NR_IRQS. Tested with: $ ./tools/testing/kunit/kunit.py run [...] [13:55:58] Testing complete. Ran 676 tests: passed: 646, skipped: 30 [...] This compares with pre-patch results: Ran 672 tests: passed: 644, skipped: 28 i.e., we no longer skip tests that 'depend on SPARSE_IRQ', and existing tests all pass. [1] [PATCH v2 4/6] genirq/test: Depend on SPARSE_IRQ https://lore.kernel.org/all/CABVgOSngoD0fh1WEkUCEwSdk0Joypo3dA_Y_SjW+K=nVDnZs3Q@mail.gmail.com/ Signed-off-by: Sinan Nalkaya <sardok@gmail.com> [Brian: Adapted Sinan's patch; rewrote commit message] Signed-off-by: Brian Norris <briannorris@chromium.org> Tested-by: David Gow <davidgow@google.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-09-10KVM: arm64: vgic: fix incorrect spinlock API usageAlok Tiwari
The function vgic_flush_lr_state() is calling _raw_spin_unlock() instead of the proper raw_spin_unlock(). _raw_spin_unlock() is an internal low-level API and should not be used directly; using raw_spin_unlock() ensures proper locking semantics in the vgic code. Fixes: 8fa3adb8c6be ("KVM: arm/arm64: vgic: Make vgic_irq->irq_lock a raw_spinlock") Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com> Acked-by: Marc Zyngier <maz@kernel.org> Message-ID: <20250908180413.3655546-1-alok.a.tiwari@oracle.com> Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: Remove stage 2 read fault checkWei-Lin Chang
In the non-NV case, read permission is always granted when mapping stage-2, so checking for it doesn't bring much. On the other hand, shadow stage-2 for NV guests could potentially have non-readable mappings when we align the permissions with those that L1 set for L2, we shouldn't be checking for read faults in this case either. So just remove this check. Suggested-by: Oliver Upton <oliver.upton@linux.dev> Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Wei-Lin Chang <r09922117@csie.ntu.edu.tw> Link: https://lore.kernel.org/r/20250908064806.4093081-1-r09922117@csie.ntu.edu.tw Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: Fix parameter ordering for VBAR_EL1 assignmentFuad Tabba
The __vcpu_assign_sys_reg() helper expects the register ID as the second argument and the value to be assigned as the third. However, the existing code was passing these parameters in the incorrect order. Fix the function call to properly read the live value of VBAR_EL1 from the guest and update the vCPU value immediately before pending the exception. This ensures the vCPU's value is the same as the guest's and that the exception will be handled at the correct address upon resuming the guest. Fixes: 798eb5978700 ("KVM: arm64: Sync protected guest VBAR_EL1 on injecting an undef exception") Signed-off-by: Fuad Tabba <tabba@google.com> Link: https://lore.kernel.org/r/20250908163557.2419780-1-tabba@google.com Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: nv: Fix incorrect VNCR invalidation range calculationDongha Lee
The code for invalidating VNCR entries in both kvm_invalidate_vncr_ipa() and invalidate_vncr_va() incorrectly uses a bitwise AND with `(size - 1)` instead of `~(size - 1)` to align the start address. This results in masking the address bits instead of aligning them down to the start of the block. This bug may cause stale VNCR TLB entries to remain valid even after a TLBI or MMU notifier, leading to incorrect memory translation and unexpected guest behavior. Credit to Team 0xB6 in bob14: DongHa Lee, Gyujeong Jin, Daehyeon Ko, Geonha Lee, Hyungyu Oh, and Jaewon Yang. Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Dongha Lee <p@sswd.pw> Link: https://lore.kernel.org/r/20250906040724.72960-1-p@sswd.pw Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: vgic-v3: Indicate vgic_put_irq() may take LPI xarray lockOliver Upton
The release path on LPIs is quite rare, meaning it can be difficult to find lock ordering bugs on the LPI xarray's spinlock. Tell lockdep that vgic_put_irq() might acquire the xa_lock to make unsafe patterns more obvious. Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250905100531.282980-7-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: vgic-v3: Don't require IRQs be disabled for LPI xarray lockOliver Upton
Now that releases of LPIs have been unnested from the ap_list_lock there are no xarray writers that exist in a context where IRQs are already disabled. As such we can relax the locking to the non-IRQ disabling spinlock to guard the LPI xarray. Note that there are still readers of the LPI xarray where IRQs are disabled however the readers rely on RCU protection instead of the lock. Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250905100531.282980-6-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: vgic-v3: Erase LPIs from xarray outside of raw spinlocksOliver Upton
syzkaller has caught us red-handed once more, this time nesting regular spinlocks behind raw spinlocks: ============================= [ BUG: Invalid wait context ] 6.16.0-rc3-syzkaller-g7b8346bd9fce #0 Not tainted ----------------------------- syz.0.29/3743 is trying to lock: a3ff80008e2e9e18 (&xa->xa_lock#20){....}-{3:3}, at: vgic_put_irq+0xb4/0x190 arch/arm64/kvm/vgic/vgic.c:137 other info that might help us debug this: context-{5:5} 3 locks held by syz.0.29/3743: #0: a3ff80008e2e90a8 (&kvm->slots_lock){+.+.}-{4:4}, at: kvm_vgic_destroy+0x50/0x624 arch/arm64/kvm/vgic/vgic-init.c:499 #1: a3ff80008e2e9fa0 (&kvm->arch.config_lock){+.+.}-{4:4}, at: kvm_vgic_destroy+0x5c/0x624 arch/arm64/kvm/vgic/vgic-init.c:500 #2: 58f0000021be1428 (&vgic_cpu->ap_list_lock){....}-{2:2}, at: vgic_flush_pending_lpis+0x3c/0x31c arch/arm64/kvm/vgic/vgic.c:150 stack backtrace: CPU: 0 UID: 0 PID: 3743 Comm: syz.0.29 Not tainted 6.16.0-rc3-syzkaller-g7b8346bd9fce #0 PREEMPT Hardware name: linux,dummy-virt (DT) Call trace: show_stack+0x2c/0x3c arch/arm64/kernel/stacktrace.c:466 (C) __dump_stack+0x30/0x40 lib/dump_stack.c:94 dump_stack_lvl+0xd8/0x12c lib/dump_stack.c:120 dump_stack+0x1c/0x28 lib/dump_stack.c:129 print_lock_invalid_wait_context kernel/locking/lockdep.c:4833 [inline] check_wait_context kernel/locking/lockdep.c:4905 [inline] __lock_acquire+0x978/0x299c kernel/locking/lockdep.c:5190 lock_acquire+0x14c/0x2e0 kernel/locking/lockdep.c:5871 __raw_spin_lock_irqsave include/linux/spinlock_api_smp.h:110 [inline] _raw_spin_lock_irqsave+0x5c/0x7c kernel/locking/spinlock.c:162 vgic_put_irq+0xb4/0x190 arch/arm64/kvm/vgic/vgic.c:137 vgic_flush_pending_lpis+0x24c/0x31c arch/arm64/kvm/vgic/vgic.c:158 __kvm_vgic_vcpu_destroy+0x44/0x500 arch/arm64/kvm/vgic/vgic-init.c:455 kvm_vgic_destroy+0x100/0x624 arch/arm64/kvm/vgic/vgic-init.c:505 kvm_arch_destroy_vm+0x80/0x138 arch/arm64/kvm/arm.c:244 kvm_destroy_vm virt/kvm/kvm_main.c:1308 [inline] kvm_put_kvm+0x800/0xff8 virt/kvm/kvm_main.c:1344 kvm_vm_release+0x58/0x78 virt/kvm/kvm_main.c:1367 __fput+0x4ac/0x980 fs/file_table.c:465 ____fput+0x20/0x58 fs/file_table.c:493 task_work_run+0x1bc/0x254 kernel/task_work.c:227 resume_user_mode_work include/linux/resume_user_mode.h:50 [inline] do_notify_resume+0x1b4/0x270 arch/arm64/kernel/entry-common.c:151 exit_to_user_mode_prepare arch/arm64/kernel/entry-common.c:169 [inline] exit_to_user_mode arch/arm64/kernel/entry-common.c:178 [inline] el0_svc+0xb4/0x160 arch/arm64/kernel/entry-common.c:768 el0t_64_sync_handler+0x78/0x108 arch/arm64/kernel/entry-common.c:786 el0t_64_sync+0x198/0x19c arch/arm64/kernel/entry.S:600 This is of course no good, but is at odds with how LPI refcounts are managed. Solve the locking mess by deferring the release of unreferenced LPIs after the ap_list_lock is released. Mark these to-be-released LPIs specially to avoid racing with vgic_put_irq() and causing a double-free. Since references can only be taken on LPIs with a nonzero refcount, extending the lifetime of freed LPIs is still safe. Reviewed-by: Marc Zyngier <maz@kernel.org> Reported-by: syzbot+cef594105ac7e60c6d93@syzkaller.appspotmail.com Closes: https://lore.kernel.org/kvmarm/68acd0d9.a00a0220.33401d.048b.GAE@google.com/ Link: https://lore.kernel.org/r/20250905100531.282980-5-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: Spin off release helper from vgic_put_irq()Oliver Upton
Spin off the release implementation from vgic_put_irq() to prepare for a more involved fix for lock ordering such that it may be unnested from raw spinlocks. This has the minor functional change of doing call_rcu() behind the xa_lock although it shouldn't be consequential. Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250905100531.282980-4-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: vgic-v3: Use bare refcount for VGIC LPIsOliver Upton
KVM's use of krefs to manage LPIs isn't adding much, especially considering vgic_irq_release() is a noop due to the lack of sufficient context. Switch to using a regular refcount in anticipation of adding a meaningful release concept for LPIs. Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250905100531.282980-3-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: VHE: Save and restore host MDCR_EL2 value correctlyAlexandru Elisei
Prior to commit 75a5fbaf6623 ("KVM: arm64: Compute MDCR_EL2 at vcpu_load()"), host MDCR_EL2 was saved correctly: kvm_arch_vcpu_load() kvm_vcpu_load_debug() /* Doesn't touch hardware MDCR_EL2. */ kvm_vcpu_load_vhe() __activate_traps_common() /* Saves host MDCR_EL2. */ *host_data_ptr(host_debug_state.mdcr_el2) = read_sysreg(mdcr_el2) /* Writes VCPU MDCR_EL2. */ write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2) The MDCR_EL2 value saved previously was restored in kvm_arch_vcpu_put() -> kvm_vcpu_put_vhe(). After the aforementioned commit, host MDCR_EL2 is never saved: kvm_arch_vcpu_load() kvm_vcpu_load_debug() /* Writes VCPU MDCR_EL2 */ kvm_vcpu_load_vhe() __activate_traps_common() /* Saves **VCPU** MDCR_EL2. */ *host_data_ptr(host_debug_state.mdcr_el2) = read_sysreg(mdcr_el2) /* Writes VCPU MDCR_EL2 a second time. */ write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2) kvm_arch_vcpu_put() -> kvm_vcpu_put_vhe() then restores the VCPU MDCR_EL2 value. Also VCPU's MDCR_EL2 value gets written to hardware twice now. Fix this by saving the host MDCR_EL2 in kvm_arch_vcpu_load() before it gets overwritten by the VCPU's MDCR_EL2 value, and restore it on VCPU put. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Link: https://lore.kernel.org/r/20250902130833.338216-3-alexandru.elisei@arm.com Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: Initialize PMSCR_EL1 when in VHEAlexandru Elisei
According to the pseudocode for StatisticalProfilingEnabled() from Arm DDI0487L.b, PMSCR_EL1 controls profiling at EL1 and EL0: - PMSCR_EL1.E1SPE controls profiling at EL1. - PMSCR_EL1.E0SPE controls profiling at EL0 if HCR_EL2.TGE=0. These two fields reset to UNKNOWN values. When KVM runs in VHE mode and profiling is enabled in the host, before entering a guest, KVM does not touch any of the SPE registers, leaving the buffer enabled, and it clears HCR_EL2.TGE. As a result, depending on the reset value for the E1SPE and E0SPE fields, KVM might unintentionally profile a guest. Make the behaviour consistent and predictable by clearing PMSCR_EL1 when KVM initialises the host debug configuration. Note that this is not a problem for nVHE, because KVM clears PMSCR_EL1.{E1SPE,E0SPE} before entering the guest. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Link: https://lore.kernel.org/r/20250902130833.338216-2-alexandru.elisei@arm.com Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10KVM: arm64: nv: fix VNCR TLB ASID match logic for non-Global entriesGeonha Lee
kvm_vncr_tlb_lookup() is supposed to return true when the cached VNCR TLB entry is valid for the current context. For non-Global entries, that means the entry’s ASID must match the current ASID. The current code returns true when the ASIDs do *not* match, which inverts the logic. This is a potential vulnerability: - Valid entries are ignored and we fall back to kvm_translate_vncr(), hurting performance. - Mismatched entries are treated as permission faults (-EPERM) instead of triggering a fresh translation. - This can also cause stale translations to be (wrongly) considered valid across address spaces. Flip the predicate so non-Global entries only hit when ASIDs match. Special credit to Team 0xB6 for reporting: DongHa Lee, Gyujeong Jin, Daehyeon Ko, Geonha Lee, Hyungyu Oh, and Jaewon Yang. Signed-off-by: Geonha Lee <w1nsom3gna@korea.ac.kr> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250903150421.90752-1-w1nsom3gna@korea.ac.kr Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-09-10ARM: dts: imx6-aristainetos2: Replace license text comment with SPDX identifierBence Csókás
Replace verbatim license text with a `SPDX-License-Identifier`. The comment header mis-attributes this license to be "X11", but the license text does not include the last line "Except as contained in this notice, the name of the X Consortium shall not be used in advertising or otherwise to promote the sale, use or other dealings in this Software without prior written authorization from the X Consortium.". Therefore, this license is actually equivalent to the SPDX "MIT" license (confirmed by text diffing). Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Bence Csókás <csokas.bence@prolan.hu> Reviewed-by: Heiko Schocher <hs@nabladev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-09-10arm64: dts: amlogic: gxbb-odroidc2: remove UHS capability for SD cardValerio Setti
This is meant to resolve reboot not working on this board. The problem is as follows. In order to be able to switch from HS to UHS mode the bus voltage needs to be reduced from 3.3V down to 1.8V and this is achieved by the "vqmmc-supply" regulator. The ROM bootloader is only able to manage the card in HS mode (3.3V) and the switch HS->UHS happen at boottime in the kernel. The problem appears when the reboot command is issued or watchdog expires because in this case the "vqmmc-supply" voltage is not returned back at 3.3V before rebooting the board so the ROM bootloader will be completely stuck. Therefore this commit removes all UHS modes which would cause "vqmmc-summply" to switch from 3.3V to 1.8V. In terms of performance the main drawback of this commit is limiting the SD card bus speed to HS (25 MB/s) instead of UHS DDR50 (50 MB/s). However this comes with the benefit of being able to reboot the board, so it sounds like a reasonable compromise. Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Valerio Setti <vsetti@baylibre.com> Link: https://lore.kernel.org/r/20250908-fix-reboot-v2-1-354d0e57c855@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-09-10dts: arm: amlogic: fix pwm node for c3Xianwei Zhao
Fix reg address for c3 pwm node. Fixes: be90cd4bd422 ("arm64: dts: amlogic: Add Amlogic C3 PWM") Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20250717-fix-pwm-node-v2-1-7365ac7d5320@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-09-10ARM: dts: aspeed: Drop syscon "reg-io-width" propertiesRob Herring (Arm)
The default width is 4 bytes for "syscon" devices, so "reg-io-width" is redundant and can be dropped. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-09arm64: dts: broadcom: Enable USB devicetree entries for Rpi5Andrea della Porta
RaspberryPi 5 presents two USB 2.0 and two USB 3.0 ports. Configure and enable the USB nodes in the devicetree. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/c6b17f0f896b5cdd790fc10aeb2b76b71df9b58d.1757065053.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-09arm64: dts: broadcom: rp1: Add USB nodesAndrea della Porta
The RaspberryPi 5 has RP1 chipset containing two USB host controller, while presenting two USB 2.0 and two USB 3.0 ports to the outside. Add the relevant USB nodes to the devicetree. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Link: https://lore.kernel.org/r/16d753cb4bf37beb5e9c6f0e03576cf13708f27d.1757065053.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-09riscv: dts: microchip: add a device tree for Discovery KitValentina Fernandez
Add a minimal device tree for the Microchip PolarFire SoC Discovery Kit. The Discovery Kit is a cost-optimized board based on PolarFire SoC MPFS095T and features: - 1 GB DDR4x16 - 1x Gigabit Ethernet - 3x UARTs - Raspberry Pi connector - mikroBus connector - microSD card connector Link: https://www.microchip.com/en-us/development-tool/mpfs-disco-kit Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-09-09riscv: dts: microchip: rename icicle kit ccc clock and other minor fixesValentina Fernandez
Rename the Clock Conditioning Circuit (CCC) reference clock to match the fixed clock bindings naming recommendation. Update the reserved memory regions in the Icicle Kit common dtsi to use lowercase hex and drop the redundant status properties from the memory regions, as they are not required. Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-09-09riscv: dts: microchip: add icicle kit with production deviceValentina Fernandez
With the introduction of the Icicle Kit using the production MPFS250T device, it's necessary to distinguish it from the engineering sample (-es) variant. Engineering samples cannot write to flash from the MSS, as noted in the PolarFire SoC FPGA ES errata. Add a new device tree (mpfs-icicle-kit-prod.dts) for the production board which includes the icicle kit common dtsi and enable the system controller SPI flash, which is only accessible on production silicon. Remove redundant board compatible from fabric dtsi and update board compatibles for v2025.07 release, which includes Mi-V IHC v2 for AMP cluster communication. Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-09-09riscv: dts: microchip: add common board dtsi for icicle kit variantsValentina Fernandez
In preparation for supporting the Icicle Kit with production silicon, add a common board dtsi for the icicle kit with hardware shared by both the engineering sample and production versions. Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-09-09arm64: dts: qcom: x1e80100: Update GPU OPP tableAkhil P Oommen
Update the GPU OPP table with new opp levels along with the speedbin configurations. Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20250701-x1e-speedbin-b4-v2-3-a8a7e06d39fb@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-09arm64: dts: qcom: sm8650: Drop redundant status from PMK8550 RTCKrzysztof Kozlowski
The PMK8550 RTC is always enabled in its DTSI file since commit a791fc19965e ("arm64: dts: qcom: pmk8550: always enable RTC PMIC device"), so drop redundant status=okay in SM8650 boards. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250908085331.56478-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-09arm64: dts: qcom: add initial support for Samsung Galaxy S20Eric Gonçalves
Add new device support for the Samsung Galaxy S20 phone What works (common dtsi): - SimpleFB - Pstore/ramoops - GPIO keys - UFS - USB Signed-off-by: Eric Gonçalves <ghatto404@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250905190931.27481-4-ghatto404@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.51.0) at 2026-10-28 10:38:42 +0000