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2025-10-27arm64: dts: qcom: qcs6490-rb3gen2: Update regulator settingsRakesh Kota
Update min/max voltage settings for regulators below to align with the HW specification vreg_l3b_0p504 vreg_l6b_1p2 vreg_l11b_1p504 vreg_l14b_1p08 vreg_l16b_1p1 vreg_l17b_1p7 vreg_s1c_2p19 vreg_l8c_1p62 vreg_l9c_2p96 vreg_l12c_1p65. While at it, remove RPMH regulator rails (listed below) as these are not to be used on APPS, and any client accidently voting on it can potentially cause issues. vreg_s2b_0p876 vreg_s2c_0p752 vreg_s5c_0p752 vreg_s7c_0p752 vreg_s10c_0p752 vreg_l4b_0p752 vreg_l5b_0p752. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250919-b4-rb3gen2-update-regulator-v1-1-1ea9e70d01cb@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm6350: Add MDSS_CORE reset to mdssLuca Weiss
Like on other platforms, if the OS does not support recovering the state left by the bootloader it needs access to MDSS_CORE, so that it can clear the MDSS configuration. Add a reference to the relevant reset. This also fixes display init on Linux v6.17. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250919-sm6350-mdss-reset-v1-3-48dcac917c73@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27um: Enable SMP support on x86Tiwei Bie
Implement spinlock support for SMP on UML/x86, leveraging x86's spinlock implementation. In addition, to support SMP on CPUs that do not support CX8, some additional work is required. However, considering that such CPUs are already very outdated, and x86 is also removing support for them [1], let's enable SMP support only on CPUs that support CX8. [1] https://lore.kernel.org/lkml/20250515085708.2510123-1-mingo@kernel.org/ Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-9-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: vdso: Remove getcpu support on x86Tiwei Bie
We are going to support SMP on UML/x86, so we can't hard code the CPU and NUMA node in __vdso_getcpu() anymore. Let's just remove it and let applications fall back to the syscall. Suggested-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-7-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Add initial SMP supportTiwei Bie
Add initial symmetric multi-processing (SMP) support to UML. With this support enabled, users can tell UML to start multiple virtual processors, each represented as a separate host thread. In UML, kthreads and normal threads (when running in kernel mode) can be scheduled and executed simultaneously on different virtual processors. However, the userspace code of normal threads still runs within their respective single-threaded stubs. That is, SMP support is currently available both within the kernel and across different processes, but still remains limited within threads of the same process in userspace. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-6-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Define timers on a per-CPU basisTiwei Bie
Define timers on a per-CPU basis to enable each CPU to have its own timer. This is a preparation for adding SMP support. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-5-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Determine sleep based on need_resched()Tiwei Bie
With SMP and NO_HZ enabled, the CPU may still need to sleep even if the timer is disarmed. Switch to deciding whether to sleep based on pending resched. Additionally, because disabling IRQs does not block SIGALRM, it is also necessary to check for any pending timer alarms. This is a preparation for adding SMP support. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-4-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Turn signals_* into thread-local variablesTiwei Bie
Turn signals_enabled, signals_pending and signals_active into thread-local variables. This enables us to control and track signals independently on each CPU thread. This is a preparation for adding SMP support. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-3-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Do not disable kmalloc in initial_thread_cb()Tiwei Bie
Currently, initial_thread_cb() temporarily disables kmalloc when it invokes the callback, allowing the callback to bypass kmalloc. This is unnecessary for the current users of initial_thread_cb(), and we should avoid memory allocations that are not under the control of the UML kernel. Therefore, let's stop temporarily disabling kmalloc in initial_thread_cb(). Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-2-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Remove file-based iomem emulation supportTiwei Bie
The file-based iomem emulation was introduced to support writing paravirtualized drivers based on emulated iomem regions. However, the only driver that makes use of it is an example driver called mmapper, which was written over two decades ago. We now have several modern device emulation mechanisms, such as vhost-user-based virtio-uml. Remove the file-based iomem emulation support to reduce the maintenance burden. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027054519.1996090-5-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Replace UML_ROUND_UP() with PAGE_ALIGN()Tiwei Bie
Although UML_ROUND_UP() is defined in a shared header file, it depends on the PAGE_SIZE and PAGE_MASK macros, so it can only be used in kernel code. Considering its name is not very clear and its functionality is the same as PAGE_ALIGN(), replace its usages with a direct call to PAGE_ALIGN() and remove it. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027054519.1996090-4-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Use PAGE_ALIGN() for address alignmentTiwei Bie
Use PAGE_ALIGN() instead of open-coded calculations. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027054519.1996090-3-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Make host_task_size a local variableTiwei Bie
Currently, host_task_size is a global variable, but it is only used in linux_main() to compute stub_start and task_size. Make it a local variable to limit its scope to where it is actually needed. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027054519.1996090-2-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27arm64: dts: qcom: qcs8300-pmics: Remove 'allow-set-time' propertyTingguo Cheng
Remove the 'allow-set-time' property from the rtc node because APPS is prohibited from setting the hardware RTC time. Signed-off-by: Tingguo Cheng <tingguo.cheng@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250926-remove-rtc-allow-set-time-v1-1-76895a666939@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: rename sm6150 to talosDmitry Baryshkov
SM6150 and QCS615 are two names for the same die, collectively known as 'talos'. Follow the example of other platforms and rename SM6150 to talos.dtsi. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250923-rename-dts-v1-3-21888b68c781@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: rename x1e80100 to hamoaDmitry Baryshkov
The X1E80100 and several other similar names (X1E78100, X1E001DE) all belong to the platform now known as 'hamoa'. Follow the example of 'lemans' and rename the x1e80100.dtsi to hamoa.dtsi and x1e80100-pmics.dtsi to hamoa-pmics.dtsi. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250923-rename-dts-v1-2-21888b68c781@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: rename qcs8300 to monacoDmitry Baryshkov
The QCS8300 and QCS8275 are two variants of the same die with no difference visible to the Linux kernel, which are collectively named as 'monaco'. Rather than trying to using the name, which is not always relevant, follow the example of 'lemans' and rename qcs8300.dtsi to monaco.dtsi (and qcs8300-pmics.dtsi to monaco-pmics.dtsi). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250923-rename-dts-v1-1-21888b68c781@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm6375: add refgen regulatorDmitry Baryshkov
Add the refgen regulator block. It should be used for DSI controllers once they are added. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-14-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc8280xp: add refgen regulatorDmitry Baryshkov
Add the refgen regulator block. It should be used for DSI controllers once they are added. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-13-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcs8300: add refgen regulatorDmitry Baryshkov
Add the refgen regulator block. It should be used for DSI controllers once they are added. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-12-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm8250: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-11-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm8150: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-10-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm6350: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-9-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sdm845: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-8-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sdm670: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-7-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc8180x: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-6-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc7280: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-5-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc7180: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-4-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: lemans: add refgen regulator and use it for DSIDmitry Baryshkov
Add the refgen regulator block and use it for the DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-3-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: lemans: move USB PHYs to a proper placeDmitry Baryshkov
Sort the lemans.dtsi, moving USB1 and USB2 PHYs to a proper place, making the DT file sorted by the address. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-2-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM featureKrishna Chaitanya Chundru
PCIe ECAM(Enhanced Configuration Access Mechanism) feature requires maximum of 256MB configuration space. To enable this feature increase configuration space size to 256MB. If the config space is increased, the BAR space needs to be truncated as it resides in the same location. To avoid the bar space truncation move config space, DBI, ELBI, iATU to upper PCIe region and use lower PCIe iregion entirely for BAR region. This depends on the commit: '10ba0854c5e6 ("PCI: qcom: Disable mirroring of DBI and iATU register space in BAR region")' Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250828-ecam_v4-v8-1-92a30e0fa02d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcs615: Add OSM l3 interconnect provider node and CPU OPP ↵Raviteja Laggyshetty
tables to scale DDR/L3 Add Operation State Manager (OSM) L3 interconnect provide node and OPP tables required to scale DDR and L3 per freq-domain on QCS615 SoC. As QCS615 and SM8150 SoCs have same OSM hardware, added SM8150 compatible as fallback for QCS615 OSM device node. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250819-talos-l3-icc-v3-2-04529e85dac7@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: lemans-evk-camera: Add DT overlayWenmeng Liu
Enable IMX577 via CCI1 on Lemans EVK. Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20250815-rb8_camera-v2-3-6806242913ed@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27x86/um/vdso: Drop VDSO64-y from MakefileThomas Weißschuh
This symbol is unnecessary, remove it. Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Link: https://patch.msgid.link/20251013-uml-vdso-cleanup-v1-4-a079c7adcc69@weissschuh.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27x86/um/vdso: Panic when vDSO can not be allocatedThomas Weißschuh
The vDSO address is added to the userspace auxiliary vectors even if the vDSO was not allocated. When accessing the page, userspace processes will crash. Enforce that the allocation works. Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Link: https://patch.msgid.link/20251013-uml-vdso-cleanup-v1-3-a079c7adcc69@weissschuh.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27x86/um/vdso: Use prototypes from generic vDSO headersThomas Weißschuh
The generic vDSO library provides a convenient header for the vDSO function prototypes, use it. Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Link: https://patch.msgid.link/20251013-uml-vdso-cleanup-v1-2-a079c7adcc69@weissschuh.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27x86/um/vdso: Fix prototype of clock_gettime()Thomas Weißschuh
The clock_gettime() system call takes a pointer to 'struct __kernel_timespec', not 'struct __kernel_old_timespec'. Right now this is not an issue as the vDSO never works with the actual struct but only passes it through to the kernel. Fix the prototype for consistency with the system call. Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Link: https://patch.msgid.link/20251013-uml-vdso-cleanup-v1-1-a079c7adcc69@weissschuh.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: move asm-offsets generation into a single fileJohannes Berg
There's nothing subarch dependent here, and it's odd that includes need to be done in the subarch, and then entries defined in the common file. Simplify the whole thing from three files into one. Link: https://patch.msgid.link/20251007071452.367989-4-johannes@sipsolutions.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um/hostfs: define HOSTFS_ATTR_* via asm-offsetsJohannes Berg
The HOSTFS_ATTR_* values were meant to be standalone for communication between hostfs's kernel and user code parts. However, it's easy to forget that HOSTFS_ATTR_* should be used even on the kernel side, and that wasn't consistently done. As a result, the values need to match ATTR_* values, which is not useful to maintain by hand. Instead, generate them via asm-offsets like other constants that UML needs in user-side code that aren't otherwise available in any header files that can be included there. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Reviewed-by: Hongbo Li <lihongbo22@huawei.com> Link: https://patch.msgid.link/20251007071452.367989-3-johannes@sipsolutions.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: init cpu_tasks[] earlierJohannes Berg
This is currently done in uml_finishsetup(), but e.g. with KCOV enabled we'll crash because some init code can call into e.g. memparse(), which has coverage annotations, and then the checks in check_kcov_mode() crash because current is NULL. Simply initialize the cpu_tasks[] array statically, which fixes the crash. For the later SMP work, it seems to have not really caused any problems yet, but initialize all of the entries anyway. Link: https://patch.msgid.link/20250924113214.c76cd74d0583.I974f691ebb1a2b47915bd2b04cc38e5263b9447f@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27arm64: dts: qcom: lemans: Add missing quirk for HS only USB controllerKrishna Kurapati
The PIPE clock is provided by the USB3 PHY, which is predictably not connected to the HS-only controller. Add "qcom,select-utmi-as-pipe-clk" quirk to HS only USB controller to disable pipe clock requirement. Fixes: de1001525c1a ("arm64: dts: qcom: sa8775p: add USB nodes") Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20251024105019.2220832-3-krishna.kurapati@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: x1e80100: Add missing quirk for HS only USB controllerKrishna Kurapati
The PIPE clock is provided by the USB3 PHY, which is predictably not connected to the HS-only controller. Add "qcom,select-utmi-as-pipe-clk" quirk to HS only USB controller to disable pipe clock requirement. Fixes: 4af46b7bd66f ("arm64: dts: qcom: x1e80100: Add USB nodes") Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20251024105019.2220832-2-krishna.kurapati@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: x1e80100: Fix compile warnings for USB HS controllerKrishna Kurapati
With W=1, the following error comes up: Warning (graph_child_address): /soc@0/usb@a2f8800/usb@a200000/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary This could be since the controller is only HS capable and only one port node is added. Fixes: 4af46b7bd66f ("arm64: dts: qcom: x1e80100: Add USB nodes") Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251019115630.2222720-1-krishna.kurapati@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27Merge tag 'x86_urgent_for_v6.18_rc3' into x86/microcodeBorislav Petkov (AMD)
Pick up the below urgent upstream change in order to base more work ontop: - Correct the last Zen1 microcode revision for which Entrysign sha256 check is needed Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
2025-10-27iommu: Pass in old domain to attach_dev callback functionsNicolin Chen
The IOMMU core attaches each device to a default domain on probe(). Then, every new "attach" operation has a fundamental meaning of two-fold: - detach from its currently attached (old) domain - attach to a given new domain Modern IOMMU drivers following this pattern usually want to clean up the things related to the old domain, so they call iommu_get_domain_for_dev() to fetch the old domain. Pass in the old domain pointer from the core to drivers, aligning with the set_dev_pasid op that does so already. Ensure all low-level attach fcuntions in the core can forward the correct old domain pointer. Thus, rework those functions as well. Suggested-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2025-10-27arm64: dts: mediatek: mt8365-evk: Enable GPU supportLouis-Alexis Eyraud
Enable for the Mediatek Genio 350-EVK board the support of the Arm Mali G52 MC1 GPU integrated in the MT8365 SoC. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-10-27arm64: dts: mediatek: mt8365: Add GPU supportLouis-Alexis Eyraud
The Mediatek MT8365 SoC has an integrated Arm Mali G52 MC1 GPU (Bifrost). Add gpu, OPP table, and MFG clock driver nodes in mt8365.dtsi to support it using the Panfrost driver. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-10-27arm64: dts: mediatek: mt8395-genio-1200-evk: Describe CPU suppliesNícolas F. R. A. Prado
The Genio 1200 EVK board has the big and little CPU clusters fed by the same regulators as MT8195-Cherry boards, so describe them in the same way as commit 17b33dd9e4a3 ("arm64: dts: mediatek: cherry: Describe CPU supplies"). This prevents the system from hanging during boot in the case that the cpufreq-mediatek-hw driver tries to probe before the drivers for the regulators have probed (which happens when using the current defconfig). Fixes: f2b543a191b6 ("arm64: dts: mediatek: add device-tree for Genio 1200 EVK board") Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-10-27arm64: dts: ti: k3-am625: Add OLDI supportAradhya Bhatia
The AM625 SoC has 2 OLDI TXes under the DSS. Add their support. Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> Signed-off-by: Swamil Jain <s-jain1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Link: https://patch.msgid.link/20250913064205.4152249-3-s-jain1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-10-27arm64: dts: ti: k3-am62: Add support for AM625 OLDI IO ControlAradhya Bhatia
Add TI DSS OLDI-IO control registers for AM625 DSS. This is a region of 12 32bit registers found in the TI AM625 CTRL_MMR0 register space[0]. They are used to control the characteristics of the OLDI DATA/CLK IO as needed by the DSS display controller node. [0]: https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> Signed-off-by: Swamil Jain <s-jain1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Link: https://patch.msgid.link/20250913064205.4152249-2-s-jain1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
generated by cgit v1.2.3 (git 2.51.0) at 2026-10-21 22:46:43 +0000