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2024-02-06arm64: dts: qcom: sm8550-qrd: correct WCD9385 TX port mappingKrzysztof Kozlowski
WCD9385 audio codec TX port mapping was copied form HDK8450, but in fact it is offset by one. Correct it to fix recording via analogue microphones. Cc: stable@vger.kernel.org Fixes: 83fae950c992 ("arm64: dts: qcom: sm8550-qrd: add WCD9385 audio-codec") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240124164505.293202-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: sm6350: Add tsens thermal zonesLuca Weiss
Add the definitions for the various thermal zones found on the SM6350 SoC. Hooking up GPU and CPU cooling can limit the clock speeds there to reduce the temperature again to good levels. Most thermal zones only have one critical temperature configured at 125°C which can be mostly considered a placeholder until those zones can be hooked up to cooling. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20240124-sm6350-tsens-v1-1-d37ec82140af@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: sm6115: declare VLS CLAMP register for USB3 PHYDmitry Baryshkov
The USB3 PHY on the SM6115 platform doesn't have built-in PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately via the register in the TCSR space. Declare corresponding register. Fixes: 9dd5f6dba729 ("arm64: dts: qcom: sm6115: Add USB SS qmp phy node") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-6-a950c223f10f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: qcm2290: declare VLS CLAMP register for USB3 PHYDmitry Baryshkov
The USB3 PHY on the QCM2290 platform doesn't have built-in PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately via the register in the TCSR space. Declare corresponding register. Fixes: 0c55f6229bc3 ("arm64: dts: qcom: qcm2290: Add USB3 PHY") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-5-a950c223f10f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: msm8998: declare VLS CLAMP register for USB3 PHYDmitry Baryshkov
The USB3 PHY on the MSM8998 platform doesn't have built-in PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately via the register in the TCSR space. Declare corresponding register. Fixes: 026dad8f5873 ("arm64: dts: qcom: msm8998: Add USB-related nodes") Cc: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-4-a950c223f10f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: sc7280: Update domain-idle-states for cluster sleepMaulik Shah
QCM6490 uses Trustzone as firmware whereas SC7280 uses arm trusted firmware. The PSCI suspend param and the number of domain-idle-states supported is different in Trustzone for cluster sleep. Move the arm trusted firmware supported domain-idle-states in chrome specific sc7280-chrome-common.dtsi and add the Trustzone supported sleep states as default domain-idle-states in sc7280.dtsi Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com> Link: https://lore.kernel.org/r/20240109-qcm6490_cluster_sleep-v2-1-8f94f1ad188d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: sdm630-nile: Enable and configure PM660L WLEDMarijn Suijten
The board-specific (electrical) configuration was removed from PM660L in 90ba636e40cb ("arm64: dts: qcom: pm660l: Remove board-specific WLED configuration") as it is platform-dependent. We reintroduce it here in the Nile board configuration (with a slightly lower current limit, as per downstream DT sources) and enable it for use in the dsi0 node. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20240204-sdm630-nile-wled-v1-1-9f5c4f8147f2@somainline.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: sm8650: add missing qlink_logging reserved memory for mpssNeil Armstrong
The qlink_logging memory region is also used by the modem firmware, add it to the reserved memories and add it to the MPSS memory regions. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20240123-topic-sm8650-upstream-remoteproc-v7-4-61283f50162f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06ARM: qcom: merge remaining subplatforms into sensible Kconfig entryDmitry Baryshkov
Three remaining Qualcomm platforms have special handling of the TEXT_OFFSET to reserve the memory at the beginnig of the system RAM, see the commit 9e775ad19f52 ("ARM: 7012/1: Set proper TEXT_OFFSET for newer MSMs"). This is required for older platforms like IPQ40xx, MSM8x60, MSM8960 and APQ8064 and is compatible with other 32-bit Qualcomm platforms. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231216162700.863456-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06ARM: qcom: drop most of 32-bit ARCH_QCOM subtypesDmitry Baryshkov
Historically we had several subtypes of 32-bit Qualcomm platforms. Nowadays they became just useless symbols in Kconfig. Drop them and pull corresponding clocksource entries towards top-level ARCH_QCOM entry. Note, I've left ARCH_IPQ40XX, ARCH_MSM8x60 and ARCH_MSM8960 in place, since they have special TEXT_OFFSET handling, which can be sorted out separately. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231216162700.863456-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: ipq9574: Enable Inline Crypto Engine for MMCVignesh Viswanathan
Add Inline Crypto Engine reg and clocks in MMC node and enable CQE support as Inline Crypto Engine requires CQE to be enabled. Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com> Link: https://lore.kernel.org/r/20231215095339.3055554-1-quic_viswanat@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100-crd: add WSA8845 speakersKrzysztof Kozlowski
Add nodes for four WSA8845 speakers. Unlike previous boards like SM8550-QRD, this board has four speakers spread over two Soundwire buses instead of two speakers on one bus. Each pair of speakers shares the reset GPIO thus pinctrl property is only in one of them. Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231214131016.30502-5-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100-crd: add WCD9385 Audio CodecKrzysztof Kozlowski
Add Qualcomm Aqstic WCD9385 audio codec on two Soundwire interfaces: RX and TX. Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231214131016.30502-4-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: add Soundwire controllersKrzysztof Kozlowski
Add nodes for LPASS Soundwire v2.0.0 controllers. Difference against SM8550: 1. Update port configs to match reference implementation, 2. LPASS TLMM GPIO14 is not used as WCD_SR_TX_DATA2 pin but as GPIO (camera). Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231214131016.30502-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: add ADSP audio codec macrosKrzysztof Kozlowski
Add the Low Power Audio SubSystem (LPASS) / ADSP audio codec macros on Qualcomm SM8650. The nodes are exactly the same as on SM8550 and SM8650. Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231214131016.30502-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: add LPASS LPI pin controllerKrzysztof Kozlowski
Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin controller device node as part of audio subsystem in Qualcomm X1E80100 SoC. Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231212125632.54021-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: add ADSP GPRKrzysztof Kozlowski
Add the ADSP Generic Packet Router (GPR) device node as part of audio subsystem in Qualcomm X1E80100 SoC. Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231212125632.54021-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06riscv: dts: microchip: add specific compatible for mpfs pdmaShravan Chippa
Add specific compatible for PolarFire SoC for The SiFive PDMA driver Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-02-06KVM: SVM: Return -EINVAL instead of -EBUSY on attempt to re-init SEV/SEV-ESSean Christopherson
Return -EINVAL instead of -EBUSY if userspace attempts KVM_SEV{,ES}_INIT on a VM that already has SEV active. Returning -EBUSY is nonsencial as it's impossible to deactivate SEV without destroying the VM, i.e. the VM isn't "busy" in any sane sense of the word, and the odds of any userspace wanting exactly -EBUSY on a userspace bug are minuscule. Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/r/20240131235609.4161407-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-02-06KVM: SVM: Add support for allowing zero SEV ASIDsAshish Kalra
Some BIOSes allow the end user to set the minimum SEV ASID value (CPUID 0x8000001F_EDX) to be greater than the maximum number of encrypted guests, or maximum SEV ASID value (CPUID 0x8000001F_ECX) in order to dedicate all the SEV ASIDs to SEV-ES or SEV-SNP. The SEV support, as coded, does not handle the case where the minimum SEV ASID value can be greater than the maximum SEV ASID value. As a result, the following confusing message is issued: [ 30.715724] kvm_amd: SEV enabled (ASIDs 1007 - 1006) Fix the support to properly handle this case. Fixes: 916391a2d1dc ("KVM: SVM: Add support for SEV-ES capability in KVM") Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Ashish Kalra <ashish.kalra@amd.com> Cc: stable@vger.kernel.org Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/r/20240104190520.62510-1-Ashish.Kalra@amd.com Link: https://lore.kernel.org/r/20240131235609.4161407-4-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-02-06KVM: SVM: Use unsigned integers when dealing with ASIDsSean Christopherson
Convert all local ASID variables and parameters throughout the SEV code from signed integers to unsigned integers. As ASIDs are fundamentally unsigned values, and the global min/max variables are appropriately unsigned integers, too. Functionally, this is a glorified nop as KVM guarantees min_sev_asid is non-zero, and no CPU supports -1u as the _only_ asid, i.e. the signed vs. unsigned goof won't cause problems in practice. Opportunistically use sev_get_asid() in sev_flush_encrypted_page() instead of open coding an equivalent. Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/r/20240131235609.4161407-3-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-02-06KVM: SVM: Set sev->asid in sev_asid_new() instead of overloading the returnSean Christopherson
Explicitly set sev->asid in sev_asid_new() when a new ASID is successfully allocated, and return '0' to indicate success instead of overloading the return value to multiplex the ASID with error codes. There is exactly one caller of sev_asid_new(), and sev_asid_free() already consumes sev->asid, i.e. returning the ASID isn't necessary for flexibility, nor does it provide symmetry between related APIs. Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/r/20240131235609.4161407-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-02-06x86/kvm: Use separate percpu variable to track the enabling of asyncpfXiaoyao Li
Refer to commit fd10cde9294f ("KVM paravirt: Add async PF initialization to PV guest") and commit 344d9588a9df ("KVM: Add PV MSR to enable asynchronous page faults delivery"). It turns out that at the time when asyncpf was introduced, the purpose was defining the shared PV data 'struct kvm_vcpu_pv_apf_data' with the size of 64 bytes. However, it made a mistake and defined the size to 68 bytes, which failed to make fit in a cache line and made the code inconsistent with the documentation. Below justification quoted from Sean[*] KVM (the host side) has *never* read kvm_vcpu_pv_apf_data.enabled, and the documentation clearly states that enabling is based solely on the bit in the synthetic MSR. So rather than update the documentation, fix the goof by removing the enabled filed and use the separate percpu variable instread. KVM-as-a-host obviously doesn't enforce anything or consume the size, and changing the header will only affect guests that are rebuilt against the new header, so there's no chance of ABI breakage between KVM and its guests. The only possible breakage is if some other hypervisor is emulating KVM's async #PF (LOL) and relies on the guest to set kvm_vcpu_pv_apf_data.enabled. But (a) I highly doubt such a hypervisor exists, (b) that would arguably be a violation of KVM's "spec", and (c) the worst case scenario is that the guest would simply lose async #PF functionality. [*] https://lore.kernel.org/all/ZS7ERnnRqs8Fl0ZF@google.com/T/#u Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Link: https://lore.kernel.org/r/20231025055914.1201792-2-xiaoyao.li@intel.com [sean: use true/false instead of 1/0 for booleans] Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-02-06arm64: dts: qcom: ipq6018: add QUP5 I2C nodeIsaev Ruslan
Add node to support this bus inside of IPQ6018. For example, this bus is used to work with the voltage regulator (mp5496) on the Yuncore AX840 wireless AP. Signed-off-by: Isaev Ruslan <legale.legale@gmail.com> Link: https://lore.kernel.org/r/CACDmYyfOe-jcgj4BAD8=pr08sHpOF=+FRcwrouuLAVsa4+zwtw@mail.gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100-qcp: Fix supplies for LDOs 3E and 2JAbel Vesa
The LDOs 3E and 2J are actually supplied by SMPS 5J. Fix accordingly. Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts") Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-11-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100-qcp: Enable more supportAbel Vesa
Enable display, pcie and usb support. Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-10-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100-crd: Enable more supportAbel Vesa
Enable touchscreen, touchpad, keyboard, display, pcie and usb support. Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-9-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: Add display nodesAbel Vesa
Add the required nodes to support display on X1E80100. Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-8-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: Add PCIe nodesAbel Vesa
Add nodes for PCIe 4 and 6 controllers and their PHYs for X1E80100 platform. Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-7-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: Add USB nodesAbel Vesa
Add nodes for all USB controllers and their PHYs for X1E80100 platform. Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-6-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: Add TCSR nodeAbel Vesa
Add the TCSR clock controller and register space node. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-5-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: Add ADSP/CDSP remoteproc nodesSibi Sankar
Add ADSP and CDSP remoteproc nodes on X1E80100 platforms. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-4-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: Add QMP AOSS nodeSibi Sankar
Add a node for the QMP AOSS. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-3-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: Add SMP2P nodesSibi Sankar
SMP2P is used for interrupting and being interrupted about remoteproc state changes related to the audio, compute and sensor subsystems. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-2-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: x1e80100: Add IPCC nodeSibi Sankar
Add the IPCC node, used to send and receive IPC signals with remoteprocs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-1-2c0e691cfa3b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06arm64: dts: qcom: sa8775p: Add new memory map updates to SA8775PNinad Naik
New memory map layout changes (by Qualcomm firmware) have brought in updates to base addresses and/or size for different memory regions like cpcucp_fw, tz-stat, and also introduces new memory regions for resource manager firmware. The updated memory map also fixes existing issues pertaining to boot up failure while running memtest, thus improving stability. This change brings in these corresponding memory map updates to the device tree for SA8775P SoC platform, which currently is in its development stage. Signed-off-by: Ninad Naik <quic_ninanaik@quicinc.com> Tested-by: Eric Chanudet <echanude@redhat.com> # sa8775p-ride Link: https://lore.kernel.org/r/20240125055134.7015-1-quic_ninanaik@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06x86/sev: Fix position dependent variable references in startup codeArd Biesheuvel
The early startup code executes from a 1:1 mapping of memory, which differs from the mapping that the code was linked and/or relocated to run at. The latter mapping is not active yet at this point, and so symbol references that rely on it will fault. Given that the core kernel is built without -fPIC, symbol references are typically emitted as absolute, and so any such references occuring in the early startup code will therefore crash the kernel. While an attempt was made to work around this for the early SEV/SME startup code, by forcing RIP-relative addressing for certain global SEV/SME variables via inline assembly (see snp_cpuid_get_table() for example), RIP-relative addressing must be pervasively enforced for SEV/SME global variables when accessed prior to page table fixups. __startup_64() already handles this issue for select non-SEV/SME global variables using fixup_pointer(), which adjusts the pointer relative to a `physaddr` argument. To avoid having to pass around this `physaddr` argument across all functions needing to apply pointer fixups, introduce a macro RIP_RELATIVE_REF() which generates a RIP-relative reference to a given global variable. It is used where necessary to force RIP-relative accesses to global variables. For backporting purposes, this patch makes no attempt at cleaning up other occurrences of this pattern, involving either inline asm or fixup_pointer(). Those will be addressed later. [ bp: Call it "rip_rel_ref" everywhere like other code shortens "rIP-relative reference" and make the asm wrapper __always_inline. ] Co-developed-by: Kevin Loughlin <kevinloughlin@google.com> Signed-off-by: Kevin Loughlin <kevinloughlin@google.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Cc: <stable@kernel.org> Link: https://lore.kernel.org/all/20240130220845.1978329-1-kevinloughlin@google.com
2024-02-06riscv: dts: microchip: add missing CAN bus clocksConor Dooley
The CAN controller on PolarFire SoC has an AHB peripheral clock _and_ a CAN bus clock. The bus clock was omitted when the binding was written, but is required for operation. Make up for lost time and add to the DT. Fixes: 38a71fc04895 ("riscv: dts: microchip: add mpfs's CAN controllers") Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-02-06arm64: dts: ti: Makefile: Clarify GPL-2.0 as GPL-2.0-onlyNishanth Menon
SPDX identifier GPL-2.0 has been deprecated since license list version 3.0. Use GPL-2.0-only to be specific. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-17-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: iot2050*: Clarify GPL-2.0 as GPL-2.0-onlyNishanth Menon
SPDX identifier GPL-2.0 has been deprecated since license list version 3.0. Use GPL-2.0-only to be specific. Cc: Chao Zeng <chao.zeng@siemens.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Le Jin <le.jin@siemens.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-16-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: phycore*: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for device trees belonging to PHYTEC Messtechnik GmbH and PHYTEC America, LLC platforms. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the copyright year to sync with current year to indicate license change. Cc: Garrett Giordano <ggiordano@phytec.com> Cc: Wadim Egorov <w.egorov@phytec.de> Acked-by: Garrett Giordano <ggiordano@phytec.com> Acked-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-15-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: beagle*: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for device trees belonging to BeagleBoard.org Foundation platforms. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the copyright year to sync with current year to indicate license change. Cc: Ayush Singh <ayushdevel1325@gmail.com> Cc: Jason Kridner <jkridner@beagleboard.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Robert Nelson <robertcnelson@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Wadim Egorov <w.egorov@phytec.de> Acked-by: Ayush Singh <ayushdevel1325@gmail.com> Acked-by: Jason Kridner <jkridner@beagleboard.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Robert Nelson <robertcnelson@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-14-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: k3-serdes: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-13-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: k3-pinctrl: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-12-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: k3-j784s4: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: Apelete Seketeli <aseketeli@baylibre.com> Cc: Jerome Neanne <jneanne@baylibre.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-11-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: k3-j721s2: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: Esteban Blanc <eblanc@baylibre.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Esteban Blanc <eblanc@baylibre.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-10-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: k3-j721e: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: "Alexander A. Klimov" <grandmaster@al2klimov.de> Cc: Jerome Neanne <jneanne@baylibre.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-9-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: k3-j7200: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: Esteban Blanc <eblanc@baylibre.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Esteban Blanc <eblanc@baylibre.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-8-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: k3-am65: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: "Alexander A. Klimov" <grandmaster@al2klimov.de> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Rob Herring <robh@kernel.org> Cc: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Acked-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-7-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06arm64: dts: ti: k3-am64: Add MIT license along with GPL-2.0Nishanth Menon
Modify license to include dual licensing as GPL-2.0-only OR MIT license for SoC and TI evm device tree files. This allows for Linux kernel device tree to be used in other Operating System ecosystems such as Zephyr or FreeBSD. While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync with latest SPDX conventions (GPL-2.0 is deprecated). While at this, update the TI copyright year to sync with current year to indicate license change (and add it at least for one file which was missing TI copyright). Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Roger Quadros <rogerq@kernel.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Wadim Egorov <w.egorov@phytec.de> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Acked-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Roger Quadros <rogerq@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-6-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>