summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2024-02-21mm: convert mm_counter() to take a folioKefeng Wang
Now all callers of mm_counter() have a folio, convert mm_counter() to take a folio. Saves a call to compound_head() hidden inside PageAnon(). Link: https://lkml.kernel.org/r/20240111152429.3374566-10-willy@infradead.org Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Cc: David Hildenbrand <david@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-02-21s390: use pfn_swap_entry_folio() in ptep_zap_swap_entry()Kefeng Wang
Call pfn_swap_entry_folio() in ptep_zap_swap_entry() as preparation for converting mm counter functions to take a folio. Link: https://lkml.kernel.org/r/20240111152429.3374566-5-willy@infradead.org Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Cc: David Hildenbrand <david@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-02-21s390: enable MHP_MEMMAP_ON_MEMORYSumanth Korikkar
Enable MHP_MEMMAP_ON_MEMORY to support "memmap on memory". memory_hotplug.memmap_on_memory=true kernel parameter should be set in kernel boot option to enable the feature. Link: https://lkml.kernel.org/r/20240108132747.3238763-6-sumanthk@linux.ibm.com Reviewed-by: Gerald Schaefer <gerald.schaefer@linux.ibm.com> Signed-off-by: Sumanth Korikkar <sumanthk@linux.ibm.com> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: David Hildenbrand <david@redhat.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Michal Hocko <mhocko@suse.com> Cc: Oscar Salvador <osalvador@suse.de> Cc: Vasily Gorbik <gor@linux.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-02-21s390/mm: allocate vmemmap pages from self-contained memory rangeSumanth Korikkar
Allocate memory map (struct pages array) from the hotplugged memory range, rather than using system memory. The change addresses the issue where standby memory, when configured to be much larger than online memory, could potentially lead to ipl failure due to memory map allocation from online memory. For example, 16MB of memory map allocation is needed for a memory block size of 1GB and when standby memory is configured much larger than online memory, this could lead to ipl failure. To address this issue, the solution involves introducing "memmap on memory" using the vmem_altmap structure on s390. Architectures that want to implement it should pass the altmap to the vmemmap_populate() function and its associated callchain. This enhancement is discussed in commit 4b94ffdc4163 ("x86, mm: introduce vmem_altmap to augment vmemmap_populate()") Provide "memmap on memory" support for s390 by passing the altmap in vmemmap_populate() and its callchain. The allocation path is described as follows: * When altmap is NULL in vmemmap_populate(), memory map allocation occurs using the existing vmemmap_alloc_block_buf(). * When altmap is not NULL in vmemmap_populate(), memory map allocation still uses vmemmap_alloc_block_buf(), but this function internally calls altmap_alloc_block_buf(). For deallocation, the process is outlined as follows: * When altmap is NULL in vmemmap_free(), memory map deallocation happens through free_pages(). * When altmap is not NULL in vmemmap_free(), memory map deallocation occurs via vmem_altmap_free(). While memory map allocation is primarily handled through the self-contained memory map range, there might still be a small amount of system memory allocation required for vmemmap pagetables. To mitigate this impact, this feature will be limited to machines with EDAT1 support. Link: https://lkml.kernel.org/r/20240108132747.3238763-3-sumanthk@linux.ibm.com Reviewed-by: Gerald Schaefer <gerald.schaefer@linux.ibm.com> Signed-off-by: Sumanth Korikkar <sumanthk@linux.ibm.com> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: David Hildenbrand <david@redhat.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Michal Hocko <mhocko@suse.com> Cc: Oscar Salvador <osalvador@suse.de> Cc: Vasily Gorbik <gor@linux.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-02-21Merge patch series "RISC-V: Fix CONFIG_AS_HAS_OPTION_ARCH with tip of tree LLVM"Palmer Dabbelt
Nathan Chancellor <nathan@kernel.org> says: Eric reported that builds of LLVM with [1] (close to tip of tree) have CONFIG_AS_HAS_OPTION_ARCH=n because the test for expected failure on invalid input has started succeeding. This Kconfig test was added because '.option arch' only causes an assembler warning when it is unsupported, rather than a hard error, which is what users of as-instr expect when something is unsupported. This can be resolved by turning assembler warnings into errors with '-Wa,--fatal-warnings' like we do with the compiler with '-Werror', which is what the first patch does. The second patch removes the invalid test, as the valid test is good enough with fatal warnings. I have diffed several configurations for the different architectures that use as-instr and I have found no issues. [1]: https://github.com/llvm/llvm-project/commit/3ac9fe69f70a2b3541266daedbaaa7dc9c007a2a * b4-shazam-merge: RISC-V: Drop invalid test from CONFIG_AS_HAS_OPTION_ARCH kbuild: Add -Wa,--fatal-warnings to as-instr invocation Link: https://lore.kernel.org/r/20240125-fix-riscv-option-arch-llvm-18-v1-0-390ac9cc3cd0@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2024-02-21ARM: dts: integrator: Fix up VGA connectorLinus Walleij
The bridge does not have any cells on the node level, just on the ports. The VGA connector is actually named "J30" on the board so give it that name in the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-21ARM: dts: versatile: Fix up VGA connectorLinus Walleij
The bridge does not have any cells on the node level, just on the ports. The VGA connector is actually named "J1" on the board so give it that name in the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-21ARM: dts: arm: realview: Fix development chip ROM compatible valueGeert Uytterhoeven
When the development chip ROM was added, the "direct-mapped" compatible value was already obsolete. In addition, the device node lacked the accompanying "probe-type" property, causing the old physmap_of_core driver to fall back to trying all available probe types. Unfortunately this fallback was lost when the DT and pdata cases were merged. Fix this by using the modern "mtd-rom" compatible value instead. Fixes: 5c3f5edbe0a1dff3 ("ARM: realview: add flash devices to the PB1176 DTS") Fixes: 642b1e8dbed7bbbf ("mtd: maps: Merge physmap_of.c into physmap-core.c") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-21x86/apm_32: Remove dead function apm_get_battery_status()Kunwu Chan
This part was commented out 25 years ago in: commit d43c43b46ebfdb437b78206fcc1992c4d2e8c15e Author: linus1 <torvalds@linuxfoundation.org> Date: Tue Sep 7 11:00:00 1999 -0600 Import 2.3.26pre1 and probably no one knows why. Probably it was unused even then. Just remove it. [ bp: Expand commit message. ] Signed-off-by: Kunwu Chan <chentao@kylinos.cn> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20240126030824.579711-1-chentao@kylinos.cn
2024-02-21arm64: defconfig: Enable Wave5 Video Encoder/DecoderBrandon Brnich
Enable Wave521c video decoder/encoder driver on all TI K3 platforms that contain the IP. Signed-off-by: Brandon Brnich <b-brnich@ti.com> Link: https://lore.kernel.org/r/20240220191413.3355007-5-b-brnich@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64/sysreg: Update ID_AA64DFR0_EL1 registerAnshuman Khandual
This updates ID_AA64DFR0_EL1.PMSVer and ID_AA64DFR0_EL1.DebugVer register fields as per the definitions based on DDI0601 2023-12. Cc: Will Deacon <will@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240220034829.3098373-1-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2024-02-21arm64/sysreg: Update ID_DFR0_EL1 register fieldsAnshuman Khandual
This updates ID_DFR0_EL1.PerfMon and ID_DFR0_EL1.CopDbg register fields as per the definitions based on DDI0601 2023-12. Cc: Will Deacon <will@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240220025343.3093955-1-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2024-02-21arm64/sysreg: Add register fields for ID_AA64DFR1_EL1Anshuman Khandual
This adds register fields for ID_AA64DFR1_EL1 as per the definitions based on DDI0601 2023-12. Cc: Will Deacon <will@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240220023203.3091229-1-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2024-02-21Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
Pull kvm fixes from Paolo Bonzini: "Two fixes for ARM ITS emulation. Unmapped interrupts were used instead of ignored, causing NULL pointer dereferences" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: arm64: vgic-its: Test for valid IRQ in MOVALL handler KVM: arm64: vgic-its: Test for valid IRQ in its_sync_lpi_pending_table()
2024-02-21arm64: dts: ti: k3-am62p: Add Wave5 Video Encoder/Decoder NodeBrandon Brnich
This patch adds support for the Wave521cl on the AM62P. Signed-off-by: Brandon Brnich <b-brnich@ti.com> Link: https://lore.kernel.org/r/20240220191413.3355007-4-b-brnich@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-j721s2-main: Add Wave5 Video Encoder/Decoder NodeDarren Etheridge
Add the Chips and Media wave521cl video decoder/encoder node on J721S2. Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Brandon Brnich <b-brnich@ti.com> Link: https://lore.kernel.org/r/20240220191413.3355007-3-b-brnich@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-j784s4: Add Wave5 Video Encoder/Decoder NodeBrandon Brnich
This patch adds support for the Wave521cl on the J784S4-evm. Signed-off-by: Brandon Brnich <b-brnich@ti.com> Link: https://lore.kernel.org/r/20240220191413.3355007-2-b-brnich@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am69-sk: Add support for OSPI flashDasnavis Sabiya
AM69 SK has S28HS512T OSPI flash connected to MCU OSPI0. Enable support for the same. Also describe the partition information according to the offsets in the bootloader. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> Link: https://lore.kernel.org/r/20240220162527.663394-3-sabiya.d@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am69-sk: Enable CAN interfaces for AM69 SK boardDasnavis Sabiya
AM69 SK board has several CAN bus interfaces on both MCU and MAIN domains. This enables the CAN interfaces on MCU and MAIN domain. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> Link: https://lore.kernel.org/r/20240220162527.663394-2-sabiya.d@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: Enable overlays for SK-AM62PJai Luthra
Enable symbols so that overlays can be applied on the base DTB for SK-AM62P. Also compile-test known-to-work camera sensor overlays for OV5640 and IMX219. Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240220-am62p_csi-v2-4-3e71d9945571@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am62p: Add nodes for CSI-RXJai Luthra
AM62P supports image capture via the MIPI CSI-2 protocol, it uses three IPs to achieve this: Cadence DPHY, Cadence CSI-RX, and TI's pixelgrabber wrapper on top. Add nodes for these IPs in the devicetree, and keep them disabled here, so these may be enabled by the sensor overlays. Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240220-am62p_csi-v2-3-3e71d9945571@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am62p: Add DMASS1 for CSIJai Luthra
On AM62P, CSI-RX uses a dedicated BCDMA instance (DMASS1) for transferring captured camera frames to DDR, so enable it. Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240220-am62p_csi-v2-2-3e71d9945571@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am62p: Fix memory ranges for DMSSJai Luthra
The INTR module for DMASS1 (CSI specific DMASS) is outside the currently available ranges, as it starts at 0x4e400000. So fix the ranges property to enable programming the interrupts correctly. Fixes: 29075cc09f43 ("arm64: dts: ti: Introduce AM62P5 family of SoCs") Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240220-am62p_csi-v2-1-3e71d9945571@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR supportVaishnav Achath
J722S EVM has S28HS512T 64 MiB Octal SPI NOR flash connected to the OSPI interface, add support for the flash and describe the partition information as per bootloader. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://lore.kernel.org/r/20240219090435.934383-3-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-02-21arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1Siddharth Vadapalli
Enable MAC Port 1 of CPSW3G instance of CPSW Ethernet Switch in RGMII-RXID mode of operation. Port 2 is not connected on the EVM, thus keep it disabled. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://lore.kernel.org/r/20240219090435.934383-2-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-02-21arm64: dts: ti: k3-j784s4-main: Fix mux-reg-masks in serdes_ln_ctrlChintan Vankar
Change offset in mux-reg-masks property for serdes_ln_ctrl node since reg-mux property is used in compatible. Fixes: 2765149273f4 ("mux: mmio: use reg property when parent device is not a syscon") Signed-off-by: Chintan Vankar <c-vankar@ti.com> Acked-by: Andrew Davis <afd@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20240213080348.248916-1-s-vadapalli@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-j721e: Fix mux-reg-masks in hbmc_muxAndrew Davis
Change offset in mux-reg-masks property for hbmc_mux node since reg-mux property is used in compatible. While here, update the reg region to include 4 bytes as this is a 32bit register. Fixes: 2765149273f4 ("mux: mmio: use reg property when parent device is not a syscon") Suggested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240215141957.13775-1-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: tegra: Use consistent SD/MMC aliases on Tegra234Thierry Reding
Tegra234 boards use a mixture of aliases for the SD/MMC hardware blocks, which can lead to confusion. A common method was to use mmc3 as the alias for the eMMC because "SDMMC3" happens to be the name of the corresponding controller in the reference manual. This isn't a great choice because there is no hardware named SDMMC0, so the mmc0 alias would never get used with that nomenclature and in fact mmc1 and mmc2 wouldn't either in many configurations, thereby creating weird discontiguous enumeration. Instead of trying to match the aliases to the hardware block names, use mmc0 to denote the device's primary SD/MMC controller (typically eMMC) and mmc1 for the secondary SD/MMC controller (typically removable SD). In cases where eMMC is the only controller we can omit the mmc1 alias and if a device has no eMMC, the removable SD card can be aliased to mmc0 instead. Co-developed-by: Russell Xiao <russellx@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-21KVM: s390: introduce kvm_s390_fpu_(store|load)Janosch Frank
It's a bit nicer than having multiple lines and will help if there's another re-work since we'll only have to change one location. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2024-02-21s390: use the correct count for __iowrite64_copy()Jason Gunthorpe
The signature for __iowrite64_copy() requires the number of 64 bit quantities, not bytes. Multiple by 8 to get to a byte length before invoking zpci_memcpy_toio() Fixes: 87bc359b9822 ("s390/pci: speed up __iowrite64_copy by using pci store block insn") Acked-by: Niklas Schnelle <schnelle@linux.ibm.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/0-v1-9223d11a7662+1d7785-s390_iowrite64_jgg@nvidia.com Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2024-02-21arm64: dts: amlogic: add fbx8am DT overlaysPierre-Hugues Husson
Add support for two variants of the fbx8am board. Signed-off-by: Pierre-Hugues Husson <phhusson@freebox.fr> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr> Link: https://lore.kernel.org/r/79ba726d-d02c-44b9-b6f6-59b17ba9755c@freebox.fr [narmstrong: squashed https://lore.kernel.org/all/814c9035-1fda-4cd3-ab3c-95b58e2ecb22@freebox.fr/] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-02-21ARM: dts: gemini: Fix switch node names on Vitesse switchesLinus Walleij
The formally correct node names have "ethernet-*" prefix on switch, ports and port, fix it up. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240211-gemini-dts-v1-4-6c09adeb4c2e@linaro.org
2024-02-21ARM: dts: gemini: Map reset keys to KEY_RESTARTLinus Walleij
This maps the misc "reset", "setup" and "facory reset" keys to the only key a standard userspace is likely to understand: KEY_RESTART. On OpenWrt this will simply restart the system under controlled forms. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240211-gemini-dts-v1-3-6c09adeb4c2e@linaro.org
2024-02-21ARM: dts: gemini: Fix wiligear compatible stringsLinus Walleij
These board strings were deprecated in the bindings ages ago, switch the boards over to the real names. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240211-gemini-dts-v1-2-6c09adeb4c2e@linaro.org
2024-02-21ARM: dts: gemini: Fix switch node names in the DIR-685Linus Walleij
The formally correct node names have "ethernet-*" prefix on switch, ports, port and phy, fix it up. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240211-gemini-dts-v1-1-6c09adeb4c2e@linaro.org
2024-02-21sparc: Fix undefined reference to fb_is_primary_deviceJavier Martinez Canillas
Commit 55bffc8170bb ("fbdev: Split frame buffer support in FB and FB_CORE symbols") added a new FB_CORE Kconfig symbol, that can be enabled to only have fbcon/VT and DRM fbdev emulation, but without support for any legacy fbdev driver. Unfortunately, it missed to change the CONFIG_FB in arch/sparc makefiles, which leads to the following linking error in some sparc64 configurations: sparc64-linux-ld: drivers/video/fbdev/core/fbcon.o: in function `fbcon_fb_registered': >> fbcon.c:(.text+0x4f60): undefined reference to `fb_is_primary_device' Fixes: 55bffc8170bb ("fbdev: Split frame buffer support in FB and FB_CORE symbols") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/r/202401290306.IV8rhJ02-lkp@intel.com/ Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: <stable@vger.kernel.org> # v6.6+ Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20240220095428.3341195-1-javierm@redhat.com
2024-02-21Revert "powerpc/ps3_defconfig: Disable PPC64_BIG_ENDIAN_ELF_ABI_V2"Geoff Levand
This reverts commit 482b718a84f08b6fc84879c3e90cc57dba11c115. The preceding commits by Nicholas Piggin enable PS3 support for ELFv2, so there's no need to disable it for PS3 anymore. Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/983836405df1b6001a2262972fb32d1aee97d6f5.1705654669.git.geoff@infradead.org
2024-02-21powerpc/ps3: Make real stack frames for LV1 hcallsNicholas Piggin
The PS3 hcall assembly code makes ad-hoc stack frames that don't have a back-chain pointer or meet other requirements like minimum frame size. This probably confuses stack unwinders. Give all hcalls a real stack frame. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Tested-by: Geoff Levand <geoff@infradead.org> [mpe: Add missing \ in LV1_2_IN_4_OUT] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231227072405.63751-4-npiggin@gmail.com
2024-02-21powerpc/ps3: lv1 hcall code use symbolic constant for LR save offsetNicholas Piggin
The LRSAVE constant is required for assembly compiled for both 32-bit and 64-bit, because the value differs there. PS3 is 64-bit only so this is a noop, but it is nice to abstract stack frame offsets. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Tested-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231227072405.63751-3-npiggin@gmail.com
2024-02-21powerpc/ps3: Fix lv1 hcall assembly for ELFv2 calling conventionNicholas Piggin
Stack-passed parameters begin at a different offset in the caller's stack in the ELFv2 ABI. Reported-by: Geoff Levand <geoff@infradead.org> Fixes: 8c5fa3b5c4df ("powerpc/64: Make ELFv2 the default for big-endian builds") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Tested-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231227072405.63751-2-npiggin@gmail.com
2024-02-21powerpc/pseries: Set CPU_FTR_DBELL according to ibm,pi-featuresNicholas Piggin
PAPR will define a new ibm,pi-features bit which says that doorbells should not be used even on architectures where they exist. This could be because they are emulated and slower than using the interrupt controller directly for IPIs. Wire this bit into the pi-features parser to clear CPU_FTR_DBELL, and ensure CPU_FTR_DBELL is not in CPU_FTRS_ALWAYS. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Tested-by: Vaibhav Jain <vaibhav@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240207035220.339726-2-npiggin@gmail.com
2024-02-21powerpc/pseries: Add a clear modifier to ibm,pa/pi-features parserNicholas Piggin
When a new ibm,pa/pi-features bit is introduced that is intended to apply to existing systems and features, it may have an "inverted" meaning (i.e., bit clear => feature available; bit set => unavailable). Depending on the nature of the feature, this may give the best backward compatibility result where old firmware will continue to have that bit clear and therefore the feature available. The 'invert' modifier presumably was introduced for this type of feature bit. However it invert will set the feature if the bit is clear, which prevents it being used in the situation where an old CPU lacks a feature that a new CPU has, then a new firmware comes out to disable that feature on the new CPU if the bit is set. Adding an 'invert' entry for that feature would incorrectly enable it for the old CPU. So add a 'clear' modifier that clears the feature if the bit is set, but it does not set the feature if the bit is clear. The feature is expected to be set in the cpu table. This replaces the 'invert' modifier, which is unused since commit 7d4703455168 ("powerpc/feature: Remove CPU_FTR_NODSISRALIGN"). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Tested-by: Vaibhav Jain <vaibhav@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240207035220.339726-1-npiggin@gmail.com
2024-02-21powerpc/perf: Power11 Performance Monitoring supportMadhavan Srinivasan
Base enablement patch to register performance monitoring hardware support for Power11. Most of fields are copied from power10_pmu struct for power11_pmu struct. Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240221044623.1598642-2-mpe@ellerman.id.au
2024-02-21powerpc: Add Power11 architected and raw modeMadhavan Srinivasan
Add CPU table entries for raw and architected mode. Most fields are copied from the Power10 table entries. CPU, MMU and user (ELF_HWCAP) features are unchanged vs P10. However userspace can detect P11 because the AT_PLATFORM value changes to "power11". The logical PVR value of 0x0F000007, passed to firmware via the ibm_arch_vec, indicates the kernel can support a P11 compatible CPU, which means at least ISA v3.1 compliant. Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240221044623.1598642-1-mpe@ellerman.id.au
2024-02-21Merge tag 'kvmarm-fixes-6.8-3' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 fixes for 6.8, take #3 - Check for the validity of interrupts handled by a MOVALL command - Check for the validity of interrupts while reading the pending state on enabling LPIs.
2024-02-21KVM: arm64: vgic-its: Test for valid IRQ in MOVALL handlerOliver Upton
It is possible that an LPI mapped in a different ITS gets unmapped while handling the MOVALL command. If that is the case, there is no state that can be migrated to the destination. Silently ignore it and continue migrating other LPIs. Cc: stable@vger.kernel.org Fixes: ff9c114394aa ("KVM: arm/arm64: GICv4: Handle MOVALL applied to a vPE") Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Link: https://lore.kernel.org/r/20240221092732.4126848-3-oliver.upton@linux.dev Signed-off-by: Marc Zyngier <maz@kernel.org>
2024-02-21KVM: arm64: vgic-its: Test for valid IRQ in its_sync_lpi_pending_table()Oliver Upton
vgic_get_irq() may not return a valid descriptor if there is no ITS that holds a valid translation for the specified INTID. If that is the case, it is safe to silently ignore it and continue processing the LPI pending table. Cc: stable@vger.kernel.org Fixes: 33d3bc9556a7 ("KVM: arm64: vgic-its: Read initial LPI pending table") Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Link: https://lore.kernel.org/r/20240221092732.4126848-2-oliver.upton@linux.dev Signed-off-by: Marc Zyngier <maz@kernel.org>
2024-02-20Merge branch 'for-6.8/cxl-cper' into for-6.8/cxlDan Williams
Pick up CXL CPER notification removal for v6.8-rc6, to return in a later merge window.
2024-02-20um: Convert strscpy() usage to 2-argument styleKees Cook
The ARCH=um build has its own idea about strscpy()'s definition. Adjust the callers to remove the redundant sizeof() arguments ahead of treewide changes, since it needs a manual adjustment for the newly named sized_strscpy() export. Cc: Richard Weinberger <richard@nod.at> Cc: linux-um@lists.infradead.org Signed-off-by: Kees Cook <keescook@chromium.org>
2024-02-20string: Allow 2-argument strscpy()Kees Cook
Using sizeof(dst) for the "size" argument in strscpy() is the overwhelmingly common case. Instead of requiring this everywhere, allow a 2-argument version to be used that will use the sizeof() internally. There are other functions in the kernel with optional arguments[1], so this isn't unprecedented, and improves readability. Update and relocate the kern-doc for strscpy() too, and drop __HAVE_ARCH_STRSCPY as it is unused. Adjust ARCH=um build to notice the changed export name, as it doesn't do full header includes for the string helpers. This could additionally let us save a few hundred lines of code: 1177 files changed, 2455 insertions(+), 3026 deletions(-) with a treewide cleanup using Coccinelle: @needless_arg@ expression DST, SRC; @@ strscpy(DST, SRC -, sizeof(DST) ) Link: https://elixir.bootlin.com/linux/v6.7/source/include/linux/pci.h#L1517 [1] Reviewed-by: Justin Stitt <justinstitt@google.com> Cc: Andy Shevchenko <andy@kernel.org> Cc: linux-hardening@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org>