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2024-07-29arm64: dts: renesas: r8a77970: Add missing iommus propertyGeert Uytterhoeven
Add the missing iommus property to the Frame Compression Processor device node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/41445bdf72a40c9deb36b88e8360b50eb2836919.1720430758.git.geert+renesas@glider.be
2024-07-29arm64: dts: renesas: r8a77965: Add missing iommus propertiesGeert Uytterhoeven
Add missing iommus properties to all Audio-DMAC, Serial-ATA, and Frame Compression Processor device nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/79fe31020799ba508d16ff8dbd4296f239ecf76a.1720430758.git.geert+renesas@glider.be
2024-07-29arm64: dts: renesas: r8a77961: Add missing iommus propertiesGeert Uytterhoeven
Add missing iommus properties to Frame Compression Processor device nodes that still lack them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/25f8764edcb4f83f4dc3acfae36fa1fcbfd10cd7.1720430758.git.geert+renesas@glider.be
2024-07-29arm64: dts: renesas: r8a77960: Add missing iommus propertiesGeert Uytterhoeven
Add missing iommus properties to Frame Compression Processor device nodes that still lack them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/21e6b8dc21d8f1605d1cf5f081811b55e33ce04d.1720430758.git.geert+renesas@glider.be
2024-07-29arm64: dts: renesas: r8a774e1: Add missing iommus propertiesGeert Uytterhoeven
Add missing iommus properties to all Frame Compression Processor device nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/b2a1a5fd41c78c881e6e410b720e5e12572e2668.1720430758.git.geert+renesas@glider.be
2024-07-29arm64: dts: renesas: r8a774c0: Add missing iommus propertiesGeert Uytterhoeven
Add missing iommus properties to all SDHI device nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/299b47bf40d4d2d44beff46b3323c471915c714d.1720430758.git.geert+renesas@glider.be
2024-07-29arm64: dts: renesas: r8a774b1: Add missing iommus propertiesGeert Uytterhoeven
Add missing iommus properties to all Audio-DMAC, SDHI, Serial-ATA, and Frame Compression Processor device nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/2d6a97d2df0532c661a2be6bafc9e5061c645197.1720430758.git.geert+renesas@glider.be
2024-07-29arm64: dts: renesas: r8a774a1: Add missing iommus propertiesGeert Uytterhoeven
Add missing iommus properties to SDHI and Frame Compression Processor device nodes that still lack them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/114e9915356670e59dae412c1054afad4ce4c964.1720430758.git.geert+renesas@glider.be
2024-07-29arm64: dts: renesas: gray-hawk-single: Add Sound supportKuninori Morimoto
Because R-Car V4M supports only 1 SSI, it cannot use Playback/Capture at the same time. Hence select Playback as default. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/87cynvbadm.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-07-29x86/elf: Add a new FPU buffer layout info to x86 core filesVignesh Balasubramanian
Add a new .note section containing type, size, offset and flags of every xfeature that is present. This information will be used by debuggers to understand the XSAVE layout of the machine where the core file has been dumped, and to read XSAVE registers, especially during cross-platform debugging. The XSAVE layouts of modern AMD and Intel CPUs differ, especially since Memory Protection Keys and the AVX-512 features have been inculcated into the AMD CPUs. Since AMD never adopted (and hence never left room in the XSAVE layout for) the Intel MPX feature, tools like GDB had assumed a fixed XSAVE layout matching that of Intel (based on the XCR0 mask). Hence, core dumps from AMD CPUs didn't match the known size for the XCR0 mask. This resulted in GDB and other tools not being able to access the values of the AVX-512 and PKRU registers on AMD CPUs. To solve this, an interim solution has been accepted into GDB, and is already a part of GDB 14, see https://sourceware.org/pipermail/gdb-patches/2023-March/198081.html. But it depends on heuristics based on the total XSAVE register set size and the XCR0 mask to infer the layouts of the various register blocks for core dumps, and hence, is not a foolproof mechanism to determine the layout of the XSAVE area. Therefore, add a new core dump note in order to allow GDB/LLDB and other relevant tools to determine the layout of the XSAVE area of the machine where the corefile was dumped. The new core dump note (which is being proposed as a per-process .note section), NT_X86_XSAVE_LAYOUT (0x205) contains an array of structures. Each structure describes an individual extended feature containing offset, size and flags in this format: struct x86_xfeat_component { u32 type; u32 size; u32 offset; u32 flags; }; and in an independent manner, allowing for future extensions without depending on hw arch specifics like CPUID etc. [ bp: Massage commit message, zap trailing whitespace. ] Co-developed-by: Jini Susan George <jinisusan.george@amd.com> Signed-off-by: Jini Susan George <jinisusan.george@amd.com> Co-developed-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Vignesh Balasubramanian <vigbalas@amd.com> Link: https://lore.kernel.org/r/20240725161017.112111-2-vigbalas@amd.com
2024-07-29Merge drm/drm-next into drm-misc-nextThomas Zimmermann
Backmerging to get a late RC of v6.10 before moving into v6.11. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2024-07-29x86/microcode/AMD: Use the family,model,stepping encoded in the patch IDBorislav Petkov
On Zen and newer, the family, model and stepping is part of the microcode patch ID so that the equivalence table the driver has been using, is not needed anymore. So switch the driver to use that from now on. The equivalence table in the microcode blob should still remain in case there's need to pass some additional information to the kernel loader. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20240725112037.GBZqI1BbUk1KMlOJ_D@fat_crate.local
2024-07-29x86/amd_nb: Add new PCI IDs for AMD family 1Ah model 60hShyam Sundar S K
Add new PCI device IDs into the root IDs and miscellaneous IDs lists to provide support for the latest generation of AMD 1Ah family 60h processor models. Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com> Link: https://lore.kernel.org/r/20240722092801.3480266-1-Shyam-sundar.S-k@amd.com
2024-07-28arm64: dts: qcom: ipq5332: Fix interrupt trigger type for usbVaradarajan Narayanan
Trigger type is incorrectly specified as IRQ_TYPE_EDGE_BOTH instead of IRQ_TYPE_LEVEL_HIGH. This trigger type is not supported for SPIs and results in probe failure with -EINVAL. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Fixes: 927173bf8a0e ("arm64: dts: qcom: Add missing interrupts for qcs404/ipq5332") Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240723100151.402300-3-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: x1e80100-yoga: add wifi calibration variantPatrick Wildt
Describe the bus topology for PCIe domain 4 and add the ath12k calibration variant so that the board file (calibration data) can be loaded. Signed-off-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/ZpV7OeGNIGGpqNC0@windev.fritz.box Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sc8280xp-x13s: clean up PCIe2a pinctrl nodeJohan Hovold
Clean up the PCIe2a pinctrl node indentation which should use tabs only. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240719132522.9176-5-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sc8280xp-x13s: disable PCIe perst pull downsJohan Hovold
Disable the PCIe perst pull-down resistors to save some power. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240719132522.9176-4-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sc8280xp-crd: clean up PCIe2a pinctrl nodeJohan Hovold
Clean up the PCIe2a pinctrl node indentation which should use tabs only. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240719132522.9176-3-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sc8280xp-crd: disable PCIe perst pull downsJohan Hovold
Disable the PCIe perst pull-down resistors to save some power. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240719132522.9176-2-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sm8550-hdk: add the Wifi nodeAmit Pundir
Describe the ath12k WLAN on-board the WCN7850 module present on the board. Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240718125545.2238857-1-amit.pundir@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: msm8916-samsung-grandmax: Add touchscreenLin, Meng-Bo
Grand Max uses an Imagis IST3038 touchscreen that is connected to blsp_i2c5. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo06890@proton.me> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240718112715.6117-1-linmengbo06890@proton.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: {a,i}pq8064: correct clock-names in sata nodeRayyan Ansari
Correct the clock-names in the AHCI SATA controller node to adhere to the bindings. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240717094914.17931-2-rayyan.ansari@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: msm8939-samsung-a7: rename pwm node to conform to dtschemaRayyan Ansari
Rename the pwm node from "pwm-vibrator" to "pwm" to conform to the dt schema. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240716135339.87192-1-rayyan.ansari@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sm8550-qrd: use the PMU to power up bluetoothNeil Armstrong
Change the HW model in sm8550-qrd.dts to a one closer to reality - where the WLAN and Bluetooth modules of the WCN7850 are powered by the PMU inside the package. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240716-topic-sm8x50-upstream-use-pmu-to-power-up-bt-v1-2-67b3755edf6a@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sm8650-hdk: use the PMU to power up bluetoothNeil Armstrong
Change the HW model in sm8650-hdk.dts to a one closer to reality - where the WLAN and Bluetooth modules of the WCN7850 are powered by the PMU inside the package. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240716-topic-sm8x50-upstream-use-pmu-to-power-up-bt-v1-1-67b3755edf6a@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: apq8064: drop reg-names on sata-phy nodeRayyan Ansari
Remove the reg-names property in the sata-phy node as it is not present in the bindings and is not required by the driver. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240715130854.53501-3-rayyan.ansari@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: msm8974pro-samsung-klte: Add pstore nodeBingwu Zhang
Add pstore node to allow for retrieving crash logs. Signed-off-by: Bingwu Zhang <xtexchooser@duck.com> Link: https://lore.kernel.org/r/20240715122201.345426-2-xtex@envs.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: defconfig: Add CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20Stephan Gerhold
This is needed for the display panel to work on the Qualcomm sc7180-trogdor-homestar and x1e80100-crd. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240715-x1e80100-crd-backlight-v2-4-31b7f2f658a3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: ipq4019: adhere to pinctrl dtschemaRayyan Ansari
Pass dtbs_check for qcom,ipq4019-pinctrl.yaml. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240711110545.31641-7-rayyan.ansari@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: ipq8064: adhere to pinctrl dtschemaRayyan Ansari
Pass dtbs_check for qcom,ipq8064-pinctrl.yaml. Also remove invalid "bias-none" property, which I have assumed to mean "bias-disable". Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240711110545.31641-6-rayyan.ansari@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: apq8064: adhere to pinctrl dtschemaRayyan Ansari
Pass dtbs_check for qcom,apq8064-pinctrl.yaml. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240711110545.31641-5-rayyan.ansari@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: asus,nexus7-flo: remove duplicate pinctrl handle in i2c nodesRayyan Ansari
Remove duplicate handle to i2c pins in the device tree, as they are already set in qcom-apq8064.dtsi. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240711110545.31641-4-rayyan.ansari@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: apq8064-pins: correct error in drive-strength propertyRayyan Ansari
The "drive-strength" property was incorrectly spelt as "drive-strengh". Correct this. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240711110545.31641-3-rayyan.ansari@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sa8775p: Mark APPS and PCIe SMMUs as DMA coherentQingqing Zhou
The SMMUs on sa8775p are cache-coherent. GPU SMMU is marked as such, mark the APPS and PCIe ones as well. Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride") Fixes: 2dba7a613a6e ("arm64: dts: qcom: sa8775p: add the pcie smmu node") Cc: stable@vger.kernel.org Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> Rule: add Link: https://lore.kernel.org/stable/20240723075948.9545-1-quic_qqzhou%40quicinc.com Link: https://lore.kernel.org/r/20240725072117.22425-1-quic_qqzhou@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28ARM: dts: qcom: pma8084: add pon nodeRayyan Ansari
Wrap existing pwrkey node inside a pon node, to conform to dt schema. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Link: https://lore.kernel.org/r/20240725-pmic-bindings-v3-3-d7f6007b530d@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: pmi8950: Remove address from lpg nodeRayyan Ansari
Remove the address in both the reg property and node name to adhere to the bindings. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Link: https://lore.kernel.org/r/20240725-pmic-bindings-v3-2-d7f6007b530d@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: pmi8994: Add label to wled nodeRayyan Ansari
Add a label, which is a required property, to the wled node. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Link: https://lore.kernel.org/r/20240725-pmic-bindings-v3-1-d7f6007b530d@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: sa8775p: Add interconnects for ethernetSagar Cheluvegowda
Define interconnect properties for ethernet hardware. Suggested-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Sagar Cheluvegowda <quic_scheluve@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240709-icc_bw_voting_emac_dtsi-v2-1-a1e02c7099a5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: x1e80100-crd: Add LID switchStephan Gerhold
Add gpio-keys for exposing the LID switch state, similar to sc8280xp-lenovo-thinkpad-x13s.dts. Only the GPIO number is different. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Tested-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240710-x1e80100-crd-lid-v1-1-0156e8a62af6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-29treewide: context_tracking: Rename CONTEXT_* into CT_STATE_*Valentin Schneider
Context tracking state related symbols currently use a mix of the CONTEXT_ (e.g. CONTEXT_KERNEL) and CT_SATE_ (e.g. CT_STATE_MASK) prefixes. Clean up the naming and make the ctx_state enum use the CT_STATE_ prefix. Suggested-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Valentin Schneider <vschneid@redhat.com> Acked-by: Frederic Weisbecker <frederic@kernel.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Neeraj Upadhyay <neeraj.upadhyay@kernel.org>
2024-07-28minmax: make generic MIN() and MAX() macros available everywhereLinus Torvalds
This just standardizes the use of MIN() and MAX() macros, with the very traditional semantics. The goal is to use these for C constant expressions and for top-level / static initializers, and so be able to simplify the min()/max() macros. These macro names were used by various kernel code - they are very traditional, after all - and all such users have been fixed up, with a few different approaches: - trivial duplicated macro definitions have been removed Note that 'trivial' here means that it's obviously kernel code that already included all the major kernel headers, and thus gets the new generic MIN/MAX macros automatically. - non-trivial duplicated macro definitions are guarded with #ifndef This is the "yes, they define their own versions, but no, the include situation is not entirely obvious, and maybe they don't get the generic version automatically" case. - strange use case #1 A couple of drivers decided that the way they want to describe their versioning is with #define MAJ 1 #define MIN 2 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) which adds zero value and I just did my Alexander the Great impersonation, and rewrote that pointless Gordian knot as #define DRV_VERSION "1.2" instead. - strange use case #2 A couple of drivers thought that it's a good idea to have a random 'MIN' or 'MAX' define for a value or index into a table, rather than the traditional macro that takes arguments. These values were re-written as C enum's instead. The new function-line macros only expand when followed by an open parenthesis, and thus don't clash with enum use. Happily, there weren't really all that many of these cases, and a lot of users already had the pattern of using '#ifndef' guarding (or in one case just using '#undef MIN') before defining their own private version that does the same thing. I left such cases alone. Cc: David Laight <David.Laight@aculab.com> Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-07-28arm64: dts: qcom: x1e80100: Disable SMB2360_2 by defaultKonrad Dybcio
It's absent on (most?) laptops that only have 2 type-C ports (of which there are quite a few, and coming upstream too). Keep it disabled by default and re-enable it on actual users. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240711-topic-hhh-v1-2-a1b6b716685f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28arm64: dts: qcom: x1e80100: Fix up hex styleKonrad Dybcio
Adhere to the convention: pad the addresses to 8 hex digits and use lowercase letters. Compile tested, no difference. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240711-topic-hhh-v1-1-a1b6b716685f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-28minmax: add a few more MIN_T/MAX_T usersLinus Torvalds
Commit 3a7e02c040b1 ("minmax: avoid overly complicated constant expressions in VM code") added the simpler MIN_T/MAX_T macros in order to avoid some excessive expansion from the rather complicated regular min/max macros. The complexity of those macros stems from two issues: (a) trying to use them in situations that require a C constant expression (in static initializers and for array sizes) (b) the type sanity checking and MIN_T/MAX_T avoids both of these issues. Now, in the whole (long) discussion about all this, it was pointed out that the whole type sanity checking is entirely unnecessary for min_t/max_t which get a fixed type that the comparison is done in. But that still leaves min_t/max_t unnecessarily complicated due to worries about the C constant expression case. However, it turns out that there really aren't very many cases that use min_t/max_t for this, and we can just force-convert those. This does exactly that. Which in turn will then allow for much simpler implementations of min_t()/max_t(). All the usual "macros in all upper case will evaluate the arguments multiple times" rules apply. We should do all the same things for the regular min/max() vs MIN/MAX() cases, but that has the added complexity of various drivers defining their own local versions of MIN/MAX, so that needs another level of fixes first. Link: https://lore.kernel.org/all/b47fad1d0cf8449886ad148f8c013dae@AcuMS.aculab.com/ Cc: David Laight <David.Laight@aculab.com> Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-07-27Merge tag 'devicetree-fixes-for-6.11-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull more devicetree updates from Rob Herring: "Most of this is a treewide change to of_property_for_each_u32() which was small enough to do in one go before rc1 and avoids the need to create of_property_for_each_u32_some_new_name(). - Treewide conversion of of_property_for_each_u32() to drop internal arguments making struct property opaque - Add binding for Amlogic A4 SoC watchdog - Fix constraints for AD7192 'single-channel' property" * tag 'devicetree-fixes-for-6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: iio: adc: ad7192: Fix 'single-channel' constraints of: remove internal arguments from of_property_for_each_u32() dt-bindings: watchdog: add support for Amlogic A4 SoCs
2024-07-27Merge tag 'riscv-for-linus-6.11-mw2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull more RISC-V updates from Palmer Dabbelt: - Support for NUMA (via SRAT and SLIT), console output (via SPCR), and cache info (via PPTT) on ACPI-based systems. - The trap entry/exit code no longer breaks the return address stack predictor on many systems, which results in an improvement to trap latency. - Support for HAVE_ARCH_STACKLEAK. - The sv39 linear map has been extended to support 128GiB mappings. - The frequency of the mtime CSR is now visible via hwprobe. * tag 'riscv-for-linus-6.11-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (21 commits) RISC-V: Provide the frequency of time CSR via hwprobe riscv: Extend sv39 linear mapping max size to 128G riscv: enable HAVE_ARCH_STACKLEAK riscv: signal: Remove unlikely() from WARN_ON() condition riscv: Improve exception and system call latency RISC-V: Select ACPI PPTT drivers riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init() RISC-V: ACPI: Enable SPCR table for console output on RISC-V riscv: boot: remove duplicated targets line trace: riscv: Remove deprecated kprobe on ftrace support riscv: cpufeature: Extract common elements from extension checking riscv: Introduce vendor variants of extension helpers riscv: Add vendor extensions to /proc/cpuinfo riscv: Extend cpufeature.c to detect vendor extensions RISC-V: run savedefconfig for defconfig RISC-V: hwprobe: sort EXT_KEY()s in hwprobe_isa_ext0() alphabetically ACPI: NUMA: replace pr_info with pr_debug in arch_acpi_numa_init ACPI: NUMA: change the ACPI_NUMA to a hidden option ACPI: NUMA: Add handler for SRAT RINTC affinity structure ...
2024-07-27Merge tag 'for-linus-6.11-rc1a-tag' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen fixes from Juergen Gross: "Two fixes for issues introduced in this merge window: - fix enhanced debugging in the Xen multicall handling - two patches fixing a boot failure when running as dom0 in PVH mode" * tag 'for-linus-6.11-rc1a-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: x86/xen: fix memblock_reserve() usage on PVH x86/xen: move xen_reserve_extra_memory() xen: fix multicall debug data referencing
2024-07-27Merge branches 'fixes' and 'misc' into for-linusRussell King (Oracle)
2024-07-26minmax: avoid overly complex min()/max() macro arguments in xenLinus Torvalds
We have some very fancy min/max macros that have tons of sanity checking to warn about mixed signedness etc. This is all things that a sane compiler should warn about, but there are no sane compiler interfaces for this, and '-Wsign-compare' is broken [1] and not useful. So then we compensate (some would say over-compensate) by doing the checks manually with some truly horrid macro games. And no, we can't just use __builtin_types_compatible_p(), because the whole question of "does it make sense to compare these two values" is a lot more complicated than that. For example, it makes a ton of sense to compare unsigned values with simple constants like "5", even if that is indeed a signed type. So we have these very strange macros to try to make sensible type checking decisions on the arguments to 'min()' and 'max()'. But that can cause enormous code expansion if the min()/max() macros are used with complicated expressions, and particularly if you nest these things so that you get the first big expansion then expanded again. The xen setup.c file ended up ballooning to over 50MB of preprocessed noise that takes 15s to compile (obviously depending on the build host), largely due to one single line. So let's split that one single line to just be simpler. I think it ends up being more legible to humans too at the same time. Now that single file compiles in under a second. Reported-and-reviewed-by: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Link: https://lore.kernel.org/all/c83c17bb-be75-4c67-979d-54eee38774c6@lucifer.local/ Link: https://staticthinking.wordpress.com/2023/07/25/wsign-compare-is-garbage/ [1] Cc: David Laight <David.Laight@aculab.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-07-26KVM: guest_memfd: let kvm_gmem_populate() operate only on private gfnsPaolo Bonzini
This check is currently performed by sev_gmem_post_populate(), but it applies to all callers of kvm_gmem_populate(): the point of the function is that the memory is being encrypted and some work has to be done on all the gfns in order to encrypt them. Therefore, check the KVM_MEMORY_ATTRIBUTE_PRIVATE attribute prior to invoking the callback, and stop the operation if a shared page is encountered. Because CONFIG_KVM_PRIVATE_MEM in principle does not require attributes, this makes kvm_gmem_populate() depend on CONFIG_KVM_GENERIC_PRIVATE_MEM (which does require them). Reviewed-by: Michael Roth <michael.roth@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>