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2024-08-22ARM: dts: aspeed: harma: Remove multi-host propertyPeter Yin
Harma is single host, so remove multi-host property. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-7-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add power monitor xdp710Peter Yin
Add HSC xdp710 device in i2c4. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-6-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add ina238Peter Yin
Add INA238 power monitor for Harma fan board. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-5-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add sgpio namePeter Yin
Add power-chassis-control and power-chassis-power for phosphor-power. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-4-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add VR devicesPeter Yin
Add isl69260, xdpe152c4 devices. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-3-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Revise hsc chipPeter Yin
Revise HSC chip name and address to match LTC4287. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-2-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed-g6: Drop cells properties from ethernet nodesAndrew Jeffery
These are not specified in the binding and produce warnings such as the following: arch/arm/boot/dts/aspeed/aspeed-g6.dtsi:254.27-262.5: Warning (avoid_unnecessary_addr_size): /ahb/ethernet@1e670000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property arch/arm/boot/dts/aspeed/aspeed-g6.dtsi:264.27-272.5: Warning (avoid_unnecessary_addr_size): /ahb/ethernet@1e690000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property arch/arm/boot/dts/aspeed/aspeed-ast2600-evb-a1.dtb: ethernet@1e660000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected) Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-7-1cb1378e5fcd@codeconstruct.com.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed-g6: Use generic 'ethernet' for ftgmac100 nodesAndrew Jeffery
Squash warnings such as: arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dtb: ftgmac@1e670000: $nodename:0: 'ftgmac@1e670000' does not match '^ethernet(@.*)?$' Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-6-1cb1378e5fcd@codeconstruct.com.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: Clean up AST2500 pinctrl propertiesAndrew Jeffery
Many platforms were specifying the `aspeed,external-nodes` property required by the AST2500 pinctrl. However, its been specified in the pinctrl node directly in aspeed-g5.dtsi for quite a long time now. Remove the unnecessary override from all relevant platform dts files. Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-5-1cb1378e5fcd@codeconstruct.com.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: Remove undocumented XDMA nodesAndrew Jeffery
There's no binding defined for the device, so remove it from the devicetrees until someone has the motivation to write one. Squash warnings such as: arch/arm/boot/dts/aspeed/aspeed-ast2500-evb.dtb: /ahb/apb@1e6e0000/xdma@1e6e7000: failed to match any schema with compatible: ['aspeed,ast2500-xdma'] Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-4-1cb1378e5fcd@codeconstruct.com.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: Specify required properties for sram nodeAndrew Jeffery
Squash warnings such as: ``` arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: '#address-cells' is a required property from schema $id: http://devicetree.org/schemas/sram/sram.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: '#size-cells' is a required property from schema $id: http://devicetree.org/schemas/sram/sram.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/sram/sram.yaml# ``` Fixes: d44a1138cd82 ("arm/dts: Add Aspeed ast2400 device tree") Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-3-1cb1378e5fcd@codeconstruct.com.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: Specify correct generic compatible for CVICAndrew Jeffery
The ASPEED CVIC binding documents `aspeed,cvic` as the required generic compatible, but the devicetrees contained `aspeed-cvic`. Update the devictrees to use `aspeed,cvic` as documented and as required by the driver implementation. Presumably the bug was the result of some incoherent thoughts while removing the SoC name at the time of writing. Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-2-1cb1378e5fcd@codeconstruct.com.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: Fix coprocessor interrupt controller node nameAndrew Jeffery
Squash schema warnings such as: arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: copro-interrupt-controller@1e6c2000: $nodename:0: 'copro-interrupt-controller@1e6c2000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-1-1cb1378e5fcd@codeconstruct.com.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: mtmitchell: Add LEDsChanh Nguyen
Add LED nodes as the gpio-leds devices. They are led-bmc-ready, led-sw-heartbeat, led-identify, led-fault, led-fan-fault, led-psu-fault Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://lore.kernel.org/r/20240806071806.1666550-6-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: mtmitchell: Enable i2c10 and i2c15Chanh Nguyen
Enable the BMC I2C10. Enable the BMC I2C15 and add the GPIO Expander as a child node. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://lore.kernel.org/r/20240806071806.1666550-5-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: mtmitchell: Add Riser cardsChanh Nguyen
Define the I2C alias ports for the riser cards. Add the i2c muxes to switch to the i2c alias ports and the eeprom nodes to read the FRU contents on riser cards. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://lore.kernel.org/r/20240806071806.1666550-4-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: mtmitchell: Add I2C temperature sensor alias portsChanh Nguyen
Add the I2C alias ports to read temperature sensors via channels of the I2C muxes. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://lore.kernel.org/r/20240806071806.1666550-3-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: mtjade, mtmitchell: Add OCP temperature sensorsChanh Nguyen
Define I2C alias ports from I2C Switch 0x70 at BMC I2C5. Add the tmp421 sensors via the I2C alias ports as OCP device temperature sensors. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://lore.kernel.org/r/20240806071806.1666550-2-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: catalina: add Meta Catalina BMCPotin Lai
Add linux device tree entry for Meta(Facebook) Catalina compute-tray BMC using AT2600 SoC. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240805-potin-catalina-dts-v7-2-286bfd2ab93b@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: add host0-ready pinYang Chen
Add host0-ready pin for phosphor-state-manager. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240711130501.2900301-2-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: Add spi-gpioYang Chen
Add spi-gpio for TPM device. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-18-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: add ltc4287 deviceYang Chen
Enable LTC4287 device on i2c-0. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240626130332.929534-17-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: remove unused power deviceYang Chen
Remove unused power device. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240626130332.929534-16-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: Switch the i2c bus numberYang Chen
Switch the i2c bus number to map the i2c tag according to the hardware design. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-15-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: revise sgpio line nameYang Chen
Revise the SGPIO naming to mapping the SGPIO from the CPLD. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-14-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: add power monitor xdp710Yang Chen
Add HSC xdp710 on i2c bus0. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-13-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: add tmp75 sensorYang Chen
Add tmp75 sensor on the i2c bus connect to each fan board. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-12-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: enable ehci0 for USBYang Chen
Enable ehci0 for USB. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-11-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: add linename of two pinsYang Chen
Add linename of two pins for power good/control. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-10-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: Add adc sensors for fan boardYang Chen
Add ina238 support to read the sensors in front of fans. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-9-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: Define the LEDs node nameYang Chen
Define the LEDs node name. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-8-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: remove unused bus and deviceYang Chen
Remove unused bus and device. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-7-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: enable mdio3Yang Chen
Change usage of I2C bus 11 to mdio3. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-6-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: change RTC referenceYang Chen
Change the RTC reference from on-chip to externel on i2c bus 9 and address is 0x51. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-5-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: add eeprom on i2c busYang Chen
Add eeprom on the i2c-9 address 0x50 and i2c-15 address 0x56. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-4-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: change aliases for uartYang Chen
Change and add aliases name for uart interface. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-3-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: minerva: change the address of tmp75Yang Chen
Revise the address of tmp75 on I2C bus 1 from 0x48 to 0x4f due to design change. Signed-off-by: Yang Chen <yang.chen@quantatw.com> Link: https://lore.kernel.org/r/20240626130332.929534-2-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-21x86/PCI: Check pcie_find_root_port() return for NULLSamasth Norway Ananda
If pcie_find_root_port() is unable to locate a Root Port, it will return NULL. Check the pointer for NULL before dereferencing it. This particular case is in a quirk for devices that are always below a Root Port, so this won't avoid a problem and doesn't need to be backported, but check as a matter of style and to prevent copy/paste mistakes. Link: https://lore.kernel.org/r/20240812202659.1649121-1-samasth.norway.ananda@oracle.com Signed-off-by: Samasth Norway Ananda <samasth.norway.ananda@oracle.com> [bhelgaas: drop Fixes: and explain why there's no problem in this case] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
2024-08-21arm64: dts: qcom: sm8150-mtp: drop incorrect amd,imageonKrzysztof Kozlowski
The SM8150 MTP board does not have magically different GPU than the SM8150, so it cannot use amd,imageon compatible, also pointed by dtbs_check: sm8150-mtp.dtb: gpu@2c00000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,adreno-640.1', 'qcom,adreno', 'amd,imageon'] is too long 'qcom,adreno-640.1' does not match '^qcom,adreno-[0-9a-f]{8}$' 'qcom,adreno-640.1' does not match '^amd,imageon-200\\.[0-1]$' 'amd,imageon' was expected The incorrect amd,imageon compatible was added in commit f30ac26def18 ("arm64: dts: qcom: add sm8150 GPU nodes") to the SM8150 and later moved to the SM8150 MTP board in commit 1642ab96efa4 ("arm64: dts: qcom: sm8150: Don't start Adreno in headless mode") with an intention to allow headless mode. This should be solved via proper driver quirks, not fake compatibles. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240821140116.436441-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-21s390/cpum_sf: Ignore qsi() return codeThomas Richter
qsi() executes the instruction qsi (query sample information) and stores the result of the query in a sample information block pointed to by the function argument. The instruction does not change the condition code register. The return code is always zero. No need to check for errors. Remove now unreferenced macros PMC_FAILURE and RS_INIT_FAILURE_QSI. Signed-off-by: Thomas Richter <tmricht@linux.ibm.com> Acked-by: Sumanth Korikkar <sumanthk@linux.ibm.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2024-08-21s390/cpum_sf: Ignore lsctl() return code in sf_disable()Thomas Richter
sf_disable() returns the condition code of instruction lsctl (load sampling controls). However the parameter to lsctl() in sf_disable() is a sample control block containing all zeroes. This invocation of lsctl() does not fail and returns always zero even when there is no authorization for sampling on the machine. In short, sampling can be always turned off. Ignore the return code of sf_disable() and change the function return to void. Signed-off-by: Thomas Richter <tmricht@linux.ibm.com> Acked-by: Sumanth Korikkar <sumanthk@linux.ibm.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2024-08-21s390/mm: Pin identity mapping base to zeroAlexander Gordeev
SIE instruction performs faster when the virtual address of SIE block matches the physical one. Pin the identity mapping base to zero for the benefit of SIE and other instructions that have similar performance impact. Still, randomize the base when DEBUG_VM kernel configuration option is enabled. Suggested-by: Vasily Gorbik <gor@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2024-08-21s390/mm: Prevent lowcore vs identity mapping overlapAlexander Gordeev
The identity mapping position in virtual memory is randomized together with the kernel mapping. That position can never overlap with the lowcore even when the lowcore is relocated. Prevent overlapping with the lowcore to allow independent positioning of the identity mapping. With the current value of the alternative lowcore address of 0x70000 the overlap could happen in case the identity mapping is placed at zero. This is a prerequisite for uncoupling of randomization base of kernel image and identity mapping in virtual memory. Acked-by: Vasily Gorbik <gor@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2024-08-21powerpc/code-patching: Add boot selftest for data patchingBenjamin Gray
Extend the code patching selftests with some basic coverage of the new data patching variants too. Signed-off-by: Benjamin Gray <bgray@linux.ibm.com> Reviewed-by: Hari Bathini <hbathini@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240515024445.236364-6-bgray@linux.ibm.com
2024-08-21powerpc/32: Convert patch_instruction() to patch_uint()Benjamin Gray
These changes are for patch_instruction() uses on data. Unlike ppc64 these should not be incorrect as-is, but using the patch_uint() alias better reflects what kind of data being patched and allows for benchmarking the effect of different patch_* implementations (e.g., skipping instruction flushing when patching data). Signed-off-by: Benjamin Gray <bgray@linux.ibm.com> Tested-by: Hari Bathini <hbathini@linux.ibm.com> Acked-by: Naveen N Rao <naveen@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240515024445.236364-5-bgray@linux.ibm.com
2024-08-21powerpc/64: Convert patch_instruction() to patch_u32()Benjamin Gray
This use of patch_instruction() is working on 32 bit data, and can fail if the data looks like a prefixed instruction and the extra write crosses a page boundary. Use patch_u32() to fix the write size. Fixes: 8734b41b3efe ("powerpc/module_64: Fix livepatching for RO modules") Link: https://lore.kernel.org/all/20230203004649.1f59dbd4@yea/ Signed-off-by: Benjamin Gray <bgray@linux.ibm.com> Tested-by: Hari Bathini <hbathini@linux.ibm.com> Acked-by: Naveen N Rao <naveen@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240515024445.236364-4-bgray@linux.ibm.com
2024-08-21powerpc/code-patching: Add data patch alignment checkBenjamin Gray
The new data patching still needs to be aligned within a cacheline too for the flushes to work correctly. To simplify this requirement, we just say data patches must be aligned. Detect when data patching is not aligned, returning an invalid argument error. Signed-off-by: Benjamin Gray <bgray@linux.ibm.com> Reviewed-by: Hari Bathini <hbathini@linux.ibm.com> Acked-by: Naveen N Rao <naveen@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240515024445.236364-3-bgray@linux.ibm.com
2024-08-21powerpc/code-patching: Add generic memory patchingBenjamin Gray
patch_instruction() is designed for patching instructions in otherwise readonly memory. Other consumers also sometimes need to patch readonly memory, so have abused patch_instruction() for arbitrary data patches. This is a problem on ppc64 as patch_instruction() decides on the patch width using the 'instruction' opcode to see if it's a prefixed instruction. Data that triggers this can lead to larger writes, possibly crossing a page boundary and failing the write altogether. Introduce patch_uint(), and patch_ulong(), with aliases patch_u32(), and patch_u64() (on ppc64) designed for aligned data patches. The patch size is now determined by the called function, and is passed as an additional parameter to generic internals. While the instruction flushing is not required for data patches, it remains unconditional in this patch. A followup series is possible if benchmarking shows fewer flushes gives an improvement in some data-patching workload. ppc32 does not support prefixed instructions, so is unaffected by the original issue. Care is taken in not exposing the size parameter in the public (non-static) interface, so the compiler can const-propagate it away. Signed-off-by: Benjamin Gray <bgray@linux.ibm.com> Reviewed-by: Hari Bathini <hbathini@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240515024445.236364-2-bgray@linux.ibm.com
2024-08-21powerpc: Remove unused LHZX_BE macroChristophe Leroy
LHZX_BE has been unused since commit dbf44daf7c88 ("bpf, ppc64: remove ld_abs/ld_ind") Remove it. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/fd332b01c47bb9cb6c3af1696a2e109be655f5b5.1724222856.git.christophe.leroy@csgroup.eu
2024-08-20arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodesLing Xu
Add ADSP and CDSP0 fastrpc nodes. Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240819045052.2405511-1-quic_lxu5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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