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2025-12-20Merge tag 'block-6.19-20251218' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux Pull block fixes from Jens Axboe: - ublk selftests for missing coverage - two fixes for the block integrity code - fix for the newly added newly added PR read keys ioctl, limiting the memory that can be allocated - work around for a deadlock that can occur with ublk, where partition scanning ends up recursing back into file closure, which needs the same mutex grabbed. Not the prettiest thing in the world, but an acceptable work-around until we can eliminate the reliance on disk->open_mutex for this - fix for a race between enabling writeback throttling and new IO submissions - move a bit of bio flag handling code. No changes, but needed for a patchset for a future kernel - fix for an init time id leak failure in rnbd - loop/zloop state check fix * tag 'block-6.19-20251218' of git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux: block: validate interval_exp integrity limit block: validate pi_offset integrity limit block: rnbd-clt: Fix leaked ID in init_dev() ublk: fix deadlock when reading partition table block: add allocation size check in blkdev_pr_read_keys() Documentation: admin-guide: blockdev: replace zone_capacity with zone_capacity_mb when creating devices zloop: use READ_ONCE() to read lo->lo_state in queue_rq path loop: use READ_ONCE() to read lo->lo_state without locking block: fix race between wbt_enable_default and IO submission selftests: ublk: add user copy test cases selftests: ublk: add support for user copy to kublk selftests: ublk: forbid multiple data copy modes selftests: ublk: don't share backing files between ublk servers selftests: ublk: use auto_zc for PER_IO_DAEMON tests in stress_04 selftests: ublk: fix fio arguments in run_io_and_recover() selftests: ublk: remove unused ios map in seq_io.bt selftests: ublk: correct last_rw map type in seq_io.bt selftests: ublk: fix overflow in ublk_queue_auto_zc_fallback() block: move around bio flagging helpers
2025-12-19dt-bindings: misc: pci1de4,1: add required reg property for endpointAndrea della Porta
The PCI subsystem links an endpoint Device Tree node to its corresponding pci_dev structure only if the Bus/Device/Function (BDF) encoded in the 'reg' property matches the actual hardware topology. Add the 'reg' property and mark it as required to ensure proper binding between the device_node and the pci_dev. Update the example to reflect this requirement. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/b58bfcd957b2270fcf932d463f2db534b2ae1a6d.1766077285.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-12-19lib/Kconfig.debug: Set the minimum required pahole version to v1.22Ihor Solodrai
Subsequent patches in the series change vmlinux linking scripts to unconditionally pass --btf_encode_detached to pahole, which was introduced in v1.22 [1][2]. This change allows to remove PAHOLE_HAS_SPLIT_BTF Kconfig option and other checks of older pahole versions. [1] https://github.com/acmel/dwarves/releases/tag/v1.22 [2] https://lore.kernel.org/bpf/cbafbf4e-9073-4383-8ee6-1353f9e5869c@oracle.com/ Signed-off-by: Ihor Solodrai <ihor.solodrai@linux.dev> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Tested-by: Alan Maguire <alan.maguire@oracle.com> Acked-by: Eduard Zingerman <eddyz87@gmail.com> Acked-by: Nicolas Schier <nsc@kernel.org> Link: https://lore.kernel.org/bpf/20251219181825.1289460-1-ihor.solodrai@linux.dev
2025-12-19doc : fix a broken link in ext2.rstZiran Zhang
The original link returns a 404, so I update it to the latest accessible url. No functional change to any code, only documentation updates. Signed-off-by: Ziran Zhang <zhangcoder@yeah.net> Link: https://patch.msgid.link/20251217061737.6079-1-zhangcoder@yeah.net Signed-off-by: Jan Kara <jack@suse.cz>
2025-12-19dt-bindings: arm: add CTCU device for monacoJie Gan
The CTCU device for monaco shares the same configurations as SA8775p. Add a fallback to enable the CTCU for monaco to utilize the compitable of the SA8775p. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251103-enable-ctcu-for-monaco-v4-1-92ff83201584@oss.qualcomm.com
2025-12-19Merge drm/drm-next into drm-xe-nextThomas Hellström
Backmerging to bring in 6.19-rc1. An important upstream bugfix and to help unblock PTL CI. Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2025-12-19dt-bindings: interconnect: qcom,sa8775p-rpmh: Fix incorrectly added reg and ↵Krzysztof Kozlowski
clocks Commit 8a55fbe4c94d ("dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p") claims that all interconnects have clocks and MMIO address space, but that is just not true. Only few have. Bindings should restrict properties and should not allow specifying non-existing hardware description, so fix missing constraints for 'reg' and 'clocks'. Fixes: 8a55fbe4c94d ("dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20251129094612.16838-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-12-19regulator: dt-bindings: rt5739: Add compatible for rt8092ChiYuan Huang
Append rt8092 compatible in rt5739 document. Compared to rt5739, RT8092 can offer up to 4A output current. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/9b67b2d2b4268d356f41ae2d0c3202e7813ea6b1.1766125676.git.cy_huang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-19riscv: hwprobe: export Zilsd and Zclsd ISA extensionsPincheng Wang
Export Zilsd and Zclsd ISA extensions through hwprobe. Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Link: https://patch.msgid.link/20250826162939.1494021-4-pincheng.plct@isrc.iscas.ac.cn [pjw@kernel.org: fixed whitespace; updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19dt-bindings: riscv: add Zilsd and Zclsd extension descriptionsPincheng Wang
Add descriptions for the Zilsd (Load/Store pair instructions) and Zclsd (Compressed Load/Store pair instructions) ISA extensions which were ratified in commit f88abf1 ("Integrating load/store pair for RV32 with the main manual") of the riscv-isa-manual. Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250826162939.1494021-2-pincheng.plct@isrc.iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19dt-bindings: crypto: qcom,prng: document x1e80100Harshal Dev
Document x1e80100 compatible for the True Random Number Generator. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-12-18Input: add ABS_SND_PROFILEGergo Koteles
ABS_SND_PROFILE used to describe the state of a multi-value sound profile switch. This will be used for the alert-slider on OnePlus phones or other phones. Profile values added as SND_PROFLE_(SILENT|VIBRATE|RING) identifiers to input-event-codes.h so they can be used from DTS. Signed-off-by: Gergo Koteles <soyer@irl.hu> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Tested-by: Guido Günther <agx@sigxcpu.org> # oneplus,fajita & oneplus,enchilada Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Pavel Machek <pavel@ucw.cz> Link: https://patch.msgid.link/20251113-op6-tri-state-v8-1-54073f3874bc@ixit.cz Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-12-18hwmon: (DS620) Update broken Datasheet URL in driver documentationOkan Akyuz
The URL for the DS620 datasheet has changed. Update it to reflect the current location. Signed-off-by: Okan Akyuz <okan.akyuz.linux@gmail.com> Link: https://lore.kernel.org/r/20251215204423.80242-1-okan.akyuz.linux@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-12-18dt-bindings: memory: SDRAM channel: standardise node nameClément Le Goffic
Add a pattern for sdram channel node name. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com> Link: https://patch.msgid.link/20251118-b4-ddr-bindings-v9-5-a033ac5144da@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-18dt-bindings: memory: add DDR4 channel compatibleClément Le Goffic
Add in the memory channel binding the DDR4 compatible to support DDR4 memory channel. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com> Link: https://patch.msgid.link/20251118-b4-ddr-bindings-v9-4-a033ac5144da@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-18dt-bindings: memory: factorise LPDDR channel binding into SDRAM channelClément Le Goffic
LPDDR, DDR and so SDRAM channels exist and share the same properties, they have a compatible, ranks, and an io-width. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com> Link: https://patch.msgid.link/20251118-b4-ddr-bindings-v9-3-a033ac5144da@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-18dt-bindings: memory: introduce DDR4Clément Le Goffic
Introduce JEDEC compliant DDR bindings, that use new memory-props binding. The DDR4 compatible can be made of explicit vendor names and part numbers or be of the form "ddrX-YYYY,AAAA...-ZZ" when associated with an SPD, where (according to JEDEC SPD4.1.2.L-6): - YYYY is the manufacturer ID - AAAA... is the part number - ZZ is the revision ID The former form is useful when the SDRAM vendor and part number are known, for example, when memory is soldered on the board. The latter form is useful when SDRAM nodes are created at runtime by boot firmware that doesn't have access to static part number information. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251118-b4-ddr-bindings-v9-2-a033ac5144da@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-18dt-bindings: memory: factorise LPDDR props into SDRAM propsClément Le Goffic
LPDDR and DDR bindings are SDRAM types and are likely to share the same properties (at least for density, io-width and reg). To avoid bindings duplication, factorise the properties. The compatible description has been updated because the MR (Mode registers) used to get manufacturer ID and revision ID are not present in case of DDR. Those information should be in a SPD (Serial Presence Detect) EEPROM in case of DIMM module or are known in case of soldered memory chips as they are in the datasheet of the memory chips. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com> Link: https://patch.msgid.link/20251118-b4-ddr-bindings-v9-1-a033ac5144da@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-18dt-bindings: gpio-mmio: Add compatible string for opencores,gpioStafford Horne
In FPGA Development boards with GPIOs we use the opencores gpio verilog rtl. This is compatible with the gpio-mmio. Add the compatible string to allow as below. Example: gpio0: gpio@91000000 { compatible = "opencores,gpio", "brcm,bcm6345-gpio"; reg = <0x91000000 0x1>, <0x91000001 0x1>; reg-names = "dat", "dirout"; gpio-controller; #gpio-cells = <2>; status = "okay"; }; Link: https://opencores.org/projects/gpio Signed-off-by: Stafford Horne <shorne@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20251217080843.70621-2-shorne@gmail.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2025-12-18dt-binding: Update oss email address for Coresight documentsJie Gan
Update the OSS email addresses across all Coresight documents, as the previous addresses have been deprecated. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250902042143.1010-1-jie.gan@oss.qualcomm.com
2025-12-18dt-bindings: gpio: gpio-pca95xx: Add tcal6408 and tcal6416Jan Remmet
TCAL6408 and TCAL6416 supports latchable inputs and maskable interrupt. add compatibles ti,tcal6408 and ti,tcal6416 The TI variants has the same programming model as the NXP PCAL6408 and PCAL6416, but supports other supply voltages. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Jan Remmet <j.remmet@phytec.de> Link: https://lore.kernel.org/r/20251216-wip-jremmet-tcal6416rtw-v2-2-6516d98a9836@phytec.de Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2025-12-18Documentation: gpio: add TCAL6408 and TCAL6416Jan Remmet
Checked datasheets, the offsets are identical to pcal6408 and pcal6416. Signed-off-by: Jan Remmet <j.remmet@phytec.de> Link: https://lore.kernel.org/r/20251216-wip-jremmet-tcal6416rtw-v2-1-6516d98a9836@phytec.de Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2025-12-18media: vb2: drop wait_prepare/finish callbacksHans Verkuil
Drop the wait_prepare/finish callbacks. Instead require that the vb2_queue lock field is always set and use that lock when waiting for buffers to arrive. Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2025-12-18media: vb2: remove vb2_ops_wait_prepare/finish helpersHans Verkuil
Since vb2 now relies on the presence of the vb2_queue lock field and there are no more drivers that use these helpers, it is safe to drop them. Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2025-12-18spi: atcspi200: Add support for Andes ATCSPI200 SPIMark Brown
Merge series from CL Wang <cl634@andestech.com>: This series adds support for the Andes ATCSPI200 SPI controller.
2025-12-18Add support for NXP XSPIMark Brown
Merge series from Haibo Chen <haibo.chen@nxp.com>: XSPI is a flexible SPI host controller which supports up to 2 external devices (2 CS). It support Single/Dual/Quad/Octal mode data transfer. The difference between XSPI and Flexspi is XSPI support multiple independent execution environments (EENVs) for HW virtualization with some limitations. Each EENV has its own interrupt and its own set of programming registers that exists in a specific offset range in the XSPI memory map. The main environment (EENV0) address space contains all of the registers for controlling EENV0 plus all of the general XSPI control and programming registers. The register mnemonics for the user environments (EENV1 to EENV4) have "_SUB_n" appended to the mnemonic for the corresponding main-environment register. Current driver based on EENV0, which means system already give EENV0 right to linux. This driver use SPI memory interface of the SPI framework to issue flash memory operations. Tested this driver with mtd_debug and UBIFS on NXP i.MX943 EVK board which has one MT35XU512ABA spi nor flash. NOw this driver has the following key features: - Support up to OCT DDR mode - Support AHB read - Support IP read and IP write - Support two CS
2025-12-17dt-bindings: sram: Document qcom,kaanapali-imem and its child nodeJingyi Wang
On Qualcomm Kaanapali platform, IMEM is a block of SRAM shared across multiple IP blocks which can falk back to "mmio-sram". Documnent it and its child node "qcom,pil-reloc-info" which is used for collecting remoteproc ramdumps. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251123-knp-soc-binding-v4-1-42b349a66c59@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-17dt-bindings: interrupt-controller: qcom,pdc: Document Kaanapali Power Domain ↵Jingyi Wang
Controller Add a compatible for the Power Domain Controller on Kaanapali platforms. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20251021-knp-pdc-v2-1-a38767f5bb8e@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-17dt-bindings: arm: qcom: Document Kaanapali SoC and its reference boardsJingyi Wang
Document the Kaanapali SoC binding and the boards which use it. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251215-knp-dts-v4-1-1541bebeb89f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-17tee: Adapt documentation to cover recent additionsUwe Kleine-König
The previous commits introduced some helpers to reduce boilerplate and bus specific callbacks for probe and remove. Adapt the reference example to make use of these. Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2025-12-17dt-bindings: kbuild: Support single binding targetsRob Herring (Arm)
Running the full 'make dt_binding_check' is slow. A shortcut is to set DT_SCHEMA_FILES env variable to a substring of DT schema files to test. It both limits which examples are validated and which schemas are used to validate the examples. This is a problem because errors from other schemas are missed. What makes validation slow is checking all examples, so we really just need a way to test a single example. Add a %.yaml target to validate the schema and validate the example: make example-schema.yaml The behavior for 'make dt_binding_check DT_SCHEMA_FILES=example-schema' is unchanged. Really it should mirror dtbs_check and validate all the examples with a subset of schemas, but there are lots of users of expecting the existing behavior. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251208224304.2907913-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-12-17dt-bindings: serial: renesas,rsci: Document RZ/G3E supportBiju Das
Add documentation for the serial communication interface (RSCI) found on the Renesas RZ/G3E (R9A09G047) SoC. The RSCI IP on this SoC is identical to that on the RZ/T2H (R9A09G077) SoC, but it has a 32-stage FIFO compared to 16 on RZ/T2H. It supports both FIFO and non-FIFO mode operation. RZ/G3E has 6 clocks(5 module clocks + 1 external clock) compared to 3 clocks (2 module clocks + 1 external clock) on RZ/T2H, and it has multiple resets. It has 6 interrupts compared to 4 on RZ/T2H. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20251129164325.209213-2-biju.das.jz@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-12-17dt-bindings: usb: ehci/ohci: Allow "dma-coherent"Rob Herring (Arm)
EHCI and OHCI controllers can be DMA coherent on some platforms, so allow the "dma-coherent" property. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251215212515.3318052-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-12-17usb: gadget: f_midi: allow customizing the USB MIDI interface string through ↵Victor Krawiec
configfs When using f_midi from configfs the USB MIDI interface string is hardcoded to 'MIDI function'. This USB string descriptor is used by some third-party OS or software to display the name of the MIDI device Since we add an additional string option a new macro block was created to factorize declarations Signed-off-by: Victor Krawiec <victor.krawiec@arturia.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20251209164006.143219-1-victor.krawiec@arturia.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-12-17dt-bindings: usb: aspeed,usb-vhub: Add ast2700 supportRyan Chen
Add the "aspeed,ast2700-usb-vhub" compatible. The ast2700 vhub controller requires an reset, so make the "resets" property mandatory for this compatible to reflect the hardware requirement. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251128-upstream_vhub-v2-1-1fa66a5833c2@aspeedtech.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-12-17spi: dt-bindings: Add support for ATCSPI200 SPI controllerCL Wang
Document devicetree bindings for the Andes ATCSPI200 SPI controller. Signed-off-by: CL Wang <cl634@andestech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251215132349.513843-2-cl634@andestech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17spi: dt-bindings: nxp,imx94-xspi: Document imx94 xspiHaibo Chen
Document imx94 xspi that supports interface to serial flash supporting following features: - Single-bit SPI, Dual SPI, Quad SPI and Octal SPI. - Single Data Rate or Double Data Rate modes. - Direct memory mapping of all AHB memory accesses to the chip system memory space. - Multi-master AHB accesses with priority. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://patch.msgid.link/20251216-xspi-v7-1-282525220979@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17spi: dt-bindings: snps,dw-abp-ssi: Allow up to 16 chip-selectsRob Herring (Arm)
At least the Microchip Sparx5 supports up to 16 chip-selects, so increase the maximum. The pattern for the child unit-address was unconstrained, so update it to match the maximum number of chip-selects. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251215230323.3634112-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17dt-bindings: eeprom: at24: Add compatible for Giantec GT24P64ALuca Weiss
Add the compatible for another 64Kb EEPROM from Giantec. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20251210-fp4-cam-prep-v1-1-0eacbff271ec@fairphone.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2025-12-17dt-bindings: eeprom: at24: Add compatible for Belling BL24C04A/BL24C16FFUKAUMI Naoki
Add the compatible for Belling BL24C04A 4Kb EEPROM and BL24C16F 16Kb EEPROM. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251202084941.1785-2-naoki@radxa.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2025-12-16dt-bindings: arm: qcom: Add Medion SPRCHRGD deviceGeorg Gottleuber
Introduce new binding for the Medion SPRCHRGD 14 S1 notebook with X1E78100 SoC. Signed-off-by: Georg Gottleuber <ggo@tuxedocomputers.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251204155212.230058-5-ggo@tuxedocomputers.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-16dt-bindings: vendor-prefixes: Add Medion AGGeorg Gottleuber
Add Medion AG, a German electronics company, to the list of vendor prefixes. Link: https://www.medion.com/ Signed-off-by: Georg Gottleuber <ggo@tuxedocomputers.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251204155212.230058-4-ggo@tuxedocomputers.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-16dt-bindings: arm: qcom: Add TUXEDO Computers deviceGeorg Gottleuber
Introduce new binding for the TUXEDO Elite 14 Gen1 laptop with X1E78100 SoC. Signed-off-by: Georg Gottleuber <ggo@tuxedocomputers.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20251204155212.230058-3-ggo@tuxedocomputers.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-16dt-bindings: vendor-prefixes: Add prefix for TUXEDO Computers GmbHGeorg Gottleuber
TUXEDO Computers GmbH is a German supplier for computers. Signed-off-by: Georg Gottleuber <ggo@tuxedocomputers.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20251204155212.230058-2-ggo@tuxedocomputers.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-17dt-bindings: i2c: qcom-cci: Document SM8750 compatibleHangxiang Ma
Add SM8750 compatible consistent with CAMSS CCI interfaces. Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251126-add-support-for-camss-on-sm8750-v1-1-646fee2eb720@oss.qualcomm.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-12-17i2c: i801: Add support for Intel Nova Lake-SJarkko Nikula
Add SMBus PCI IDs on Intel Nova Lake-S. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251124132816.470599-1-heikki.krogerus@linux.intel.com
2025-12-17dt-bindings: i2c: dw: Add Mobileye I2C controllersBenoît Monin
Add compatible string for the DesignWare-based I2C controllers present in Mobileye Eyeq6Lplus SoC, with a fallback to the default compatible. The same controllers are also present in the EyeQ7H, so add a compatible for those with a fallback to the Eyeq6Lplus compatible. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251126-i2c-dw-v4-1-b0654598e7c5@bootlin.com
2025-12-16dt-bindings: cache: qcom,llcc: Document Glymur LLCC blockPankaj Patil
Document the Last Level Cache Controller on Glymur SoC Glymur LLCC has 12 base register regions and an additional AND, OR broadcast region, total 14 register regions Increase maxItems for reg and reg-names to allow 14 entries for Glymur Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251211-glymur_llcc_enablement-v3-1-43457b354b0d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-16dt-bindings: Updates Linus Walleij's mail addressLinus Walleij
My name is stamped into maintainership for a big slew of DT bindings. Now that it is changing, switch it over to my kernel.org mail address, which will hopefully be stable for the rest of my life. Signed-off-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20251216-maintainers-dt-v1-1-0b5ab102c9bb@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-12-16docs: dmaengine: add explanation for phys field in dma_async_tx_descriptor ↵Bhanu Seshu Kumar Valluri
structure Describe the need to initialize the phys field in the dma_async_tx_descriptor structure during its initialization. Signed-off-by: Bhanu Seshu Kumar Valluri <bhanuseshukumar@gmail.com> Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com> Link: https://patch.msgid.link/20251113064937.8735-1-bhanuseshukumar@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit v1.2.3 (git 2.51.0) at 2026-10-18 12:14:40 +0000