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2025-11-19Merge tag 'pwm/for-6.18-rc7-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux Pull pwm fix from Uwe Kleine-König: "Correct mismatched pwm chip info for adp5585. Luke Wang found a problem in the pwm-adp5585 driver about how register information is mapped to the different device variants. This effectively made the driver non-functional. That didn't pop up before because the driver change was developed as part of a bigger mfd series and the original author didn't retest PWM functionality after it was tested in an earlier revision but then reworked" * tag 'pwm/for-6.18-rc7-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux: pwm: adp5585: Correct mismatched pwm chip info
2025-11-19pmdomain: Extend the genpd governor for CPUs to account for IPIsUlf Hansson
When the genpd governor for CPUs, tries to select the most optimal idle state for a group of CPUs managed in a PM domain, it fails far too often. On a Dragonboard 410c, which is an arm64 based platform with 4 CPUs in one cluster that is using PSCI OS-initiated mode, we can observe that we often fail when trying to enter the selected idle state. This is certainly a suboptimal behaviour that leads to many unnecessary requests being sent to the PSCI FW. A simple dd operation that reads from the eMMC, to generate some IRQs and I/O handling helps us to understand the problem, while also monitoring the rejected counters in debugfs for the corresponding idle states of the genpd in question. Menu governor: cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states State Time Spent(ms) Usage Rejected Above Below S0 1451 437 91 149 0 S1 65194 558 149 172 0 dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500 524288000 bytes (500.0MB) copied, 3.562698 seconds, 140.3MB/s cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states State Time Spent(ms) Usage Rejected Above Below S0 2694 1073 265 892 1 S1 74567 829 561 790 0 The dd completed in ~3.6 seconds and rejects increased with 586. Teo governor: cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states State Time Spent(ms) Usage Rejected Above Below S0 4976 2096 392 1721 2 S1 160661 1893 1309 1904 0 dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500 524288000 bytes (500.0MB) copied, 3.543225 seconds, 141.1MB/s cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states State Time Spent(ms) Usage Rejected Above Below S0 5192 2194 433 1830 2 S1 167677 2891 3184 4729 0 The dd completed in ~3.6 seconds and rejects increased with 1916. The main reason to the above problem is pending IPIs for one of the CPUs that is affected by the idle state that the genpd governor selected. This leads to that the PSCI FW refuses to enter it. To improve the behaviour, let's start to take into account pending IPIs for CPUs in the genpd governor, hence we fallback to use the shallower per CPU idle state. Re-testing with this change shows a significant improved behaviour. - Menu governor: cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states State Time Spent(ms) Usage Rejected Above Below S0 2556 878 19 368 1 S1 69974 596 10 152 0 dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500 524288000 bytes (500.0MB) copied, 3.522010 seconds, 142.0MB/s cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states State Time Spent(ms) Usage Rejected Above Below S0 3360 1320 28 819 1 S1 70168 710 11 267 0 The dd completed in ~3.5 seconds and rejects increased with 10. - Teo governor cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states State Time Spent(ms) Usage Rejected Above Below S0 5145 1861 39 938 1 S1 188887 3117 51 1975 0 dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500 524288000 bytes (500.0MB) copied, 3.653100 seconds, 136.9MB/s cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states State Time Spent(ms) Usage Rejected Above Below S0 5260 1923 42 1002 1 S1 190849 4033 52 2892 0 The dd completed in ~3.7 seconds and rejects increased with 4. Note that, the rejected counters in genpd are also being accumulated in the rejected counters that are managed by cpuidle, yet on a per CPU idle states basis. Comparing these counters before/after this change, through cpuidle's sysfs interface shows the similar improvements. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19smp: Introduce a helper function to check for pending IPIsUlf Hansson
When governors used during cpuidle try to find the most optimal idle state for a CPU or a group of CPUs, they are known to quite often fail. One reason for this is, that they are not taking into account whether there has been an IPI scheduled for any of the CPUs that are affected by the selected idle state. To enable pending IPIs to be taken into account for cpuidle decisions, introduce a new helper function, cpus_peek_for_pending_ipi(). Suggested-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: mediatek: convert from clk round_rate() to determine_rate()Brian Masney
The round_rate() clk ops is deprecated in the clk framework in favor of the determine_rate() clk ops, so let's convert this driver so that round_rate() can be removed from the clk core. Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19amba: bus: Drop dev_pm_domain_detach() callClaudiu Beznea
Starting with commit f99508074e78 ("PM: domains: Detach on device_unbind_cleanup()"), there is no longer a need to call dev_pm_domain_detach() in the bus remove function. The device_unbind_cleanup() function now handles this to avoid invoking devres cleanup handlers while the PM domain is powered off, which could otherwise lead to failures as described in the above-mentioned commit. Drop the explicit dev_pm_domain_detach() call and rely instead on the flags passed to dev_pm_domain_attach() to power off the domain. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: bcm: bcm2835-power: Prepare to support BCM2712Stanimir Varbanov
BCM2712 has a PM block but lacks asb and rpivid_asb register spaces. To avoid unwanted results add a check for asb existence during probe and also add a new register offset for bcm2712 to control grafx_v3d power domain. The decision to use the new register is implicit - if asb register base is null then the driver is probed for bcm2712 (the other supported SoCs have asb register space). Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: mediatek: mtk-mfg: select MAILBOX in KconfigNicolas Frattaroli
The mtk-mfg pmdomain driver calls common mailbox framework functions. If the common mailbox framework is not selected in the kernel's configuration, the build runs into a linker error, as the symbols are absent. The hardware mailbox Kconfig system, MAILBOX, has no dependencies of its own. It's therefore safe to "select" it rather than use "depend on". Declare this "select" dependency in the Kconfig for the driver. Fixes: 1ff1f0db6aec ("pmdomain: mediatek: Add support for MFlexGraphics") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202510301311.TcOCnZ1s-lkp@intel.com/ Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: mediatek: Add support for MFlexGraphicsNicolas Frattaroli
Various MediaTek SoCs use GPU integration silicon named "MFlexGraphics" by MediaTek. On the MT8196 and MT6991 SoCs, interacting with this integration silicon is required to power on the GPU. This glue silicon is in the form of an embedded microcontroller running special-purpose firmware, which autonomously adjusts clocks and regulators. Implement a driver, modelled as a pmdomain driver with a set_performance_state operation, to support these SoCs. The driver also exposes the actual achieved clock rate, as read back from the MCU, as common clock framework clocks, by acting as a clock provider as well. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: mediatek: Fix build-errorsUlf Hansson
Let's add the missing header to fix the reported build-errors. Fixes: df4e9ec1ed86 ("pmdomain: mediatek: Add support for secure HWCCF infra power on") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202510231317.ZZxNaFG0-lkp@intel.com/ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19cpuidle: psci: Replace deprecated strcpy in psci_idle_init_cpuThorsten Blum
strcpy() is deprecated; use strscpy() instead. Link: https://github.com/KSPP/linux/issues/88 Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: rockchip: Add support for RV1126BFinley Xiao
Add configuration and power domains for RV1126 SoC. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: mediatek: Add support for MT8196 HFRPSYS power domainsAngeloGioacchino Del Regno
Add support for the HFRPSYS Multimedia power domains found in the MediaTek MT8196 Chromebook SoC. Those power domains are all managed by the Hardware Voter MCU. Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: mediatek: Add support for MT8196 SCPSYS power domainsAngeloGioacchino Del Regno
Add a new SPM bus protection block and add support for both the direct control and HW Voter control SCPSYS power domains found in the MT8196 and MT6991 SoCs. Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: mediatek: Add support for secure HWCCF infra power onAngeloGioacchino Del Regno
Some SoCs, like the MediaTek Dimensity 9400 (MT6991), have granular power controls and will disable power to the infracfg to save power when the platform is in deeper sleep states (or when no IP in the the infracfg macro-block is in use). These chips also cannot control the infracfg power states directly via AP register writes as those are protected by the secure world. Add a new MTK_SCPD_INFRA_PWR_CTL cap and, if present, make a call to the secure world to poweron the infracfg block, as the HWV IP resides in there, when executing HWV domains power sequences. Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: mediatek: Add support for Hardware Voter power domainsAngeloGioacchino Del Regno
New generation SoCs like MT8196/MT6991 feature a new type of power domains, managed by a Hardware Voter (HWV) helper (through a SoC internal fixed-function MCU): this is used to collect votes from both the AP and the various other remote processors present in the SoC and transparently power on/off various power domains, avoiding unpowered access of registers in various internal IPs from all of the integrated remote processors (or from the AP...!). Add a new power domain type and differentiate between the old SCPSYS_MTCMOS_TYPE_DIRECT_CTL - where power domains are controlled directly by and exclusively from the Application Processor, and the new SCPSYS_MTCMOS_TYPE_HW_VOTER, where the power domains are voted through the HWV. With the two needing different handling, check the power domain type and assign a different power_{off,on} callback for pm_genpd: for this specific reason, also move the check for the SCPD cap MTK_SCPD_KEEP_DEFAULT_OFF after the assignment, and use the assigned power_on function instead of calling scpsys_power_on() directly to make that work for both HW_VOTER and DIRECT_CTL. Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: qcom: rpmhpd: Add RPMh power domain support for KaanapaliJishnu Prakash
Add the RPMh power domains present in Kaanapali SoCs. Also increase the maximum allowed number of levels for ARC resources from 16 to 32, as needed starting on the Kaanapali SoC where the ARC vote registers have been expanded from 4 to 5 bits. Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19usb: dwc3: imx8mp: Set out of band wakeup for i.MX95Peng Fan
i.MX95 DWC3 inside HSIOMIX could still wakeup Linux, even if HSIOMIX power domain(Digital logic) is off. There is still always on logic have the wakeup capability which is out band wakeup capbility. So use device_set_out_band_wakeup for i.MX95 to make sure DWC3 could wakeup system even if HSIOMIX power domain is in off state. Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Tested-by: Xu Yang <xu.yang_2@nxp.com> Reviewed-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19usb: chipidea: ci_hdrc_imx: Set out of band wakeup for i.MX95Peng Fan
i.MX95 USB2 inside HSIOMIX could still wakeup Linux, even if HSIOMIX power domain(Digital logic) is off. There is still always on logic have the wakeup capability which is out band wakeup capbility. So use device_set_out_band_wakeup for i.MX95 to make sure usb2 could wakeup system even if HSIOMIX power domain is in off state. Tested-by: Xu Yang <xu.yang_2@nxp.com> Reviewed-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Peter Chen <peter.chen@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19usb: chipidea: core: detach power domain for ci_hdrc platform deviceXu Yang
When add a platform device by calling ci_hdrc_add_device(), this device will reuse OF node of its parent device. If power-domains property is provided in the OF node, both two platform devices will be attached to the same power domain. This should be unnecessary and may bring other inconsistent behavior. For example, to support wakeup capability, these two platform device need different power domain state. The parent device need NOT power domain on for out-band interrupt, but the ci_hdrc device need power domain on for in-band interrupt. The i.MX95 Soc support out-band wakeup interrupt, the user need to enable wakeup for the parent device, but if the user also enable wakeup for ci_hdrc device, the power domain will keep at on state finally. To exclude such inconsistent behavior and simplify the power management, detach power domain for ci_hdrc platform device. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Acked-by: Peter Chen <peter.chen@kernel.org> Tested-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19pmdomain: core: Allow power-off for out-of-band wakeup-capable devicesPeng Fan
Currently, if a device is configured as a system wakeup source, the PM domain core avoids powering off its power domain during system-wide suspend. However, this can lead to unnecessary power consumption, especially for devices whose wakeup logic resides in an always-on domain, i.e., devices with out-of-band wakeup capability. To address this, add a check for device_out_band_wakeup() in genpd_finish_suspend(). If the device supports out-of-band wakeup, its power domain can be safely powered off, just like regular devices without wakeup enabled. And same check in genpd_finish_resume(). This change improves power efficiency without compromising wakeup functionality. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19PM: wakeup: Add out-of-band system wakeup support for devicesPeng Fan
Some devices can wake up the system from suspend even when their power domains are turned off. This is possible because their system-wakeup logic resides in an always-on power domain - indicating that they support out-of-band system wakeup. Currently, PM domain core doesn't power off such devices if they are marked as system wakeup sources. To better represent devices with out-of-band wakeup capability, this patch introduces a new flag out_band_wakeup in 'struct dev_pm_info'. Two helper APIs are added: - device_set_out_band_wakeup() - to mark a device as having out-of-band wakeup capability. - device_out_band_wakeup() - to query the flag. Allow the PM core and drivers to distinguish between regular and out-of-band wakeup sources, enable more accurate power management decision. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19scsi: ufs: core: Use scsi_device_busy()Bart Van Assche
Use scsi_device_busy() instead of open-coding it. This patch prepares for skipping the SCSI device budget map initialization in certain cases. Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://patch.msgid.link/20251113235252.2015185-1-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-11-19pmdomain: Merge branch dt into nextUlf Hansson
Merge the immutable branch dt into next, to allow the DT bindings to be tested together with changes that are targeted for v6.19. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-19scsi: ufs: core: Fix single doorbell mode supportBart Van Assche
Commit 22089c218037 ("scsi: ufs: core: Optimize the hot path") accidentally broke support for the legacy single doorbell mode. The tag_set.shared_tags pointer is only != NULL if shared tag support is enabled. The UFS driver only enables shared tag support in MCQ mode. Fix this by handling legacy and MCQ modes differently in ufshcd_tag_to_cmd(). Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Closes: https://lore.kernel.org/linux-scsi/c988a6dd-588d-4dbc-ab83-bbee17f2a686@samsung.com/ Reported-by: André Draszik <andre.draszik@linaro.org> Closes: https://lore.kernel.org/linux-scsi/83ffbceb9e66b2a3b6096231551d969034ed8a74.camel@linaro.org/ Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Fixes: 22089c218037 ("scsi: ufs: core: Optimize the hot path") Signed-off-by: Bart Van Assche <bvanassche@acm.org> Tested-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20251114193406.3097237-1-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-11-19drm/i915/dram: Fix ICL DIMM_S decodingVille Syrjälä
Unfortunately the MAD_DIMM DIMM_S and DIMM_L bits on ICL are not idential, so we are currently decoding DIMM_S incorrectly. Fix the problem by defining the DIMM_S and DIMM_L bits separately. And for consistency do that same for SKL, even though there the bits do match between the two DIMMs. The result is rather repetitive in places, but I didn't feel like obfuscatign things with cpp macros/etc. Broken decoding on Dell XPS 13 7390 2-in-1: CH0 DIMM L size: 32 Gb, width: X16, ranks: 2, 16Gb+ DIMMs: no CH0 DIMM S size: 32 Gb, width: X32, ranks: 3, 16Gb+ DIMMs: no CH0 ranks: 2, 16Gb+ DIMMs: no CH1 DIMM L size: 32 Gb, width: X16, ranks: 2, 16Gb+ DIMMs: no CH1 DIMM S size: 32 Gb, width: X32, ranks: 3, 16Gb+ DIMMs: no CH1 ranks: 2, 16Gb+ DIMMs: no Memory configuration is symmetric? no Fixed decoding on Dell XPS 13 7390 2-in-1: CH0 DIMM L size: 32 Gb, width: X16, ranks: 2, 16Gb+ DIMMs: no CH0 DIMM S size: 32 Gb, width: X16, ranks: 2, 16Gb+ DIMMs: no CH0 ranks: 2, 16Gb+ DIMMs: no CH1 DIMM L size: 32 Gb, width: X16, ranks: 2, 16Gb+ DIMMs: no CH1 DIMM S size: 32 Gb, width: X16, ranks: 2, 16Gb+ DIMMs: no CH1 ranks: 2, 16Gb+ DIMMs: no Memory configuration is symmetric? yes Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20251029204215.12292-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/i915/dram: Sort SKL+ DIMM register bitsVille Syrjälä
Use the customary big endian order when defining the SKL/ICL DIMM registers. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20251029204215.12292-3-ville.syrjala@linux.intel.com Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-11-19Merge tag 'hid-for-linus-2025111901' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid Pull HID fixes from Jiri Kosina: - memory leak fixes in hid-uclogic, hid-ntrig and hid-playstation drivers (Abdun Nihaal, Masami Ichikawa) - regression fix for playback handling in hid-pidff (Tomasz Pakuła) - initialization fix for some amd_sfh platforms (Mario Limonciello) - a few assorted device-specific ID additions and quirks * tag 'hid-for-linus-2025111901' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid: HID: uclogic: Fix potential memory leak in error path HID: playstation: Fix memory leak in dualshock4_get_calibration_data() HID: pidff: Fix needs_playback check HID: corsair-void: Use %pe for printing PTR_ERR HID: elecom: Add support for ELECOM M-XT3URBK (018F) HID: hid-input: Extend Elan ignore battery quirk to USB HID: hid-ntrig: Prevent memory leak in ntrig_report_version() HID: amd_sfh: Stop sensor before starting HID: apple: Add SONiX AK870 PRO to non_apple_keyboards quirk list HID: lenovo: fixup Lenovo Yoga Slim 7x Keyboard rdesc HID: quirks: work around VID/PID conflict for 0x4c4a/0x4155
2025-11-19drm/i915/dram: Use REG_GENMASK() & co. for the SKL+ DIMM regsVille Syrjälä
Modernize the SKL/ICL DIMM registers with REG_GENMASK() & co. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20251029204215.12292-2-ville.syrjala@linux.intel.com Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-11-19NFS: Initialise verifiers for visible dentries in _nfs4_open_and_get_stateTrond Myklebust
Ensure that the verifiers are initialised before calling d_splice_alias() in _nfs4_open_and_get_state(). Reported-by: Michael Stoler <michael.stoler@vastdata.com> Fixes: cf5b4059ba71 ("NFSv4: Fix races between open and dentry revalidation") Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
2025-11-19Merge branch 'net-stmmac-sanitise-stmmac_is_jumbo_frm'Jakub Kicinski
Russell King says: ==================== net: stmmac: sanitise stmmac_is_jumbo_frm() stmmac_is_jumbo_frm() takes skb->len, which is unsigned int, but the parameter is passed as an "int" and then tested using signed comparisons. This can cause bugs. Change the parameter to be unsigned. Also arrange for it to return a bool. ==================== Link: https://patch.msgid.link/aRxDqJSWxOdOaRt4@shell.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-19net: stmmac: stmmac_is_jumbo_frm() returns booleanRussell King (Oracle)
stmmac_is_jumbo_frm() returns whether the driver considers the frame size to be a jumbo frame, and thus returns 0/1 values. This is boolean, so convert it to return a boolean and use false/true instead. Also convert stmmac_xmit()'s is_jumbo to be bool, which causes several variables to be repositioned to keep it in reverse Christmas-tree order. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/E1vLIWW-0000000Ewkl-21Ia@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-19net: stmmac: stmmac_is_jumbo_frm() len should be unsignedRussell King (Oracle)
stmmac_is_jumbo_frm() and the is_jumbo_frm() methods take skb->len which is an unsigned int. Avoid an implicit cast to "int" via the method parameter and then incorrectly doing signed comparisons on this unsigned value. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/E1vLIWR-0000000Ewkf-1Tdx@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-19net: stmmac: convert priv->sph* to boolean and renameRussell King (Oracle)
priv->sph* only have 'true' and 'false' used with them, yet they are an int. Change their type to a bool, and rename to make their usage more clear. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/E1vLIDN-0000000Evur-2NLU@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-19net: phylink: add missing supported link modes for the fixed-linkWei Fang
Pause, Asym_Pause and Autoneg bits are not set when pl->supported is initialized, so these link modes will not work for the fixed-link. This leads to a TCP performance degradation issue observed on the i.MX943 platform. The switch CPU port of i.MX943 is connected to an ENETC MAC, this link is a fixed link and the link speed is 2.5Gbps. And one of the switch user ports is the RGMII interface, and its link speed is 1Gbps. If the flow-control of the fixed link is not enabled, we can easily observe the iperf performance of TCP packets is very low. Because the inbound rate on the CPU port is greater than the outbound rate on the user port, the switch is prone to congestion, leading to the loss of some TCP packets and requiring multiple retransmissions. Solving this problem should be as simple as setting the Asym_Pause and Pause bits. The reason why the Autoneg bit needs to be set, Russell has gave a very good explanation in the thread [1], see below. "As the advertising and lp_advertising bitmasks have to be non-empty, and the swphy reports aneg capable, aneg complete, and AN enabled, then for consistency with that state, Autoneg should be set. This is how it was prior to the blamed commit." Fixes: de7d3f87be3c ("net: phylink: Use phy_caps_lookup for fixed-link configuration") Link: https://lore.kernel.org/aRjqLN8eQDIQfBjS@shell.armlinux.org.uk # [1] Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/20251117102943.1862680-1-wei.fang@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-19Merge tag 'fixes-2025-11-19' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rppt/memblock Pull memblock fix from Mike Rapoport: "Fix memblock_estimated_nr_free_pages() for soft-reserved memory The "soft-reserved" memory regions (EFI_MEMORY_SP) are added to the memblock.reserved, but not to the memblock.memory. It causes memblock_estimated_nr_free_pages() to return a value smaller value than expected, or if it underflows, an extremely large value. Calculate the number of estimated free pages using memblock_reserved_kern_size() instead of memblock_reserved_size() to fix the issue" * tag 'fixes-2025-11-19' of git://git.kernel.org/pub/scm/linux/kernel/git/rppt/memblock: memblock: fix memblock_estimated_nr_free_pages() for soft-reserved memory
2025-11-19selftests/riscv: Add Zicbop prefetch testYao Zihong
Add selftests to cbo.c to verify Zicbop extension behavior, and split the previous `--sigill` mode into two options so they can be tested independently. The test checks: - That hwprobe correctly reports Zicbop presence and block size. - That prefetch instructions execute without exception on valid and NULL addresses when Zicbop is present. Signed-off-by: Yao Zihong <zihong.plct@isrc.iscas.ac.cn> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://patch.msgid.link/20251118162436.15485-3-zihong.plct@isrc.iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: hwprobe: Expose Zicbop extension and its block sizeYao Zihong
- Add `RISCV_HWPROBE_EXT_ZICBOP` to report the presence of the Zicbop extension. - Add `RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE` to expose the block size (in bytes) when Zicbop is supported. - Update hwprobe.rst to document the new extension bit and block size key, following the existing Zicbom/Zicboz style. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Yao Zihong <zihong.plct@isrc.iscas.ac.cn> Link: https://patch.msgid.link/20251118162436.15485-2-zihong.plct@isrc.iscas.ac.cn [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: Introduce Zalasr instructionsXu Lu
Introduce l{b|h|w|d}.{aq|aqrl} and s{b|h|w|d}.{rl|aqrl} instruction encodings. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Reviewed-by: Guo Ren <guoren@kernel.org> Link: https://patch.msgid.link/20251020042056.30283-5-luxu.kernel@bytedance.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: hwprobe: Export Zalasr extensionXu Lu
Export the Zalasr extension to userspace using hwprobe. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Link: https://patch.msgid.link/20251020042056.30283-4-luxu.kernel@bytedance.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19dt-bindings: riscv: Add Zalasr ISA extension descriptionXu Lu
Add description for the Zalasr ISA extension Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251020042056.30283-3-luxu.kernel@bytedance.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: Add ISA extension parsing for ZalasrXu Lu
Add parsing for Zalasr ISA extension. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Link: https://patch.msgid.link/20251020042056.30283-2-luxu.kernel@bytedance.com [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19selftests: riscv: Add test for the Vector ptrace interfaceYong-Xuan Wang
Add a test case that does some basic verification of the Vector ptrace interface. This forks a child process then using ptrace to inspect and manipulate the v31 register of the child. Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Andy Chiu <andybnac@gmail.com> Tested-by: Andy Chiu <andybnac@gmail.com> Link: https://patch.msgid.link/20251013091318.467864-3-yongxuan.wang@sifive.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: ptrace: Optimize the allocation of vector regsetYong-Xuan Wang
The vector regset uses the maximum possible vlen value to estimate the .n field. But not all the hardwares support the maximum vlen. Linux might wastes time to prepare a large memory buffer(about 2^6 pages) for the vector regset. The regset can only copy vector registers when the process are using vector. Add .active callback and determine the n field of vector regset in riscv_v_setup_ctx_cache() doesn't affect the ptrace syscall and coredump. It can avoid oversized allocations and better matches real hardware limits. Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Andy Chiu <andybnac@gmail.com> Tested-by: Andy Chiu <andybnac@gmail.com> Link: https://patch.msgid.link/20251013091318.467864-2-yongxuan.wang@sifive.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19raid6: test: Add support for RISC-VChunyan Zhang
Add RISC-V code to be compiled to allow the userspace raid6test program to be built and run on RISC-V. Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com> Link: https://patch.msgid.link/20250718072711.3865118-6-zhangchunyan@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19raid6: riscv: Allow code to be compiled in userspaceChunyan Zhang
To support userspace raid6test, this patch adds __KERNEL__ ifdef for kernel header inclusions also userspace wrapper definitions to allow code to be compiled in userspace. This patch also drops the NSIZE macro, instead of using the vector length, which can work for both kernel and user space. Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Chunyan Zhang <zhangchunyan@iscas.ac.cn> Link: https://patch.msgid.link/20250718072711.3865118-5-zhangchunyan@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19raid6: riscv: Prevent compiler from breaking inline vector assembly codeChunyan Zhang
To prevent the compiler from breaking the inline vector assembly code, this code must be built without compiler support for vector. Signed-off-by: Chunyan Zhang <zhangchunyan@iscas.ac.cn> Link: https://patch.msgid.link/20250718072711.3865118-4-zhangchunyan@iscas.ac.cn [pjw@kernel.org: cleaned up commit message] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: cmpxchg: Use riscv_has_extension_likelyVivian Wang
Use riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZAWRS, replacing the use of asm goto with ALTERNATIVE. The "likely" variant is used to match the behavior of the original implementation using ALTERNATIVE("j %l[no_zawrs]", "nop", ...). Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/20251020-riscv-altn-helper-wip-v4-5-ef941c87669a@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: bitops: Use riscv_has_extension_likelyVivian Wang
Use riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZBB, replacing the use of asm goto with ALTERNATIVE. The "likely" variant is used to match the behavior of the original implementation using ALTERNATIVE("j %l[legacy]", "nop", ...). Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/20251020-riscv-altn-helper-wip-v4-4-ef941c87669a@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: hweight: Use riscv_has_extension_likelyVivian Wang
Use riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZBB, replacing the use of asm goto with ALTERNATIVE. The "likely" variant is used to match the behavior of the original implementation using ALTERNATIVE("j %l[legacy]", "nop", ...). Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/20251020-riscv-altn-helper-wip-v4-3-ef941c87669a@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-11-19riscv: checksum: Use riscv_has_extension_likelyVivian Wang
Use riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZBB, replacing the use of asm goto with ALTERNATIVE. The "likely" variant is used to match the behavior of the original implementation using ALTERNATIVE("j %l[no_zbb]", "nop", ...). While we're at it, also remove bogus comment about Zbb being likely available. We have to choose between "likely" and "unlikely" due to limitations of the asm goto feature, but that does not mean we should put a bad comment on why we pick "likely" over "unlikely". Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/20251020-riscv-altn-helper-wip-v4-2-ef941c87669a@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>