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2025-12-17ACPI: PCI: PM: Rework root bus notification setupRafael J. Wysocki
Since pci_acpi_add_bus_pm_notifier() is only suitable for adding ACPI PM notifiers to root buses, rename it to pci_acpi_add_root_pm_notifier() and modify it to take an additional "root" argument, which is then used for passing a PCI root bridge device pointer to acpi_add_pm_notifier(). That function uses it to populate the "dev" field in the context structure attached to the ACPI device object that will receive the ACPI "wake" notifications on behalf of the given PCI root bus. The context structure in question is passed to pci_acpi_wake_bus(), so the latter can be simplified quite a bit now because the target PCI host bridge structure address can be derived from "dev". No intentional functional impact. This change will also facilitate a subsequent update related to the registration of wakeup sources. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Armin Wolf <W_Armin@gmx.de> [ rjw: Kerneldoc comment fixup ] Link: https://patch.msgid.link/2395263.ElGaqSPkdT@rafael.j.wysocki Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-12-17perf: Clean up mediated vPMU accountingPeter Zijlstra
The mediated_pmu_account_event() and perf_create_mediated_pmu() functions implement the exclusion between '!exclude_guest' counters and mediated vPMUs. Their implementation is basically identical, except mirrored in what they count/check. Make sure the actual implementations reflect this similarity. Notably: - while perf_release_mediated_pmu() has an underflow check; mediated_pmu_unaccount_event() did not. - while perf_create_mediated_pmu() has an inc_not_zero() path; mediated_pmu_account_event() did not. Also, the inc_not_zero() path can be outsite of perf_mediated_pmu_mutex. The mutex must guard the 0->1 (of either nr_include_guest_events or nr_mediated_pmu_vms) transition, but once a counter is already non-zero, it can safely be incremented further. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251208115156.GE3707891@noisy.programming.kicks-ass.net
2025-12-17perf/x86/cstate: Add Airmont NPMartin Schiller
From the perspective of Intel cstate residency counters, the Airmont NP (aka Lightning Mountain) is identical to the Airmont. Signed-off-by: Martin Schiller <ms@dev.tdt.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://patch.msgid.link/20251124074846.9653-4-ms@dev.tdt.de
2025-12-17perf/x86/intel: Add Airmont NPMartin Schiller
The Intel / MaxLinear Airmont NP (aka Lightning Mountain) supports the same architectual and non-architecural events as Airmont. Signed-off-by: Martin Schiller <ms@dev.tdt.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://patch.msgid.link/20251124074846.9653-3-ms@dev.tdt.de
2025-12-17perf/x86/msr: Add Airmont NPMartin Schiller
Like Airmont, the Airmont NP (aka Intel / MaxLinear Lightning Mountain) supports SMI_COUNT MSR. Signed-off-by: Martin Schiller <ms@dev.tdt.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://patch.msgid.link/20251124074846.9653-2-ms@dev.tdt.de
2025-12-17x86/unwind_user: Simplify unwind_user_word_size()Jens Remus
Get rid of superfluous ifdef and return explicit word size depending on 32-bit or 64-bit mode. Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Jens Remus <jremus@linux.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251208160352.1363040-5-jremus@linux.ibm.com
2025-12-17x86/unwind_user: Guard unwind_user_word_size() by UNWIND_USERJens Remus
The unwind user framework in general requires an architecture-specific implementation of unwind_user_word_size() to be present for any unwind method, whether that is fp or a future other method, such as potentially sframe. Guard unwind_user_word_size() by the availability of the UNWIND_USER framework instead of the specific HAVE_UNWIND_USER_FP method. This facilitates to selectively disable HAVE_UNWIND_USER_FP on x86 (e.g. for test purposes) once a new unwind method is added to unwind user. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251208160352.1363040-4-jremus@linux.ibm.com
2025-12-17unwind_user/fp: Use dummies instead of ifdefJens Remus
This simplifies the code. unwind_user_next_fp() does not need to return -EINVAL if config option HAVE_UNWIND_USER_FP is disabled, as unwind_user_start() will then not select this unwind method and unwind_user_next() will therefore not call it. Provide (1) a dummy definition of ARCH_INIT_USER_FP_FRAME, if the unwind user method HAVE_UNWIND_USER_FP is not enabled, (2) a common fallback definition of unwind_user_at_function_start() which returns false, and (3) a common dummy definition of ARCH_INIT_USER_FP_ENTRY_FRAME. Note that enabling the config option HAVE_UNWIND_USER_FP without defining ARCH_INIT_USER_FP_FRAME triggers a compile error, which is helpful when implementing support for this unwind user method in an architecture. Enabling the config option when providing an arch- specific unwind_user_at_function_start() definition makes it necessary to also provide an arch-specific ARCH_INIT_USER_FP_ENTRY_FRAME definition. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251208160352.1363040-3-jremus@linux.ibm.com
2025-12-17unwind_user: Enhance comments on get CFA, FP, and RAJens Remus
Move the comment "Get the Canonical Frame Address (CFA)" to the top of the sequence of statements that actually get the CFA. Reword the comment "Find the Return Address (RA)" to "Get ...", as the statements actually get the RA. Add a respective comment to the statements that get the FP. This will be useful once future commits extend the logic to get the RA and FP. While at it align the comment on the "stack going in wrong direction" check to the following one on the "address is word aligned" check. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251208160352.1363040-2-jremus@linux.ibm.com
2025-12-17perf/x86/amd: Support PERF_PMU_CAP_MEDIATED_VPMU for AMD hostSandipan Das
Apply the PERF_PMU_CAP_MEDIATED_VPMU flag for version 2 and later implementations of the core PMU. Aside from having Global Control and Status registers, virtualizing the PMU using the mediated model requires an interface to set or clear the overflow bits in the Global Status MSRs while restoring or saving the PMU context of a vCPU. PerfMonV2-capable hardware has additional MSRs for this purpose, namely PerfCntrGlobalStatusSet and PerfCntrGlobalStatusClr, thereby making it suitable for use with mediated vPMU. Signed-off-by: Sandipan Das <sandipan.das@amd.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-14-seanjc@google.com
2025-12-17perf/x86/intel: Support PERF_PMU_CAP_MEDIATED_VPMUKan Liang
Apply the PERF_PMU_CAP_MEDIATED_VPMU for Intel core PMU. It only indicates that the perf side of core PMU is ready to support the mediated vPMU. Besides the capability, the hypervisor, a.k.a. KVM, still needs to check the PMU version and other PMU features/capabilities to decide whether to enable support mediated vPMUs. [sean: massage changelog] Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-13-seanjc@google.com
2025-12-17perf/x86/core: Plumb mediated PMU capability from x86_pmu to x86_pmu_capMingwei Zhang
Plumb mediated PMU capability to x86_pmu_cap in order to let any kernel entity such as KVM know that host PMU support mediated PMU mode and has the implementation. Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-12-seanjc@google.com
2025-12-17perf/x86/core: Do not set bit width for unavailable countersSandipan Das
Not all x86 processors have fixed counters. It may also be the case that a processor has only fixed counters and no general-purpose counters. Set the bit widths corresponding to each counter type only if such counters are available. Fixes: b3d9468a8bd2 ("perf, x86: Expose perf capability to other modules") Signed-off-by: Sandipan Das <sandipan.das@amd.com> Co-developed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-11-seanjc@google.com
2025-12-17perf/x86/core: Add APIs to switch to/from mediated PMI vector (for KVM)Sean Christopherson
Add APIs (exported only for KVM) to switch PMIs to the dedicated mediated PMU IRQ vector when loading guest context, and back to perf's standard NMI when the guest context is put. I.e. route PMIs to PERF_GUEST_MEDIATED_PMI_VECTOR when the guest context is active, and to NMIs while the host context is active. While running with guest context loaded, ignore all NMIs (in perf). Any NMI that arrives while the LVTPC points at the mediated PMU IRQ vector can't possibly be due to a host perf event. Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251206001720.468579-10-seanjc@google.com
2025-12-17perf/x86/core: Register a new vector for handling mediated guest PMIsSean Christopherson
Wire up system vector 0xf5 for handling PMIs (i.e. interrupts delivered through the LVTPC) while running KVM guests with a mediated PMU. Perf currently delivers all PMIs as NMIs, e.g. so that events that trigger while IRQs are disabled aren't delayed and generate useless records, but due to the multiplexing of NMIs throughout the system, correctly identifying NMIs for a mediated PMU is practically infeasible. To (greatly) simplify identifying guest mediated PMU PMIs, perf will switch the CPU's LVTPC between PERF_GUEST_MEDIATED_PMI_VECTOR and NMI when guest PMU context is loaded/put. I.e. PMIs that are generated by the CPU while the guest is active will be identified purely based on the IRQ vector. Route the vector through perf, e.g. as opposed to letting KVM attach a handler directly a la posted interrupt notification vectors, as perf owns the LVTPC and thus is the rightful owner of PERF_GUEST_MEDIATED_PMI_VECTOR. Functionally, having KVM directly own the vector would be fine (both KVM and perf will be completely aware of when a mediated PMU is active), but would lead to an undesirable split in ownership: perf would be responsible for installing the vector, but not handling the resulting IRQs. Add a new perf_guest_info_callbacks hook (and static call) to allow KVM to register its handler with perf when running guests with mediated PMUs. Note, because KVM always runs guests with host IRQs enabled, there is no danger of a PMI being delayed from the guest's perspective due to using a regular IRQ instead of an NMI. Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-9-seanjc@google.com
2025-12-17perf: Add APIs to load/put guest mediated PMU contextKan Liang
Add exported APIs to load/put a guest mediated PMU context. KVM will load the guest PMU shortly before VM-Enter, and put the guest PMU shortly after VM-Exit. On the perf side of things, schedule out all exclude_guest events when the guest context is loaded, and schedule them back in when the guest context is put. I.e. yield the hardware PMU resources to the guest, by way of KVM. Note, perf is only responsible for managing host context. KVM is responsible for loading/storing guest state to/from hardware. [sean: shuffle patches around, write changelog] Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-8-seanjc@google.com
2025-12-17perf: Add a EVENT_GUEST flagKan Liang
Current perf doesn't explicitly schedule out all exclude_guest events while the guest is running. There is no problem with the current emulated vPMU. Because perf owns all the PMU counters. It can mask the counter which is assigned to an exclude_guest event when a guest is running (Intel way), or set the corresponding HOSTONLY bit in evsentsel (AMD way). The counter doesn't count when a guest is running. However, either way doesn't work with the introduced mediated vPMU. A guest owns all the PMU counters when it's running. The host should not mask any counters. The counter may be used by the guest. The evsentsel may be overwritten. Perf should explicitly schedule out all exclude_guest events to release the PMU resources when entering a guest, and resume the counting when exiting the guest. It's possible that an exclude_guest event is created when a guest is running. The new event should not be scheduled in as well. The ctx time is shared among different PMUs. The time cannot be stopped when a guest is running. It is required to calculate the time for events from other PMUs, e.g., uncore events. Add timeguest to track the guest run time. For an exclude_guest event, the elapsed time equals the ctx time - guest time. Cgroup has dedicated times. Use the same method to deduct the guest time from the cgroup time as well. [sean: massage comments] Co-developed-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-7-seanjc@google.com
2025-12-17perf: Clean up perf ctx timeKan Liang
The current perf tracks two timestamps for the normal ctx and cgroup. The same type of variables and similar codes are used to track the timestamps. In the following patch, the third timestamp to track the guest time will be introduced. To avoid the code duplication, add a new struct perf_time_ctx and factor out a generic function update_perf_time_ctx(). No functional change. Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-6-seanjc@google.com
2025-12-17perf: Add APIs to create/release mediated guest vPMUsKan Liang
Currently, exposing PMU capabilities to a KVM guest is done by emulating guest PMCs via host perf events, i.e. by having KVM be "just" another user of perf. As a result, the guest and host are effectively competing for resources, and emulating guest accesses to vPMU resources requires expensive actions (expensive relative to the native instruction). The overhead and resource competition results in degraded guest performance and ultimately very poor vPMU accuracy. To address the issues with the perf-emulated vPMU, introduce a "mediated vPMU", where the data plane (PMCs and enable/disable knobs) is exposed directly to the guest, but the control plane (event selectors and access to fixed counters) is managed by KVM (via MSR interceptions). To allow host perf usage of the PMU to (partially) co-exist with KVM/guest usage of the PMU, KVM and perf will coordinate to a world switch between host perf context and guest vPMU context near VM-Enter/VM-Exit. Add two exported APIs, perf_{create,release}_mediated_pmu(), to allow KVM to create and release a mediated PMU instance (per VM). Because host perf context will be deactivated while the guest is running, mediated PMU usage will be mutually exclusive with perf analysis of the guest, i.e. perf events that do NOT exclude the guest will not behave as expected. To avoid silent failure of !exclude_guest perf events, disallow creating a mediated PMU if there are active !exclude_guest events, and on the perf side, disallowing creating new !exclude_guest perf events while there is at least one active mediated PMU. Exempt PMU resources that do not support mediated PMU usage, i.e. that are outside the scope/view of KVM's vPMU and will not be swapped out while the guest is running. Guard mediated PMU with a new kconfig to help readers identify code paths that are unique to mediated PMU support, and to allow for adding arch- specific hooks without stubs. KVM x86 is expected to be the only KVM architecture to support a mediated PMU in the near future (e.g. arm64 is trending toward a partitioned PMU implementation), and KVM x86 will select PERF_GUEST_MEDIATED_PMU unconditionally, i.e. won't need stubs. Immediately select PERF_GUEST_MEDIATED_PMU when KVM x86 is enabled so that all paths are compile tested. Full KVM support is on its way... [sean: add kconfig and WARNing, rewrite changelog, swizzle patch ordering] Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-5-seanjc@google.com
2025-12-17perf: Move security_perf_event_free() call to __free_event()Sean Christopherson
Move the freeing of any security state associated with a perf event from _free_event() to __free_event(), i.e. invoke security_perf_event_free() in the error paths for perf_event_alloc(). This will allow adding potential error paths in perf_event_alloc() that can occur after allocating security state. Note, kfree() and thus security_perf_event_free() is a nop if event->security is NULL, i.e. calling security_perf_event_free() even if security_perf_event_alloc() fails or is never reached is functionality ok. Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-4-seanjc@google.com
2025-12-17perf: Add generic exclude_guest supportKan Liang
Only KVM knows the exact time when a guest is entering/exiting. Expose two interfaces to KVM to switch the ownership of the PMU resources. All the pinned events must be scheduled in first. Extend the perf_event_sched_in() helper to support extra flag, e.g., EVENT_GUEST. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-3-seanjc@google.com
2025-12-17perf: Skip pmu_ctx based on event_typeKan Liang
To optimize the cgroup context switch, the perf_event_pmu_context iteration skips the PMUs without cgroup events. A bool cgroup was introduced to indicate the case. It can work, but this way is hard to extend for other cases, e.g. skipping non-mediated PMUs. It doesn't make sense to keep adding bool variables. Pass the event_type instead of the specific bool variable. Check both the event_type and related pmu_ctx variables to decide whether skipping a PMU. Event flags, e.g., EVENT_CGROUP, should be cleard in the ctx->is_active. Add EVENT_FLAGS to indicate such event flags. No functional change. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Yongwei Ma <yongwei.ma@intel.com> Tested-by: Xudong Hao <xudong.hao@intel.com> Link: https://patch.msgid.link/20251206001720.468579-2-seanjc@google.com
2025-12-17perf report: Update sort key state from -F optionNamhyung Kim
Factor out __sort_dimension__update() so that it can be called from -s and -F option parsing logics. Otherwise the following command cannot go into the annotation mode. $ perf report -F overhead,type,sym Warning: Annotation is only available for symbolic views, include "sym*" in --sort to use it. Reviewed-by: Ian Rogers <irogers@google.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: James Clark <james.clark@linaro.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17perf report: Fix histogram entry collapsing for -F optionNamhyung Kim
Users can use -F/--fields option to set output fields and sort keys together. But it missed to set perf_hpp_list->need_collapse for sort entries that have se_collapse callbacks. So it ends up with having duplicated entries separately. For example, let's run this command first. $ perf mem record -t load -U -- perf test -w datasym This will record samples for memory access (load) to struct 'buf' and a loop condition ('sig_atomic_t') types. So the following two commands should have identical output. $ perf report -s type --stdio --percent-limit=1 -q 87.80% perf buf 12.17% perf sig_atomic_t But using -F option didn't collapse the entries based on types so the result looked like below: $ perf report -F overhead,type --stdio --percent-limit=1 -q 23.31% perf buf 22.84% perf buf 21.26% perf buf 20.39% perf buf 12.17% perf sig_atomic_t Reviewed-by: Ian Rogers <irogers@google.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: James Clark <james.clark@linaro.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17perf report: Enable data-type profiling with -F option tooNamhyung Kim
It checked -s/--sort options only. As the sort keys can be setup using the -F/--fields option as well, it should enable data-type profiling with it too. The following two commands should have the same output. $ perf report -s type $ perf report -F overhead,type But there's another problem on this. I'll handle it in the next commit. Reviewed-by: Ian Rogers <irogers@google.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: James Clark <james.clark@linaro.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17perf record: Split --data-mmap optionNamhyung Kim
Currently -d/--data option controls both PERF_SAMPLE_ADDR bit and perf_event_attr.mmap_data flag. Separate them using new --data-mmap option to support recording only one of them. For data-type profiling, data MMAP is unnecessary but it wastes a lot of space in the ring buffer and data file. Committer testing: On an idle system: root@x1:~# perf record -d -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.672 MB perf.data (1075 samples) ] root@x1:~# ls -la perf.data -rw-------. 1 root root 5982480 Dec 16 15:34 perf.data root@x1:~# perf evlist -v cpu_atom/cycles/P: type: 0 (PERF_TYPE_HARDWARE), size: 144, config: 0xa00000000 (cpu_atom/PERF_COUNT_HW_CPU_CYCLES/), { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CPU|PERIOD|IDENTIFIER|DATA_SRC, read_format: ID|LOST, disabled: 1, freq: 1, precise_ip: 3, sample_id_all: 1 cpu_core/cycles/P: type: 0 (PERF_TYPE_HARDWARE), size: 144, config: 0x400000000 (cpu_core/PERF_COUNT_HW_CPU_CYCLES/), { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CPU|PERIOD|IDENTIFIER|DATA_SRC, read_format: ID|LOST, disabled: 1, freq: 1, precise_ip: 3, sample_id_all: 1 dummy:u: type: 1 (PERF_TYPE_SOFTWARE), size: 144, config: 0x9 (PERF_COUNT_SW_DUMMY), { sample_period, sample_freq }: 1, sample_type: IP|TID|TIME|ADDR|CPU|IDENTIFIER|DATA_SRC, read_format: ID|LOST, exclude_kernel: 1, exclude_hv: 1, mmap: 1, comm: 1, task: 1, mmap_data: 1, sample_id_all: 1, exclude_guest: 1, mmap2: 1, comm_exec: 1, ksymbol: 1, bpf_event: 1, build_id: 1 root@x1:~# Now with just --data-mmap we will not save that much, as only DATA_SRC will not be enabled in sample_type: root@x1:~# perf record --data-mmap -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.576 MB perf.data (716 samples) ] root@x1:~# ls -la perf.data -rw-------. 1 root root 5880112 Dec 16 15:37 perf.data root@x1:~# perf evlist -v cpu_atom/cycles/P: type: 0 (PERF_TYPE_HARDWARE), size: 144, config: 0xa00000000 (cpu_atom/PERF_COUNT_HW_CPU_CYCLES/), { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|CPU|PERIOD|IDENTIFIER, read_format: ID|LOST, disabled: 1, freq: 1, precise_ip: 3, sample_id_all: 1 cpu_core/cycles/P: type: 0 (PERF_TYPE_HARDWARE), size: 144, config: 0x400000000 (cpu_core/PERF_COUNT_HW_CPU_CYCLES/), { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|CPU|PERIOD|IDENTIFIER, read_format: ID|LOST, disabled: 1, freq: 1, precise_ip: 3, sample_id_all: 1 dummy:u: type: 1 (PERF_TYPE_SOFTWARE), size: 144, config: 0x9 (PERF_COUNT_SW_DUMMY), { sample_period, sample_freq }: 1, sample_type: IP|TID|TIME|CPU|IDENTIFIER, read_format: ID|LOST, exclude_kernel: 1, exclude_hv: 1, mmap: 1, comm: 1, task: 1, mmap_data: 1, sample_id_all: 1, exclude_guest: 1, mmap2: 1, comm_exec: 1, ksymbol: 1, bpf_event: 1, build_id: 1 root@x1:~# To complete, just with DATA_SRC, no mmap_data: root@x1:~# perf record --sample-mem-info -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 1.407 MB perf.data (1311 samples) ] root@x1:~# ls -la perf.data -rw-------. 1 root root 1509224 Dec 16 15:40 perf.data root@x1:~# perf evlist -v cpu_atom/cycles/P: type: 0 (PERF_TYPE_HARDWARE), size: 144, config: 0xa00000000 (cpu_atom/PERF_COUNT_HW_CPU_CYCLES/), { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|CPU|PERIOD|IDENTIFIER|DATA_SRC, read_format: ID|LOST, disabled: 1, freq: 1, precise_ip: 3, sample_id_all: 1 cpu_core/cycles/P: type: 0 (PERF_TYPE_HARDWARE), size: 144, config: 0x400000000 (cpu_core/PERF_COUNT_HW_CPU_CYCLES/), { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|CPU|PERIOD|IDENTIFIER|DATA_SRC, read_format: ID|LOST, disabled: 1, freq: 1, precise_ip: 3, sample_id_all: 1 dummy:u: type: 1 (PERF_TYPE_SOFTWARE), size: 144, config: 0x9 (PERF_COUNT_SW_DUMMY), { sample_period, sample_freq }: 1, sample_type: IP|TID|TIME|CPU|IDENTIFIER|DATA_SRC, read_format: ID|LOST, exclude_kernel: 1, exclude_hv: 1, mmap: 1, comm: 1, task: 1, sample_id_all: 1, exclude_guest: 1, mmap2: 1, comm_exec: 1, ksymbol: 1, bpf_event: 1, build_id: 1 root@x1:~# Reviewed-by: Ian Rogers <irogers@google.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: James Clark <james.clark@linaro.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17perf vendor power9 nest metrics: Correct unit from MB to MiBIan Rogers
6.1e-5 is very close to 1/16384, where 16384 is 2^14, i.e. a power of 2. When units are in powers of 2 the IEC unit is MiB (mebibytes) rather than MB (megabytes) where the values are powers of 10. This patch corrects the unit for uniformity and because such units may be pattern matched against. Reviewed-by: Madhavan Srinivasan <maddy@linux.ibm.com> Signed-off-by: Ian Rogers <irogers@google.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Kajol Jain <kjain@linux.ibm.com> Link: https://lore.kernel.org/r/20251031162637.1456191-1-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17perf trace: Don't change const char stringsArnaldo Carvalho de Melo
We got away with this so far but now with fedora 44 complaining about the return value of strchr et all, lets use strdup for good measure. Reviewed-by: Ian Rogers <irogers@google.com> Link: https://lore.kernel.org/r/20251211221756.96294-5-acme@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17perf tools: Use const for variables receiving str{str,r?chr}() returnsArnaldo Carvalho de Melo
Newer glibc versions return const char for str{str,chr}() where the haystack/s is const so to avoid warnings like these on fedora 44 change some variables to const: 36 8.17 fedora:44 : FAIL gcc version 15.2.1 20251111 (Red Hat 15.2.1-4) (GCC) libbpf.c: In function 'kallsyms_cb': libbpf.c:8489:13: error: assignment discards 'const' qualifier from pointer target type [-Werror=discarded-qualifiers] 8489 | res = strstr(sym_name, ".llvm."); Reviewed-by: Ian Rogers <irogers@google.com> Link: https://lore.kernel.org/r/20251211221756.96294-4-acme@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17perf diff: Constify strchr() return variablesArnaldo Carvalho de Melo
Newer glibc versions return const char for strchr() when the 's' arg is const, change the return variable to const to match that. Also we don't need to turn that ',' into a '\0', as strtol() will stop in the first invalid char. No need to touch read only memory. First noticed with fedora 44. Reviewed-by: Ian Rogers <irogers@google.com> Link: https://lore.kernel.org/r/20251211221756.96294-3-acme@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17perf list: Remove unused 'sep' variableArnaldo Carvalho de Melo
It is just being set to the return of strchr() but never used, just ditch it and with it get rid of a warning about it not being const on fedora 44. Reviewed-by: Ian Rogers <irogers@google.com> Link: https://lore.kernel.org/r/20251211221756.96294-2-acme@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-12-17spi: stm32-qspi: Remove unneeded semicolonChen Ni
Remove unnecessary semicolons reported by Coccinelle/coccicheck and the semantic patch at scripts/coccinelle/misc/semicolon.cocci. Signed-off-by: Chen Ni <nichen@iscas.ac.cn> Link: https://patch.msgid.link/20251217023721.1684244-1-nichen@iscas.ac.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17spi: stm32-ospi: Remove unneeded semicolonChen Ni
Remove unnecessary semicolons reported by Coccinelle/coccicheck and the semantic patch at scripts/coccinelle/misc/semicolon.cocci. Signed-off-by: Chen Ni <nichen@iscas.ac.cn> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://patch.msgid.link/20251216043210.1521722-1-nichen@iscas.ac.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17MAINTAINERS: Add MAINTAINERS entry for the ATCSPI200 SPI controller driverCL Wang
MAINTAINERS: Add entry for the Andes ATCSPI200 SPI controller driver Signed-off-by: CL Wang <cl634@andestech.com> Link: https://patch.msgid.link/20251215132349.513843-4-cl634@andestech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17spi: dt-bindings: Add support for ATCSPI200 SPI controllerCL Wang
Document devicetree bindings for the Andes ATCSPI200 SPI controller. Signed-off-by: CL Wang <cl634@andestech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251215132349.513843-2-cl634@andestech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17spi: atcspi200: Add ATCSPI200 SPI controller driverCL Wang
Add driver for the Andes ATCSPI200 SPI controller. Signed-off-by: CL Wang <cl634@andestech.com> Link: https://patch.msgid.link/20251215132349.513843-3-cl634@andestech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17spi: add driver for NXP XSPI controllerHaibo Chen
Add driver support for NXP XSPI controller. XSPI is a flexible SPI host controller which supports up to 2 external devices (2 CS). It support Single/Dual/Quad/Octal mode data transfer. The difference between XSPI and Flexspi: 1.the register layout is total different. 2.XSPI support multiple independent execution environments (EENVs) for HW virtualization with some limitations. Each EENV has its own interrupt and its own set of programming registers that exists in a specific offset range in the XSPI memory map. The main environment (EENV0) address space contains all of the registers for controlling EENV0 plus all of the general XSPI control and programming registers. The register mnemonics for the user environments (EENV1 to EENV4) have "_SUB_n" appended to the mnemonic for the corresponding main-environment register. Current driver based on EENV0, which means system already give EENV0 right to linux. This driver use SPI memory interface of the SPI framework to issue flash memory operations. Tested this driver with UBIFS and mtd_debug on NXP i.MX943 EVK board which has one spi nor MT35XU512ABA flash. Now this driver has the following key features: - Support up to OCT DDR mode - Support AHB read - Support IP read and IP write - Support two CS Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://patch.msgid.link/20251216-xspi-v7-2-282525220979@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17spi: dt-bindings: nxp,imx94-xspi: Document imx94 xspiHaibo Chen
Document imx94 xspi that supports interface to serial flash supporting following features: - Single-bit SPI, Dual SPI, Quad SPI and Octal SPI. - Single Data Rate or Double Data Rate modes. - Direct memory mapping of all AHB memory accesses to the chip system memory space. - Multi-master AHB accesses with priority. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://patch.msgid.link/20251216-xspi-v7-1-282525220979@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: codecs: tas2780: tidyup format check in tas2780_set_fmt()Kuninori Morimoto
Current code is using messy code to check format. Let's cleanup it by using switch(). Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/87h5trrljz.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: qcom: audioreach: Add support for VI Sense moduleKrzysztof Kozlowski
VI Sense module in ADSP is responsible for feedback loop for measuring current and voltage of amplifiers, necessary for proper calibration of Speaker Protection algorightms. Implement parsing MODULE_ID_SPEAKER_PROTECTION_VI from Audioreach topology and sending it as command to the ADSP. Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251217094602.55117-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: qcom: audioreach: Add support for Speaker Protection moduleKrzysztof Kozlowski
Speaker Protection is capability of ADSP to adjust the gain during playback to different speakers and their temperature. This allows good playback without blowing the speakers up. Implement parsing MODULE_ID_SPEAKER_PROTECTION from Audioreach topology and sending it as command to the ADSP. Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251217094602.55117-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: cs-amp-lib: Replace __free(kfree) with normal kfree() cleanupRichard Fitzgerald
Replace the use of __free(kfree) in _cs_amp_set_efi_calibration_data() with normal kfree() at the end of the function. Krzysztof Kozlowski pointed out that __free() can be dangerous. It can introduce new cleanup bugs. These are more subtle and difficult to spot than a missing goto in traditional cleanup, because they are triggered by writing regular idiomatic C code instead of using C++ conventions. As it's regular C style it's more likely to be missed because the code is as would be expected for C. The traditional goto also more obviously flags to anyone changing the code in the future that they must be careful about the cleanup. Arguably the traditional approach is more readable, and it avoids the manipulation of __free() pointers when the buffer is reallocated for resizing. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://patch.msgid.link/20251201123906.86876-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: rt1320: support RAE parameters loadingShuming Fan
This patch supports the RAE parameters loading. The RAE parameters is related to EQ/DRC parameters for each endpoint. The driver could load these parameters from the binary file. Signed-off-by: Shuming Fan <shumingf@realtek.com> Link: https://patch.msgid.link/20251216090630.3955323-1-shumingf@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: SDCA: Allow sample width wild cards in set_usage()Simon Trimmer
The SDCA spec allows the sample rate and width to be wild cards, but the current implementation of set_usage() only checked for a wild card of the sample rate. Fixes: 4ed357f72a0e ("ASoC: SDCA: Add hw_params() helper function") Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20251216142204.183958-1-simont@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: rt1320: support calibration and temperature/r0 loadingShuming Fan
This patch adds the functions/controls to support the calibration. The mixer controls could trigger a calibration and load temperature/r0 value. Signed-off-by: Shuming Fan <shumingf@realtek.com> Link: https://patch.msgid.link/20251216090616.3955293-1-shumingf@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: codec: rt298: Use devm_request_threaded_irq to manage IRQ lifetime and ↵HariKrishna Sagala
fix smatch warning Replace manual "request_threaded_irq()" with the device managed "devm_request_threaded_irq" to manage the IRQ lifetime and also it removes the smatch reported warning. Remove the manual "free_irq()" in the "remove" function as free_irq is tied to device teardown. Signed-off-by: HariKrishna Sagala <hariconscious@gmail.com> Link: https://patch.msgid.link/20251217104356.60839-3-hariconscious@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: Intel: sof_rt5682: add tas2563 speaker amp supportDavid Lin
This patch adds tas2563 which supports the RT5682 headset codec and TAS2563 speaker amplifier combination on PantherLake platform. Signed-off-by: David Lin <david.lin@intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://patch.msgid.link/20251217110433.3558136-3-yung-chuan.liao@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: Intel: ti-common: support tas2563 amplifierDavid Lin
Implement tas2563 support code in this common module so it could be shared between multiple SOF machine drivers. Signed-off-by: David Lin <david.lin@intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://patch.msgid.link/20251217110433.3558136-2-yung-chuan.liao@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: codecs: ES8326: Add kcontrol for DREZhang Yi
Set up a kcontrol to control DRE Signed-off-by: Zhang Yi <zhangyi@everest-semi.com> Link: https://patch.msgid.link/20251216064721.4622-3-zhangyi@everest-semi.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-17ASoC: codecs: ES8326: Add a kcontrol for PGAGAINZhang Yi
set a kcontrol to control bit 7 of ES8326_PGAGAIN instead of setting a fixed value in the driver Signed-off-by: Zhang Yi <zhangyi@everest-semi.com> Link: https://patch.msgid.link/20251216064721.4622-2-zhangyi@everest-semi.com Signed-off-by: Mark Brown <broonie@kernel.org>