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2025-12-22params: Replace __modinit with __init_or_modulePetr Pavlu
Remove the custom __modinit macro from kernel/params.c and instead use the common __init_or_module macro from include/linux/module.h. Both provide the same functionality. Signed-off-by: Petr Pavlu <petr.pavlu@suse.com> Reviewed-by: Aaron Tomlin <atomlin@atomlin.com> Reviewed-by: Daniel Gomez <da.gomez@samsung.com> Reviewed-by: Sami Tolvanen <samitolvanen@google.com> Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
2025-12-22module: Remove unused __INIT*_OR_MODULE macrosPetr Pavlu
Remove the __INIT_OR_MODULE, __INITDATA_OR_MODULE and __INITRODATA_OR_MODULE macros. These were introduced in commit 8b5a10fc6fd0 ("x86: properly annotate alternatives.c"). Only __INITRODATA_OR_MODULE was ever used, in arch/x86/kernel/alternative.c. In 2011, commit dc326fca2b64 ("x86, cpu: Clean up and unify the NOP selection infrastructure") removed this usage. Signed-off-by: Petr Pavlu <petr.pavlu@suse.com> Reviewed-by: Aaron Tomlin <atomlin@atomlin.com> Reviewed-by: Daniel Gomez <da.gomez@samsung.com> Reviewed-by: Sami Tolvanen <samitolvanen@google.com> Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
2025-12-22MAINTAINERS: Update module subsystem maintainers and repositorySami Tolvanen
Add myself as a maintainer for module support as I'll be handling pull requests for the next six months according to the previously announced rotation [1][2]. Also, update the git repository link to point to the modules tree, which is already used by linux-next. Link: https://lore.kernel.org/linux-modules/Z3gDAnPlA3SZEbgl@bombadil.infradead.org [1] Link: https://lore.kernel.org/linux-modules/20251203234840.3720-1-da.gomez@kernel.org/ [2] Acked-by: Daniel Gomez <da.gomez@samsung.com> Acked-by: Petr Pavlu <petr.pavlu@suse.com> Reviewed-by: Aaron Tomlin <atomlin@atomlin.com> Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
2025-12-22samples: rust: debugfs: replace `kernel::c_str!` with C-StringsTamir Duberstein
C-String literals were added in Rust 1.77. Replace instances of `kernel::c_str!` with C-String literals where possible. Signed-off-by: Tamir Duberstein <tamird@gmail.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Link: https://patch.msgid.link/20251222-cstr-driver-core-v1-7-1142a177d0fd@gmail.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-12-22rust: debugfs: replace `kernel::c_str!` with C-StringsTamir Duberstein
C-String literals were added in Rust 1.77. Replace instances of `kernel::c_str!` with C-String literals where possible. Signed-off-by: Tamir Duberstein <tamird@gmail.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Link: https://patch.msgid.link/20251222-cstr-driver-core-v1-6-1142a177d0fd@gmail.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-12-22rust: irq: replace `kernel::c_str!` with C-StringsTamir Duberstein
C-String literals were added in Rust 1.77. Replace instances of `kernel::c_str!` with C-String literals where possible. Signed-off-by: Tamir Duberstein <tamird@gmail.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Link: https://patch.msgid.link/20251222-cstr-driver-core-v1-5-1142a177d0fd@gmail.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-12-22rust: io: replace `kernel::c_str!` with C-StringsTamir Duberstein
C-String literals were added in Rust 1.77. Replace instances of `kernel::c_str!` with C-String literals where possible. Signed-off-by: Tamir Duberstein <tamird@gmail.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Link: https://patch.msgid.link/20251222-cstr-driver-core-v1-4-1142a177d0fd@gmail.com [ Use kernel vertical import style. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-12-22rust: platform: replace `kernel::c_str!` with C-StringsTamir Duberstein
C-String literals were added in Rust 1.77. Replace instances of `kernel::c_str!` with C-String literals where possible. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Benno Lossin <lossin@kernel.org> Signed-off-by: Tamir Duberstein <tamird@gmail.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Link: https://patch.msgid.link/20251222-cstr-driver-core-v1-3-1142a177d0fd@gmail.com [ Use kernel vertical import style; discard unrelated faux changes. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-12-22rust: device: replace `kernel::c_str!` with C-StringsTamir Duberstein
C-String literals were added in Rust 1.77. Replace instances of `kernel::c_str!` with C-String literals where possible. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Benno Lossin <lossin@kernel.org> Signed-off-by: Tamir Duberstein <tamird@gmail.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Link: https://patch.msgid.link/20251222-cstr-driver-core-v1-2-1142a177d0fd@gmail.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-12-22rust: auxiliary: replace `kernel::c_str!` with C-StringsTamir Duberstein
C-String literals were added in Rust 1.77. Replace instances of `kernel::c_str!` with C-String literals where possible. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Benno Lossin <lossin@kernel.org> Signed-off-by: Tamir Duberstein <tamird@gmail.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Link: https://patch.msgid.link/20251222-cstr-driver-core-v1-1-1142a177d0fd@gmail.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-12-22rust: debugfs: use "kernel vertical" style for importsDanilo Krummrich
Convert all imports in the debugfs Rust module to use "kernel vertical" style. With this subsequent patches neither introduce unrelated changes nor leave an inconsistent import pattern. While at it, drop unnecessary imports covered by prelude::*. Link: https://docs.kernel.org/rust/coding-guidelines.html#imports Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://patch.msgid.link/20251218165626.450264-1-dakr@kernel.org [ Apply the same change to the debugfs sample code. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-12-22coresight: docs: Document etm4x timestamp interval optionJames Clark
Document how the new field is used, maximum value and the interaction with SYNC timestamps. Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Reviewed-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-13-4d319764cc58@linaro.org
2025-12-22coresight: Extend width of timestamp format attributeJames Clark
'timestamp' is currently 1 bit wide for on/off. To enable setting different intervals, extend it to 4 bits wide. Keep the old bit position for backward compatibility ("deprecated_timestamp") but don't publish in the format/ folder. It will be removed from the documentation and can be removed completely after enough time has passed. ETM3x doesn't support different intervals, so validate that the value is either 0 or 1. Tools that read the bit positions from the format/ folder will continue to work as before, setting either 0 or 1 for off/on. Tools that incorrectly didn't do this and set the ETM_OPT_TS bit directly will also continue to work because that old bit is still checked. This avoids adding a second timestamp attribute for setting the interval. This would be awkward to use because tools would have to be updated to ensure that the timestamps are always enabled when an interval is set, and the driver would have to validate that both options are provided together. All this does is implement the semantics of a single enum but spread over multiple fields. Reviewed-by: Leo Yan <leo.yan@arm.com> Tested-by: Leo Yan <leo.yan@arm.com> Tested-by: Jie Gan <jie.gan@oss.qualcomm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-12-4d319764cc58@linaro.org
2025-12-22coresight: Prepare to allow setting the timestamp intervalJames Clark
Timestamps are currently emitted at the maximum rate possible, which is much too frequent for most use cases. In the next commit, the timestamp field will be widened to take a value, so set the interval using the value now. Granular control is not required, so save space in the config by interpreting it as 2 ^ timestamp. And then 4 bits (0 - 15) will be enough to set the interval to be larger than the existing SYNC timestamp interval. No sysfs mode support is needed for this attribute because counter generated timestamps are only configured for Perf mode. Reviewed-by: Leo Yan <leo.yan@arm.com> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-11-4d319764cc58@linaro.org
2025-12-22coresight: Remove misleading definitionsJames Clark
ETM_OPT_* definitions duplicate the PMU format attributes that have always been published in sysfs. Hardcoding them here makes it misleading as to what the 'real' PMU API is and prevents attributes from being rearranged in the future. ETM4_CFG_BIT_* definitions just define what the Arm Architecture is which is not the responsibility of the kernel to do and doesn't scale to other registers or versions of ETM. It's not an actual software ABI/API and these definitions here mislead that it is. Any tools using the first ones would be broken anyway as they won't work when attributes are moved, so removing them is the right thing to do and will prompt a fix. Tools using the second ones can trivially redefine them locally. Perf also has its own copy of the headers so both of these things can be fixed up at a later date. Reviewed-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-10-4d319764cc58@linaro.org
2025-12-22coresight: Interpret ETMv4 config with ATTR_CFG_GET_FLD()James Clark
Remove hard coded bitfield extractions and shifts and replace with ATTR_CFG_GET_FLD(). ETM4_CFG_BIT_BB was defined to give the register bit positions to userspace, TRCCONFIGR_BB should be used in the kernel so replace it. Reviewed-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-9-4d319764cc58@linaro.org
2025-12-22coresight: Interpret perf config with ATTR_CFG_GET_FLD()James Clark
The "config:" string construction in format_attr_contextid_show() can be removed because it either showed the existing context1 or context2 formats which have already been generated, so can be called themselves. The other conversions are straightforward replacements. Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-8-4d319764cc58@linaro.org
2025-12-22coresight: Don't reject unrecognized ETMv3 format attributesJames Clark
config isn't the only field, there are also config1, config2, etc. Rejecting unrecognized attributes is therefore inconsistent as it wasn't done for all fields. It was only necessary when we were directly programming attr->config into ETMCR and didn't hide the unsupported fields, but now it's not needed so remove it. Reviewed-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-7-4d319764cc58@linaro.org
2025-12-22coresight: Interpret ETMv3 config with ATTR_CFG_GET_FLD()James Clark
Currently we're programming attr->config directly into ETMCR after some validation. This obscures which fields are being used, and also makes it impossible to move fields around or use other configN fields in the future. Improve it by only reading the fields that are valid and then setting the appropriate ETMCR bits based on each one. The ETMCR_CTXID_SIZE part can be removed as it was never a valid option because it's not in ETM3X_SUPPORTED_OPTIONS. Reviewed-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-6-4d319764cc58@linaro.org
2025-12-22coresight: Define format attributes with GEN_PMU_FORMAT_ATTR()James Clark
This allows us to define and consume them in a unified way in later commits. A lot of the existing code has open coded bit shifts or direct usage of whole config values which is error prone and hides which bits are in use and which are free. Reviewed-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-5-4d319764cc58@linaro.org
2025-12-22coresight: Hide unused ETMv3 format attributesJames Clark
ETMv3 only has a few attributes, and setting unused ones results in an error, so hide them to begin with. Reviewed-by: Mike Leach <mike.leach@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-4-4d319764cc58@linaro.org
2025-12-22coresight: Refactor etm4_config_timestamp_event()James Clark
Remove some of the magic numbers and try to clarify some of the documentation so it's clearer how this sets up the timestamp interval. Return errors directly instead of jumping to out and returning ret, nothing needs to be cleaned up at the end and it only obscures the flow and return value. Add utilities for programming resource selectors that do compile time checks for constants or WARN_ONs for non-constant values. FIELD_PREP includes compile time checks so we only need to add an additional BUILD_BUG_ON for resource == 0 in pair mode. Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-3-4d319764cc58@linaro.org
2025-12-22coresight: Repack struct etmv4_drvdataJames Clark
Fix holes and convert the long list of bools to single bits to save some space because there's one of these for each ETM. Reviewed-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-2-4d319764cc58@linaro.org
2025-12-22coresight: Change syncfreq to be a u8James Clark
TRCSYNCPR.PERIOD is the only functional part of TRCSYNCPR and it only has 5 valid bits so it can be stored in a u8. Reviewed-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Leo Yan <leo.yan@arm.com> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-1-4d319764cc58@linaro.org
2025-12-22rust: regulator: replace `kernel::c_str!` with C-StringsTamir Duberstein
C-String literals were added in Rust 1.77. Replace instances of `kernel::c_str!` with C-String literals where possible. Signed-off-by: Tamir Duberstein <tamird@gmail.com> Reviewed-by: Daniel Almeida <Daniel.almeida@collabora.com> Link: https://patch.msgid.link/20251222-cstr-regulator-v1-1-430e3d517025@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-22platform/x86/intel/vsec: correct kernel-doc commentsRandy Dunlap
Fix kernel-doc warnings in intel_vsec.h to eliminate all kernel-doc warnings: Warning: include/linux/intel_vsec.h:92 struct member 'read_telem' not described in 'pmt_callbacks' Warning: include/linux/intel_vsec.h:146 expecting prototype for struct intel_sec_device. Prototype was for struct intel_vsec_device instead Warning: include/linux/intel_vsec.h:146 struct member 'priv_data_size' not described in 'intel_vsec_device' In struct pmt_callbacks, correct the kernel-doc for @read_telem. kernel-doc doesn't support documenting callback function parameters, so drop the '@' signs on those and use "* *" to make them somewhat readable in the produced documentation output. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Link: https://patch.msgid.link/20251216063801.2896495-1-rdunlap@infradead.org Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-12-22platform/x86: ibm_rtl: fix EBDA signature search pointer arithmeticJunrui Luo
The ibm_rtl_init() function searches for the signature but has a pointer arithmetic error. The loop counter suggests searching at 4-byte intervals but the implementation only advances by 1 byte per iteration. Fix by properly advancing the pointer by sizeof(unsigned int) bytes each iteration. Reported-by: Yuhao Jiang <danisjiang@gmail.com> Reported-by: Junrui Luo <moonafterrain@outlook.com> Fixes: 35f0ce032b0f ("IBM Real-Time "SMI Free" mode driver -v7") Signed-off-by: Junrui Luo <moonafterrain@outlook.com> Link: https://patch.msgid.link/SYBPR01MB78812D887A92DE3802D0D06EAFA9A@SYBPR01MB7881.ausprd01.prod.outlook.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-12-22platform/x86: msi-laptop: add missing sysfs_remove_group()Thomas Fourier
A sysfs group is created in msi_init() when old_ec_model is enabled, but never removed. Remove the msipf_old_attribute_group in that case. Fixes: 03696e51d75a ("msi-laptop: Disable brightness control for new EC") Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com> Link: https://patch.msgid.link/20251217103617.27668-2-fourier.thomas@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-12-22platform/x86: think-lmi: Add WMI certificate thumbprint support for ThinkCenterMark Pearson
The ThinkCenter team are adding WMI certificate thumbprint support. Updating the driver to enable it. They are using the same GUID as Thinkpad/ThinkStation. Tested on M75q Gen 5. Signed-off-by: Mark Pearson <mpearson-lenovo@squebb.ca> Link: https://patch.msgid.link/20251127202959.399040-1-mpearson-lenovo@squebb.ca Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-12-22platform/x86: dell-lis3lv02d: Add Latitude 5400Dmytro Bagrii
Add accelerometer address 0x29 for Dell Latitude 5400. The address is verified as below: $ cat /sys/class/dmi/id/product_name Latitude 5400 $ grep -H '' /sys/bus/pci/drivers/i801_smbus/0000\:00*/i2c-*/name /sys/bus/pci/drivers/i801_smbus/0000:00:1f.4/i2c-10/name:SMBus I801 adapter at 0000:00:1f.4 $ i2cdetect 10 WARNING! This program can confuse your I2C bus, cause data loss and worse! I will probe file /dev/i2c-10. I will probe address range 0x08-0x77. Continue? [Y/n] Y 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 08 -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- UU -- -- -- -- -- -- 30: 30 -- -- -- -- 35 UU UU -- -- -- -- -- -- -- -- 40: -- -- -- -- 44 -- -- -- -- -- -- -- -- -- -- -- 50: UU -- 52 -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- $ xargs -n1 -a /proc/cmdline | grep ^dell_lis3lv02d dell_lis3lv02d.probe_i2c_addr=1 $ dmesg | grep lis3lv02d ... [ 206.012411] i2c i2c-10: Probing for lis3lv02d on address 0x29 [ 206.013727] i2c i2c-10: Detected lis3lv02d on address 0x29, please report this upstream to platform-driver-x86@vger.kernel.org so that a quirk can be added [ 206.240841] lis3lv02d_i2c 10-0029: supply Vdd not found, using dummy regulator [ 206.240868] lis3lv02d_i2c 10-0029: supply Vdd_IO not found, using dummy regulator [ 206.261258] lis3lv02d: 8 bits 3DC sensor found [ 206.346722] input: ST LIS3LV02DL Accelerometer as /devices/faux/lis3lv02d/input/input17 $ cat /sys/class/input/input17/name ST LIS3LV02DL Accelerometer Signed-off-by: Dmytro Bagrii <dimich.dmb@gmail.com> Reviewed-by: Hans de Goede <johannes.goede@oss.qualcomm.com> Link: https://patch.msgid.link/20251128161523.6224-1-dimich.dmb@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-12-22platform/mellanox: mlxbf-pmc: Remove trailing whitespaces from event namesShravan Kumar Ramani
Some event names have trailing whitespaces at the end which causes programming of counters using the name for these specific events to fail and hence need to be removed. Fixes: 423c3361855c ("platform/mellanox: mlxbf-pmc: Add support for BlueField-3") Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com> Reviewed-by: David Thompson <davthompson@nvidia.com> Link: https://patch.msgid.link/065cbae0717dcc1169681c4dbb1a6e050b8574b3.1766059953.git.shravankr@nvidia.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-12-22platform/x86: asus-nb-wmi: Add keymap for display toggleTim Wassink
On the Asus Zenbook 14 (UX3405MA), the Fn+F7 key combination emits WMI code 0x2d, which was previously unmapped. Map this code to KEY_DISPLAYTOGGLE. This matches the behavior of the display toggle/projector mode key found on other Asus laptops, allowing userspace to handle multi-monitor switching or screen toggling. Tested on ASUS Zenbook 14 UX3405MA. Signed-off-by: Tim Wassink <timwassink.dev@gmail.com> Reviewed-by: Denis Benato <benato.denis96@gmail.com> Link: https://patch.msgid.link/20251221181724.19927-1-timwassink.dev@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-12-22arm64: dts: rockchip: Add support for CM5 IO carrierJoseph Kogut
Specification: - 1x HDMI - 2x MIPI DSI - 2x MIPI CSI - 1x eDP - 1x M.2 E key - 1x USB 3.0 Host - 1x USB 3.0 OTG - 2x USB 2.0 Host - Headphone jack w/ microphone - Gigabit Ethernet w/ PoE - microSD slot - 40-pin expansion header - 12V DC Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251205120703.14721-4-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Add rk3588 based Radxa CM5Joseph Kogut
Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a proprietary connector. Specification: - Rockchip RK3588 - Up to 32 GB LPDDR4X - Up to 128 GB eMMC - 1x HDMI TX up to 8k@60 hz - 1x eDP TX up to 4k@60 hz - Gigabit Ethernet PHY Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251205120703.14721-3-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22dt-bindings: arm: rockchip: Add Radxa CM5 IO boardJoseph Kogut
Add device tree binding for the Radxa CM5 IO board. This board is based on the rk3588s. Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251205120703.14721-2-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Fix Bluetooth on the RockPro64 boardRaphaël Jakse
The RockPro64 board has an optional BCM4345C5 Bluetooth device on UART0. This patch fixes audio stutters by setting its correct max-speed and compatible properties. Signed-off-by: Raphaël Jakse <raphael.kernel@jakse.fr> Link: https://patch.msgid.link/20251130161259.9828-1-raphael.kernel@jakse.fr Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Correctly describe the ethernet phy on rk3368-lionHeiko Stuebner
So far, the board used the phy implicitly using the deprecated snps reset properties. Improve that and describe the PHY correctly under the new mdio node. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20251020100757.3669681-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: add mdio subnode to gmac on rk3368Heiko Stuebner
This is needed to actually describe the per-board phys connected to the gmac when needed. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20251020100757.3669681-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: add gmac reset property to rk3368Heiko Stuebner
Add the reset of the gmac controller block. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20251020100757.3669681-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22drm/atomic: convert drm_atomic_get_{old, new}_colorop_state() into proper ↵Jani Nikula
functions There is no real reason to include drm_colorop.h from drm_atomic.h, as drm_atomic_get_{old,new}_colorop_state() have no real reason to be static inline. Convert the static inlines to proper functions, and drop the include to reduce the include dependencies and improve data hiding. v2: Fix vkms build failures (Alex) Fixes: cfc27680ee20 ("drm/colorop: Introduce new drm_colorop mode object") Cc: Simon Ser <contact@emersion.fr> Cc: Alex Hung <alex.hung@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Daniel Stone <daniels@collabora.com> Cc: Melissa Wen <mwen@igalia.com> Cc: Sebastian Wick <sebastian.wick@redhat.com> Cc: Alex Hung <alex.hung@amd.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Link: https://patch.msgid.link/20251219114939.1069851-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-12-22drm/xe/display: drop i915_utils.hJani Nikula
With the i915 switch to generic fault injection, display no longer needs the compat i915_utils.h. Remove it, along with a few includes. Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> Link: https://patch.msgid.link/20251219104036.855258-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-12-22arm64: dts: rockchip: add dma-coherent for pcie and gmac of RK3576Shawn Lin
The RK3576 SoC employs ARM CCI for maintaining cache coherency between the CPU cluster and high-speed peripherals including USB3, SATA, GMAC, and PCIe controllers. While the USB3 and SATA controllers were correctly marked as dma-coherent, the GMAC and PCIe nodes were overlooked. Without dma-coherent, the kernel falls back to software cache maintenance for DMA operations, requiring explicit cache flushing and invalidating. This adds significant overhead that degrades performance in high-throughput workloads. Add the missing dma-coherent properties to enable hardware coherency and avoid unnecessary software cache management overhead. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://patch.msgid.link/1764313762-78063-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Add EEPROMs for Radxa rk35xx boardsFUKAUMI Naoki
The BL24C16A EEPROM is found in the schematics for Radxa CM3I, Radxa ROCK 3A, 3B, 5B+, and 5T. [1] [2] [3] [4] [5] The BL24C16F EEPROM is found in the schematic for Radxa ROCK 4D. [6] Add these eeprom nodes. These are designed to have data written during factory programming (regardless of whether data is actually written or not), and we at Radxa permit users to read the data but not write to it. [8] Therefore, we will add a read-only property to the eeprom node. [1] https://dl.radxa.com/cm3i/docs/hw/radxa_cm3i_v1310_schematic.pdf p.8 [2] https://dl.radxa.com/rock3/docs/hw/3a/radxa_rock_3a_v1310_schematic.pdf p.7 [3] https://dl.radxa.com/rock3/docs/hw/3b/Radxa_ROCK_3B_V1.51_SCH.pdf p.35 [4] https://dl.radxa.com/rock5/5b+/docs/hw/radxa_rock5bp_v1.2_schematic.pdf p.29 [5] https://dl.radxa.com/rock5/5t/docs/hw/radxa_rock5t_schematic_v1.2_20250109.pdf p.36 [6] https://dl.radxa.com/rock4/4d/docs/hw/Radxa_ROCK_4D_SCH_V1.12.pdf p.23 [7] https://github.com/radxa/u-boot/blob/next-dev-v2024.10/drivers/misc/radxa-i2c-eeprom.c Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251202084941.1785-4-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Add EEPROMs for Radxa ROCK 4 boardsFUKAUMI Naoki
The BL24C04A EEPROM is found in the schematics for Radxa ROCK Pi 4A+ and 4B+. [1] [2] The BL24C16A EEPROM is found in the schematics for Radxa ROCK 4C+, 4SE, Radxa ROCK Pi 4A, 4B, and 4C. [3] [4] [5] [6] [7] However, newer boards/batches should have the BL24C16A, but older ones may have the BL24C04A. (the ROCK Pi 4B+ I own has a 16Kb EEPROM) For the ROCK Pi 4s (except the relatively new ROCK 4SE), add the BL24C04A eeprom node for backward compatibility. For the ROCK 4SE, add the BL24C16A eeprom node. These are designed to have data written during factory programming (regardless of whether data is actually written or not), and we at Radxa permit users to read the data but not write to it. [8] Therefore, we will add a read-only property to the eeprom node. [1] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/4ap/radxa_rock_4ap_v1730_schematic.pdf p.17 [2] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/4bp/radxa_rock_4bp_v1730_schematic.pdf p.17 [3] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/ROCK-4C+-V1.411-SCH.pdf p.22 [4] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/ROCK-4-SE-V1.53-SCH.pdf p.17 [5] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/4a/ROCK_4A_V1.52_SCH.pdf p.17 [6] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/4b/ROCK_4B_v1.52_SCH.pdf p.17 [7] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi4c_v12_sch_20200620.pdf p.17 [8] https://github.com/radxa/u-boot/blob/next-dev-v2024.10/drivers/misc/radxa-i2c-eeprom.c Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251202084941.1785-3-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1Shawn Lin
Add supports-clkreq and pinmux for PCIe ASPM L1 substates. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Hans Zhang <hans.zhang@cixtech.com> Link: https://patch.msgid.link/1764809428-183623-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: enable saradc for ArmSoM Sige5Chukun Pan
Add ADC support to ArmSoM Sige5 board. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Link: https://patch.msgid.link/20251220100010.26643-3-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: fix hp-det pin for ArmSoM Sige5Chukun Pan
Although the hp_det pin is not used, according to the schematic, the headphone detection pin is GPIO4_B0. Fix the incorrect pin. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://patch.msgid.link/20251220100010.26643-2-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: remove rtc regulator for ArmSoM Sige5Chukun Pan
According to the schematic, RTC is powered by vcc_3v3_s3. The vcc_3v3_rtc_s5 regulator does not exist, remove it. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://patch.msgid.link/20251220100010.26643-1-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22drm/i915: drop dependency on struct intel_display from i915 initial planeJani Nikula
The i915 core initial plane handling doesn't actually need struct intel_display for anything. Switch to i915 specific data structures in i915 core code. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/58d7605a16b360080921ff2af7120b6da2eb042d.1765812266.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-12-22drm/{i915, xe}: pass struct drm_device instead of drm_device to ->alloc_objJani Nikula
The initial plane parent interface ->alloc_obj hook no longer needs the crtc for anything. Pass struct drm_device instead. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/7a40381be6d98dc0916a5447be5dd6cba86cfd0a.1765812266.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
generated by cgit v1.2.3 (git 2.51.0) at 2026-11-09 13:26:52 +0000