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2026-01-06media: omap3isp: better VIDIOC_G/S_PARM handlingHans Verkuil
Fix various v4l2-compliance errors relating to timeperframe. VIDIOC_G/S_PARM is only supported for Video Output, so disable these ioctls for Capture devices. Ensure numerator and denominator are never 0. Set missing V4L2_CAP_TIMEPERFRAME capability for VIDIOC_S_PARM. v4l2-compliance: fail: v4l2-test-formats.cpp(1388): out->timeperframe.numerator == 0 || out->timeperframe.denominator == 0 test VIDIOC_G/S_PARM: FAIL Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-06media: omap3isp: implement create/prepare_bufsHans Verkuil
Add missing ioctls. This makes v4l2-compliance happier: warn: v4l2-test-buffers.cpp(813): VIDIOC_CREATE_BUFS not supported test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-06media: omap3isp: rework isp_video_try/set_formatHans Verkuil
isp_video_set_format now calls isp_video_try_format first, ensuring consistent behavior and removing duplicate code in both functions. This fixes an v4l2-compliance error: fail: v4l2-test-formats.cpp(519): !pix.sizeimage test VIDIOC_S_FMT: FAIL Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-06media: omap3isp: set initial formatHans Verkuil
Initialize the v4l2_format to a default. Empty formats are not allowed in V4L2, so this fixes v4l2-compliance issues: fail: v4l2-test-formats.cpp(514): !pix.width || !pix.height test VIDIOC_G_FMT: FAIL Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-06media: omap3isp: use V4L2_COLORSPACE_SRGB instead of _JPEGHans Verkuil
JPEG colorspace should generally not be used unless it is actually dealing with JPG data. This fixes v4l2-compliance errors: fail: v4l2-test-formats.cpp(416): pixelformat != V4L2_PIX_FMT_JPEG && pixelformat != V4L2_PIX_FMT_MJPEG && colorspace == V4L2_COLORSPACE_JPEG fail: v4l2-test-formats.cpp(521): testColorspace(!node->is_io_mc, pix.pixelformat, pix.colorspace, pix.ycbcr_enc, pix.quantization) test VIDIOC_TRY_FMT: FAIL Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-06media: omap3isp: implement enum_fmt_vid_cap/outHans Verkuil
Add missing ioctls. This makes v4l2-compliance happier: fail: v4l2-test-formats.cpp(516): pixelformat 59565955 (UYVY) for buftype 1 not reported by ENUM_FMT test VIDIOC_G_FMT: FAIL fail: v4l2-test-formats.cpp(516): pixelformat 59565955 (UYVY) for buftype 1 not reported by ENUM_FMT test VIDIOC_TRY_FMT: FAIL fail: v4l2-test-formats.cpp(516): pixelformat 56595559 (YUYV) for buftype 1 not reported by ENUM_FMT test VIDIOC_S_FMT: FAIL Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-06media: omap3isp: isp_video_mbus_to_pix/pix_to_mbus fixesHans Verkuil
The isp_video_mbus_to_pix/pix_to_mbus functions did not take the last empty entry { 0, } of the formats array into account. As a result, isp_video_mbus_to_pix would accept code 0 and isp_video_pix_to_mbus would select code 0 if no match was found. Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-06media: omap3isp: add V4L2_CAP_IO_MC and don't set bus_infoHans Verkuil
Since this is a media-centric device set the V4L2_CAP_IO_MC capability. Also don't set bus_info, leave that to the v4l2 core. This fixes v4l2-compliance errors: test MC information (see 'Media Driver Info' above): OK fail: v4l2-compliance.cpp(661): missing bus_info prefix ('media') Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-06media: omap3isp: configure entity functionsHans Verkuil
For the various subdevices, set the function field. This fixes v4l2-compliance errors: $ v4l2-compliance -M0 v4l2-compliance 1.33.0-5410, 32 bits, 64-bit time_t v4l2-compliance SHA: c12c89c5bd70 2025-10-05 09:58:42 Compliance test for omap3isp device /dev/media0: Media Driver Info: Driver name : omap3isp Model : TI OMAP3 ISP Serial : Bus info : platform:480bc000.isp Media version : 6.17.0 Hardware revision: 0x000000f0 (240) Driver version : 6.17.0 Required ioctls: test MEDIA_IOC_DEVICE_INFO: OK test invalid ioctls: OK Allow for multiple opens: test second /dev/media0 open: OK test MEDIA_IOC_DEVICE_INFO: OK test for unlimited opens: OK Media Controller ioctls: fail: v4l2-test-media.cpp(108): function == MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN fail: v4l2-test-media.cpp(196): checkFunction(ent.function, true) test MEDIA_IOC_G_TOPOLOGY: FAIL fail: v4l2-test-media.cpp(398): num_data_links != num_links test MEDIA_IOC_ENUM_ENTITIES/LINKS: FAIL test MEDIA_IOC_SETUP_LINK: OK Total for omap3isp device /dev/media0: 8, Succeeded: 6, Failed: 2, Warnings: 0 Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
2026-01-05x86,fs/resctrl: Handle events that can be read from any CPUTony Luck
resctrl assumes that monitor events can only be read from a CPU in the cpumask_t set of each domain. This is true for x86 events accessed with an MSR interface, but may not be true for other access methods such as MMIO. Introduce and use flag mon_evt::any_cpu, settable by architecture, that indicates there are no restrictions on which CPU can read that event. This flag is not supported by the L3 event reading that requires to be run on a CPU that belongs to the L3 domain of the event being read. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Link: https://lore.kernel.org/20251217172121.12030-1-tony.luck@intel.com
2026-01-05docs: fix PPR for AMD EPYC broken linkHaiyue Wang
As 'AMD Documentation Hub' [1] announced: "All technical documentation, including for AMD EPYC™ processors ..., and more is now hosted on the AMD Technical Information Portal (TIP) [2]". By searching the No.55898, update the new URL. [1] https://www.amd.com/en/search/documentation/hub.html [2] https://docs.amd.com/ Signed-off-by: Haiyue Wang <haiyuewa@163.com> Acked-by: Bagas Sanjaya <bagasdotme@gmail.com> Link: https://patch.msgid.link/20251230133101.14362-1-haiyuewa@163.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-05docs: alienware-wmi: fix typoAkiyoshi Kurita
Fix a typo in the manual fan control description ("aproximate" -> "approximate"). Signed-off-by: Akiyoshi Kurita <weibu@redadmin.org> Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com> Reviewed-by: Kurt Borja <kuurtb@gmail.com> Link: https://patch.msgid.link/20251230213431.656106-1-weibu@redadmin.org Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-05fs/resctrl: Make event details accessible to functions when reading eventsTony Luck
Reading monitoring event data from MMIO requires more context than the event id to be able to read the correct memory location. struct mon_evt is the appropriate place for this event specific context. Prepare for addition of extra fields to struct mon_evt by changing the calling conventions to pass a pointer to the mon_evt structure instead of just the event id. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Link: https://lore.kernel.org/20251217172121.12030-1-tony.luck@intel.com
2026-01-05platform/x86: asus-armoury: add support for GA403UVDenis Benato
Add TDP data for laptop model GA403UV. Signed-off-by: Denis Benato <denis.benato@linux.dev> Link: https://patch.msgid.link/20260103003731.404383-4-denis.benato@linux.dev Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-05asus-armoury: fix ppt data for GA403U* renaming to GA403UIDenis Benato
As some GA403U may have different limits restrict the DMI match to the specific GA403UI model. Fixes: 39ae6c50e599 ("platform/x86: asus-armoury: add ppt_* and nv_* tuning knobs") Signed-off-by: Denis Benato <denis.benato@linux.dev> Link: https://patch.msgid.link/20260103003731.404383-3-denis.benato@linux.dev Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-05platform/x86: asus-armoury: add support for GA403WMDenis Benato
Add TDP data for laptop model GA403WM. Signed-off-by: Denis Benato <denis.benato@linux.dev> Link: https://patch.msgid.link/20260103003731.404383-2-denis.benato@linux.dev Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-05soc: dove: pmu: Simplify with scoped for each OF child loopKrzysztof Kozlowski
Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2026-01-05ARM: shmobile: defconfig: Refresh for v6.19-rc1Geert Uytterhoeven
Refresh the defconfig for Renesas ARM systems: - Enable Renesas RZ/N1 ADC support, - Drop CONFIG_RPCSEC_GSS_KRB5=n (no longer auto-enabled since now commit 324be6dcbf09133a ('Revert "SUNRPC: Make RPCSEC_GSS_KRB5 select CRYPTO instead of depending on it"')). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/2dc339bee5bee0a425e2b00bbb784b0ec21a0a33.1766394793.git.geert+renesas@glider.be
2026-01-05arm64: defconfig: Enable PCIe for the Renesas RZ/G3S SoCClaudiu Beznea
Enable PCIe for the Renesas RZ/G3S SoC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20251119143523.977085-7-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: defconfig: Enable RZ/G3E USB3 PHY driverBiju Das
Enable the RZ/G3E USB3 PHY driver on the Renesas RZ/G3E SMARC EVK board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20250916150255.4231-10-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r8a779h0: Add WWDT nodesWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215034715.3406-14-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r8a779g0: Add WWDT nodesWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215034715.3406-13-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r8a779f0: Add WWDT nodesWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215034715.3406-12-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r8a779a0: Add WWDT nodesWolfram Sang
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215034715.3406-11-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r8a77980: Add WWDT nodesWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215034715.3406-10-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r8a77970: Add WWDT nodesWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215034715.3406-9-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: condor/v3hsk: Mark SWDT as reservedWolfram Sang
This watchdog can't be used with Linux because the firmware needs it on R-Car V3H boards. Sadly, it doesn't mark the node as reserved, so this is added manually here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215031318.2219-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r8a77980: Add SWDT nodeWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215031318.2219-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g056: Add TSU nodesOvidiu Panait
The Renesas RZ/V2N SoC includes a Thermal Sensor Unit (TSU) block designed to measure the junction temperature. The device provides real-time temperature measurements for thermal management, utilizing two dedicated channels for temperature sensing: - TSU0, which is located near the DRP-AI block - TSU1, which is located near the CPU and DRP-AI block Since TSU1 is physically closer the CPU and the highest temperature spot, it is used for CPU throttling through a passive trip and cooling map. TSU0 is configured only with a critical trip. Add TSU nodes along with thermal zones and keep them enabled in the SoC DTSI. Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251209091115.8541-4-ovidiu.panait.rb@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g087: Add DMAC supportCosmin Tanislav
The Renesas RZ/N2H (R9A09G087) SoC has three instances of the DMAC IP. Add support for them. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251205151254.2970669-7-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g077: Add DMAC supportCosmin Tanislav
The Renesas RZ/T2H (R9A09G077) SoC has three instances of the DMAC IP. Add support for them. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251205151254.2970669-6-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g087: Add ICU supportCosmin Tanislav
The Renesas RZ/N2H (R9A09G087) SoC has an Interrupt Controller (ICU) block that routes external interrupts to the GIC's SPIs, with the ability of level-translation, and can also produce software and aggregate error interrupts. Add support for it. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251201112933.488801-5-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g077: Add ICU supportCosmin Tanislav
The Renesas RZ/T2H (R9A09G077) SoC has an Interrupt Controller (ICU) block that routes external interrupts to the GIC's SPIs, with the ability of level-translation, and can also produce software and aggregate error interrupts. Add support for it. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251201112933.488801-4-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g047e57-smarc: Enable rsci{2,4,9} nodesBiju Das
Enable device rsci{2,4,9} nodes for the RZ/G3E SMARC EVK. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251129185203.380002-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: renesas-smarc2: Move aliases to board DTSBiju Das
SMARC2 board dtsi is common for multiple SoCs. So Move aliases to board DTS as SoC may have different IPs for a given alias. eg: RZ/G3S does not have RSCI interface. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20251129185203.380002-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g047: Add RSCI nodesBiju Das
Add RSCI nodes to RZ/G3E ("R9A09G047") SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251129185203.380002-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05ARM: dts: renesas: r9a06g032: Add Ethernet switch interruptsGeert Uytterhoeven
The Ethernet switch device node still lacks interrupts. Add them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/53d45eed3709cba589a4ef3e9ad198d7e44fd9a5.1764249063.git.geert+renesas@glider.be
2026-01-05arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add NMI wakeup button supportLad Prabhakar
Add support for the NMI connected user pushbutton on the RZ/V2N EVK. The button is wired to the SoC NMI input and can be used to wake the system from low-power states. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251125224533.294235-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g056: Add RSPI nodesLad Prabhakar
Add nodes for the RSPI IPs found in the Renesas RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251125224533.294235-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g056: Add DMAC nodesLad Prabhakar
Add nodes for the DMAC IPs found on the Renesas RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251125224533.294235-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g056: Add ICU nodeLad Prabhakar
Add node for the Interrupt Control Unit IP found on the Renesas RZ/V2N SoC, and modify the pinctrl node as its interrupt parent is the ICU node. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251125224533.294235-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g047e57-smarc: Remove duplicate SW_LCD_ENGeert Uytterhoeven
SW_LCD_EN is defined twice. Fixes: 9e95446b0cf93a91 ("arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/1f93558c62f4461f50935644ec831a7d2cb52630.1764089463.git.geert+renesas@glider.be
2026-01-05arm64: dts: renesas: r9a09g087: Add SPI nodesCosmin Tanislav
Add support for the four SPI controllers on the Renesas RZ/N2H Soc. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251119161434.595677-14-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g077: Add SPI nodesCosmin Tanislav
Add support for the four SPI controllers on the Renesas RZ/T2H Soc. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251119161434.595677-13-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: rzg3s-smarc: Enable PCIeClaudiu Beznea
The RZ Smarc Carrier-II board has PCIe headers mounted on it. Enable PCIe support. Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20251119143523.977085-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: rzg3s-smarc-som: Add PCIe reference clockClaudiu Beznea
Versa3 clock generator available on RZ/G3S SMARC Module provides the reference clock for SoC PCIe interface. Update the device tree to reflect this connection. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20251119143523.977085-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a08g045: Add PCIe nodeClaudiu Beznea
The RZ/G3S SoC has a variant (R9A08G045S33) which supports PCIe. Add the PCIe node. Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20251119143523.977085-4-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI ↵Lad Prabhakar
controller Enable the USB3.0 (CH0) host controllers on the RZ/V2N Evaluation Kit. The CN4 connector on the EVK provides access to the USB3.0 channel. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251119110505.100253-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodesLad Prabhakar
Add USB3 PHY/Host nodes to RZ/V2N ("R9A09G056") SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251119110505.100253-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI ↵Lad Prabhakar
controllers Enable the USB3.0 (CH0) and USB3.1 (CH1) host controllers on the RZ/V2H Evaluation Kit. The CN4 stacked connector on the EVK provides access to both channels, with CH0 corresponding to USB3.0 and CH1 to USB3.1. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251119110505.100253-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
generated by cgit v1.2.3 (git 2.51.0) at 2026-11-09 07:26:57 +0000