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2026-01-07i2c: k1: add reset supportEncrow Thorne
The K1 I2C controller provides a reset line that needs to be deasserted before the controller can be accessed. Add reset support to the driver to ensure the controller starts in the required state. Signed-off-by: Encrow Thorne <jyc0019@gmail.com> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251230150653.42097-2-jyc0019@gmail.com
2026-01-07dt-bindings: i2c: spacemit: add optional resetsEncrow Thorne
The I2C controller requires a reset to ensure it starts from a clean state. Add the 'resets' property to support this hardware requirement. Signed-off-by: Encrow Thorne <jyc0019@gmail.com> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251230150653.42097-1-jyc0019@gmail.com
2026-01-07HID: i2c-hid: fix potential buffer overflow in i2c_hid_get_report()Kwok Kin Ming
`i2c_hid_xfer` is used to read `recv_len + sizeof(__le16)` bytes of data into `ihid->rawbuf`. The former can come from the userspace in the hidraw driver and is only bounded by HID_MAX_BUFFER_SIZE(16384) by default (unless we also set `max_buffer_size` field of `struct hid_ll_driver` which we do not). The latter has size determined at runtime by the maximum size of different report types you could receive on any particular device and can be a much smaller value. Fix this by truncating `recv_len` to `ihid->bufsize - sizeof(__le16)`. The impact is low since access to hidraw devices requires root. Signed-off-by: Kwok Kin Ming <kenkinming2002@gmail.com> Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
2026-01-07drm/vmwgfx: Fix kernel-doc warnings for vmwgfx_fenceBartlomiej Kubik
Add missing descriptions for vmw_event_fence_action_seq_passed. This fixes the following warnings: drivers/gpu/drm/vmwgfx/vmwgfx_fence.c:526 function parameter 'f' not described in 'vmw_event_fence_action_seq_passed' drivers/gpu/drm/vmwgfx/vmwgfx_fence.c:526 function parameter 'cb' not described in 'vmw_event_fence_action_seq_passed' Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507040807.jKTxWGVQ-lkp@intel.com/ Signed-off-by: Bartlomiej Kubik <kubik.bartlomiej@gmail.com> Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Link: https://lore.kernel.org/all/20251211181044.4098689-1-kubik.bartlomiej@gmail.com/
2026-01-07NFS/localio: Deal with page bases that are > PAGE_SIZETrond Myklebust
When resending requests, etc, the page base can quickly grow larger than the page size. Fixes: 091bdcfcece0 ("nfs/localio: refactor iocb and iov_iter_bvec initialization") Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com> Reviewed-by: Mike Snitzer <snitzer@kernel.org>
2026-01-07NFS/localio: Stop further I/O upon hitting an errorTrond Myklebust
If the call into the filesystem results in an I/O error, then the next chunk of data won't be contiguous with the end of the last successful chunk. So break out of the I/O loop and report the results. Currently the localio code will do this for a short read/write, but not for an error. Fixes: 6a218b9c3183 ("nfs/localio: do not issue misaligned DIO out-of-order") Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com> Reviewed-by: Mike Snitzer <snitzer@kernel.org>
2026-01-07NFSv4.x: Directory delegations don't require any state recoveryTrond Myklebust
The state recovery code in nfs_end_delegation_return() is intended to allow regular files to recover cached open and lock state. It has no function for directory delegations, and may cause corruption. Fixes: 156b09482933 ("NFS: Request a directory delegation on ACCESS, CREATE, and UNLINK") Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
2026-01-07drm/xe: Validate preferred system memory placement in xe_svm_range_validateMatthew Brost
Ensure preferred system memory placement is checked in xe_svm_range_validate when dpagemap is NULL. Without this check, a prefetch to system memory may become a no-op because device memory is considered a valid placement. Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Fixes: 238dbc9d9f4a ("drm/xe: Use the vma attibute drm_pagemap to select where to migrate") Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Link: https://patch.msgid.link/20260106213443.1866797-1-matthew.brost@intel.com
2026-01-07Merge tag 'renesas-dts-for-v6.20-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.20 - Add USB3.2 host and more RSCI serial support for the RZ/G3E SoC and the RZ/G3E SMARC EVK board, - Add display and USB3.0 host support for the RZ/V2H and RZ/V2N SoCs and their EVK boards, - Add SPI NOR Flash support for the Yuridenki-Shokai Kakip board, - Add PCIe support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board, - Add SPI, interrupt controller, and DMAC support for the RZ/T2H, RZ/N2H, and RZ/V2N SoCs, - Add NMI wakeup button support for the RZ/V2N EVK board, - Add thermal support for the RZ/V2N SoC, - Add system watchdog timer support for R-Car V3H, which is reserved for secure firmware, - Add window watchdog timer support for R-Car V3M, V3H, and Gen4 SoCs, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (41 commits) arm64: dts: renesas: r8a779h0: Add WWDT nodes arm64: dts: renesas: r8a779g0: Add WWDT nodes arm64: dts: renesas: r8a779f0: Add WWDT nodes arm64: dts: renesas: r8a779a0: Add WWDT nodes arm64: dts: renesas: r8a77980: Add WWDT nodes arm64: dts: renesas: r8a77970: Add WWDT nodes arm64: dts: renesas: condor/v3hsk: Mark SWDT as reserved arm64: dts: renesas: r8a77980: Add SWDT node arm64: dts: renesas: r9a09g056: Add TSU nodes arm64: dts: renesas: r9a09g087: Add DMAC support arm64: dts: renesas: r9a09g077: Add DMAC support arm64: dts: renesas: r9a09g087: Add ICU support arm64: dts: renesas: r9a09g077: Add ICU support arm64: dts: renesas: r9a09g047e57-smarc: Enable rsci{2,4,9} nodes arm64: dts: renesas: renesas-smarc2: Move aliases to board DTS arm64: dts: renesas: r9a09g047: Add RSCI nodes ARM: dts: renesas: r9a06g032: Add Ethernet switch interrupts arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add NMI wakeup button support arm64: dts: renesas: r9a09g056: Add RSPI nodes arm64: dts: renesas: r9a09g056: Add DMAC nodes ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07drm/i915/selftest: Add throttle reason diagnostics to RPS selftestsSk Anirban
Report GPU throttle reasons when RPS tests fail to reach expected frequencies or power levels. v2: Read the throttle value before the spinner ends (Raag) Add a condition before printing throttle value (Krzysztof) v3: Extend throttle reasons debug support (Raag) v4: Cosmetic changes (Raag) Signed-off-by: Sk Anirban <sk.anirban@intel.com> Reviewed-by: Raag Jadav <raag.jadav@intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Link: https://patch.msgid.link/20251223101605.3304379-2-sk.anirban@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-01-07Merge tag 'aspeed-6.20-devicetree-0' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt First batch of ASPEED Arm devicetree changes for 6.20 New platforms: - NVIDIA MSX4 BMC The NVIDIA MSX4 HPM (host platform module) is a reference board for managing up to 8 PCIe connected NVIDIA GPUs via ConnectX-8 (CX8) SuperNICs. The BMC manages all GPUs and CX8s for both telemetry and firmware update via MCTP over USB. The host CPUs are dual socket Intel Granite Rapids processors. For more detail on this architecture: https://developer.nvidia.com/blog/nvidia-connectx-8-supernics-advance-ai-platform-architecture-with-pcie-gen6-connectivity/ Updated platforms: - ast2600-evb (ASPEED): Various tidy-ups to address binding warnings - bletchley (Meta): Watchdog fix, tidy-ups to address binding warnings - clemente (Meta): HDD LED fix, GPIO line names, EEPROMs - harma (Meta): fanboard presence GPIO - santabarbara (Meta): IPMB, GPIO line names, additional IO expander * tag 'aspeed-6.20-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: ARM: dts: aspeed: bletchley: Fix ADC vref property names ARM: dts: aspeed: bletchley: Remove unused i2c13 property ARM: dts: aspeed: bletchley: Remove unused pca9539 properties ARM: dts: aspeed: bletchley: Fix SPI GPIO property names ARM: dts: aspeed: bletchley: Use generic node names ARM: dts: aspeed: g6: Drop clocks property from arm,armv7-timer ARM: dts: aspeed: ast2600-evb: Tidy up A0 work-around for UART5 ARM: dts: aspeed: g6: Drop unspecified aspeed,ast2600-udma node ARM: dts: aspeed: Drop syscon compatible from EDAC in g6 dtsi ARM: dts: aspeed: Use specified wp-inverted property for AST2600 EVB ARM: dts: aspeed: Remove sdhci-drive-type property from AST2600 EVB ARM: dts: aspeed: Add NVIDIA MSX4 HPM dt-bindings: arm: aspeed: Add NVIDIA MSX4 board ARM: dts: aspeed: clemente: move hdd_led to its own gpio-leds group ARM: dts: aspeed: clemente: add gpio line name to io expander ARM: dts: aspeed: santabarbara: Enable ipmb device for OCP debug card ARM: dts: aspeed: santabarbara: Add swb IO expander and gpio line names ARM: dts: aspeed: clemente: Add EEPROMs for boot and data drive FRUs ARM: dts: aspeed: harma: add fanboard presence sgpio ARM: dts: aspeed: bletchley: remove WDTRST1 assertion from wdt1 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07Merge tag 'arm-soc/for-6.19/devicetree-arm64' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom ARM64-based SoCs Device Tre updates for 6.19, please pull the following: - Peter enables the random number generator on BCM2712 - Stanimir adds the watchdog Device Tree node for BCM2712 * tag 'arm-soc/for-6.19/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcm2712: Add watchdog DT node arm64: dts: broadcom: bcm2712: Enable RNG Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07kunit: tool: test: Don't rely on implicit working directory changeThomas Weißschuh
If no kunitconfig_paths are passed to LinuxSourceTree() it falls back to DEFAULT_KUNITCONFIG_PATH. This resolution only works when the current working directory is the root of the source tree. This works by chance when running the full testsuite through the default unittest runner, as some tests will change the current working directory as a side-effect of 'kunit.main()'. When running a single testcase or using pytest, which resets the working directory for each test, this assumption breaks. Explicitly specify an empty kunitconfig for the affected tests. Link: https://lore.kernel.org/r/20260107015936.2316047-2-davidgow@google.com Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Reviewed-by: David Gow <davidgow@google.com> Signed-off-by: David Gow <davidgow@google.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2026-01-07kunit: tool: test: Rename test_data_path() to _test_data_path()Thomas Weißschuh
Running the KUnit testsuite through pytest fails, as the function test_data_path() is recognized as a test function. Its execution fails as pytest tries to resolve the 'path' argument as a fixture which does not exist. Rename the function, so the helper function is not incorrectly recognized as a test function. Link: https://lore.kernel.org/r/20260107015936.2316047-1-davidgow@google.com Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Reviewed-by: David Gow <davidgow@google.com> Signed-off-by: David Gow <davidgow@google.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2026-01-07drm/vmwgfx: Fix an error return check in vmw_compat_shader_add()Haoxiang Li
In vmw_compat_shader_add(), the return value check of vmw_shader_alloc() is not proper. Modify the check for the return pointer 'res'. Found by code review and compiled on ubuntu 20.04. Fixes: 18e4a4669c50 ("drm/vmwgfx: Fix compat shader namespace") Cc: stable@vger.kernel.org Signed-off-by: Haoxiang Li <lihaoxiang@isrc.iscas.ac.cn> Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Link: https://patch.msgid.link/20251224091105.1569464-1-lihaoxiang@isrc.iscas.ac.cn
2026-01-07arm64: dts: hisilicon: hikey960: Drop "snps,gctl-reset-quirk" and ↵Rob Herring (Arm)
"snps,tx_de_emphasis*" properties "snps,tx_de_emphasis" is supposed to be a u8, not a u32. Since it is big endian, 0 will be read rather than 1. The DWC3 Linux driver simply ORs the value if "snps,tx_de_emphasis_quirk" is set, so the 2 properties have no effect. (The driver doesn't clear the field either which is another problem). "snps,gctl-reset-quirk" is not documented nor used in the driver, so drop it as well. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260105174002.2997615-1-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07arm64: dts: marvell: change regulator-gpio to regulator-fixedRob Herring (Arm)
A "regulator-gpio" must have a GPIO control, hence the name. There's no GPIO on a couple of Marvell platforms at least as far as the DT is defined, so change the regulator type from GPIO to fixed. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2026-01-07arm64: dts: marvell: cn9131-cf-solidwan: Add missing GPIO properties on ↵Rob Herring (Arm)
"nxp,pca9536" The PCA9536 is always a GPIO provider, so add the missing properties. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2026-01-07Merge tag 'imx-fixes-6.19' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 6.19: - A mba8mx fix from Alexander Stein to correct Ethernet PHY IRQ trigger type - An i.MX95 fix from Carlos Song to correct I3C2 pclk - A couple of imx8qm-mek changes from Haibo Chen to fix light sensor interrupt type and usdhc2 regulator configuration - An imx6q-ba16 change from Ian Ray to fix RTC interrupt level - An imx8mp-dhcom-som change from Marek Vasut to fix sporadic Ethernet link bouncing caused by interruptions on the PHY reference clock - A couple of imx8mp-tx8p changes from Maud Spierings to fix compatible and eqos nvmem-cells - An ARM i.MX fix from Rob Herring to correct mc13xxx LED node names - An imx8qm-ss-dma change from Sherry Sun to correct DMA channels for LPUART - A couple of imx95-toradex-smarc changes from Vitor Soares to fix ethphy1 interrupt and SMARC_SDIO_WP label position * tag 'imx-fixes-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: mba8mx: Fix Ethernet PHY IRQ support arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart arm64: dts: imx8mp: Fix LAN8740Ai PHY reference clock on DH electronics i.MX8M Plus DHCOM arm64: dts: freescale: tx8p-ml81: fix eqos nvmem-cells arm64: dts: freescale: moduline-display: fix compatible dt-bindings: arm: fsl: moduline-display: fix compatible ARM: dts: imx6q-ba16: fix RTC interrupt level arm64: dts: freescale: imx95-toradex-smarc: fix SMARC_SDIO_WP label position arm64: dts: freescale: imx95-toradex-smarc: use edge trigger for ethphy1 interrupt arm64: dts: add off-on-delay-us for usdhc2 regulator arm64: dts: imx8qm-mek: correct the light sensor interrupt type to low level ARM: dts: nxp: imx: Fix mc13xxx LED node names arm64: dts: imx95: correct I3C2 pclk to IMX95_CLK_BUSWAKEUP Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07arm64: dts: marvell: Fix stray and typo "pinctrl-names" propertiesRob Herring (Arm)
There's several cases of "pinctrl-names" used without any "pinctrl-0" properties. Drop them. Fix the typo "pintrl-names" as well. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2026-01-07arm64: dts: marvell: Add missing "#phy-cells" to "usb-nop-xceiv"Rob Herring (Arm)
The "usb-nop-xceiv" binding requires "#phy-cells" property with a value of 0 though it is not really used. Add it where missing from Marvell platforms. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2026-01-07Documentation/process: maintainer-soc: Mark 'make' as commandsKrzysztof Kozlowski
Improve readability of the docs by marking 'make dtbs/dtbs_check' as shell commands. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://lore.kernel.org/r/20251223142726.73417-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07Documentation/process: maintainer-soc: Be more explicit about defconfigKrzysztof Kozlowski
It is already documented but people still send noticeable amount of patches ignoring the rule - get_maintainers.pl does not work on arm64/configs/defconfig or any other shared ARM defconfig. Be more explicit, that one must not rely on typical/simple approach here for getting To/Cc list. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://lore.kernel.org/r/20251223142726.73417-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07Merge tag 'arm-soc/for-6.19/devicetree-arm64-fixes' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/fixes This pull request contains Broadcom ARM64-SoC Device Tree fixes for 6.19, please pull the following: - Andrea fixes the RP1 DeviceTree hierarchy and drop overlay support, this resolves a number of DTC warnings and other issues * tag 'arm-soc/for-6.19/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: rp1: drop RP1 overlay arm64: dts: broadcom: bcm2712: fix RP1 endpoint PCI topology misc: rp1: drop overlay support dt-bindings: misc: pci1de4,1: add required reg property for endpoint Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07drm/vmwgfx: Merge vmw_bo_release and vmw_bo_free functionsIan Forbes
Some of the warnings need to be reordered between these two functions in order to be correct. This has happened multiple times. Merging them solves this problem once and for all. Fixes: d6667f0ddf46 ("drm/vmwgfx: Fix handling of dumb buffers") Signed-off-by: Ian Forbes <ian.forbes@broadcom.com> Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Link: https://patch.msgid.link/20260107152059.3048329-1-ian.forbes@broadcom.com
2026-01-07drm/vmwgfx: Fix KMS with 3D on HW version 10Ian Forbes
HW version 10 does not have GB Surfaces so there is no backing buffer for surface backed FBs. This would result in a nullptr dereference and crash the driver causing a black screen. Fixes: 965544150d1c ("drm/vmwgfx: Refactor cursor handling") Signed-off-by: Ian Forbes <ian.forbes@broadcom.com> Reviewed-by: Zack Rusin <zack.rusin@broadcom.com> Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Link: https://patch.msgid.link/20251114203703.1946616-1-ian.forbes@broadcom.com
2026-01-07usb: core: add USB_QUIRK_NO_BOS for devices that hang on BOS descriptorJohannes Brüderl
Add USB_QUIRK_NO_BOS quirk flag to skip requesting the BOS descriptor for devices that cannot handle it. Add Elgato 4K X (0fd9:009b) to the quirk table. This device hangs when the BOS descriptor is requested at SuperSpeed Plus (10Gbps). Link: https://bugzilla.kernel.org/show_bug.cgi?id=220027 Cc: stable <stable@kernel.org> Signed-off-by: Johannes Brüderl <johannes.bruederl@gmail.com> Link: https://patch.msgid.link/20251207090220.14807-1-johannes.bruederl@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-01-07clk: qcom: Add support for GPUCC and GXCLK for KaanapaliTaniya Das
Support the graphics clock controller for Kaanapali for Graphics SW driver to use the clocks. GXCLKCTL (Graphics GX Clock Controller) is a block dedicated to managing clocks for the GPU subsystem on GX power domain. The GX clock controller driver manages only the GX GDSC and the rest of the resources of the controller are managed by the firmware. Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-11-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: Add support for VideoCC driver for KaanapaliTaniya Das
Enable Kaanapali video clock driver for video SW to be able to control the clocks from the Video SW driver. Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-10-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: camcc: Add support for camera clock controller for KaanapaliTaniya Das
Add support for the Camera Clock Controller (CAMCC) on the Kaanapali platform. The CAMCC block on Kaanapali includes both the primary camera clock controller and the Camera BIST clock controller, which provides the functional MCLK required for camera operations. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-9-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: dispcc: Add support for display clock controller KaanapaliTaniya Das
Support the clock controller driver for Kaanapali to enable display SW to be able to control the clocks. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-8-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: clk-alpha-pll: Add support for controlling Pongo EKO_T PLLTaniya Das
Add clock ops for Pongo EKO_T PLL, add the pll ops for supporting the PLL. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-2-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: clk-alpha-pll: Update the PLL support for cal_lTaniya Das
Recent QCOM PLLs require the CAL_L field to be programmed according to specific hardware recommendations, rather than using the legacy default value of 0x44. Hardcoding this value can lead to suboptimal or incorrect behavior on newer platforms. To address this, introduce a `cal_l` field in the PLL configuration structure, allowing CAL_L to be set explicitly based on platform requirements. This improves flexibility and ensures correct PLL initialization across different hardware variants. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-1-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07Merge branch '20260107-kaanapali-mmcc-v3-v3-0-8e10adc236a8@oss.qualcomm.com' ↵Bjorn Andersson
into clk-for-6.20 Merge the Kaanapali camera, display, GPU, and video clock controller bindings through a topic branch, to allow making them available to the DeviceTree branch as well.
2026-01-07clk: qcom: camcc: Add camera clock controller driver for SM8750 SoCTaniya Das
Add support for the Camera Clock Controller (CAMCC) on the SM8750 platform. The CAMCC block on SM8750 includes both the primary camera clock controller and the Camera BIST clock controller, which provides the functional MCLK required for camera operations. Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251202-sm8750_camcc-v1-3-b3f7ef6723f1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: clk-alpha-pll: Add support for controlling Rivian PLLTaniya Das
Add clock ops for Rivian ELU and EKO_T PLLs, add the register offsets for the Rivian ELU PLL. Since ELU and EKO_T shared the same offsets and PLL ops, reuse the Rivian EKO_T enum. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-3-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07dt-bindings: clock: qcom: document the Kaanapali GPU Clock ControllerTaniya Das
Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and Power domains (GDSC), but the requirement from the SW driver is to use the GDSC power domain from the clock controller to recover the GPU firmware in case of any failure/hangs. The rest of the resources of the clock controller are being used by the firmware of GPU. This module exposes the GDSC power domains which helps the recovery of Graphics subsystem. Add bindings documentation for the Kaanapali Graphics Clock and Graphics power domain Controller for Kaanapali SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-7-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07dt-bindings: clock: qcom: Add Kaanapali video clock controllerTaniya Das
Add device tree bindings for the video clock controller on Qualcomm Kaanapali SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-6-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07dt-bindings: clock: qcom: Add support for CAMCC for KaanapaliTaniya Das
Update the compatible and the bindings for CAMCC support on Kaanapali SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-5-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07dt-bindings: clock: qcom: document Kaanapali DISPCC clock controllerTaniya Das
Document device tree bindings for display clock controller for Qualcomm Kaanapali SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-4-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07Merge branch '20251202-sm8750_camcc-v1-2-b3f7ef6723f1@oss.qualcomm.com' into ↵Bjorn Andersson
clk-for-6.20 Merge the SM8750 camera clock controller binding through a topic branch, in order to allow the defines to made availabe to the DeviceTree branch as well.
2026-01-07dt-bindings: clock: qcom: Add camera clock controller for SM8750 SoCTaniya Das
Add device tree bindings for the camera clock controller on Qualcomm SM8750 platform. The camera clock controller is split between camcc and cambist. The cambist controls the mclks of the camera clock controller. Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251202-sm8750_camcc-v1-2-b3f7ef6723f1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: gcc-ipq5018: flag sleep clock as criticalGeorge Moussalem
The sleep clock never be disabled. To avoid the kernel trying to disable it and keep it always on, flag it as critical. Fixes: e3fdbef1bab8 ("clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018") Signed-off-by: George Moussalem <george.moussalem@outlook.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251128-ipq5018-sleep-clk-fix-v1-1-6f4b75ec336c@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: gcc-msm8917: Remove ALWAYS_ON flag from cpp_gdscBarnabás Czémán
cpp_gdsc should not be always on, ALWAYS_ON flag was set accidentally. Fixes: 33cc27a47d3a ("clk: qcom: Add global clock controller driver for MSM8917") Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251117-fix-gdsc-cpp-msm8917-msm8953-v1-2-db33adcff28a@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: gcc-msm8953: Remove ALWAYS_ON flag from cpp_gdscBarnabás Czémán
cpp_gdsc should not be always on, ALWAYS_ON flag was set accidentally. Fixes: 9bb6cfc3c77e ("clk: qcom: Add Global Clock Controller driver for MSM8953") Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251117-fix-gdsc-cpp-msm8917-msm8953-v1-1-db33adcff28a@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: gcc: Add support for Global Clock controller found on SDM439Daniil Titov
Modify existing MSM8917 driver to support SDM439 SoC. SDM439 SoC has the same changes as MSM8937 SoC, but with different gpll3 vco rate and different GFX3D clock frequency table. Signed-off-by: Daniil Titov <daniilt971@gmail.com> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251117-gcc-msm8940-sdm439-v2-4-4af57c8bc7eb@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07dt-bindings: clock: qcom: Add SDM439 Global Clock ControllerBarnabás Czémán
Add devicetree bindings for the global clock controller on Qualcomm SDM439 platform. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20251117-gcc-msm8940-sdm439-v2-3-4af57c8bc7eb@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07clk: qcom: gcc: Add support for Global Clock controller found on MSM8940Daniil Titov
Modify existing MSM8917 driver to support MSM8940 SoC. MSM8940 SoC has the same changes as MSM8937 SoC, but with additional IPA clk and different GFX3D clock frequency table. Signed-off-by: Daniil Titov <daniilt971@gmail.com> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251117-gcc-msm8940-sdm439-v2-2-4af57c8bc7eb@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07dt-bindings: clock: qcom: Add MSM8940 Global Clock ControllerBarnabás Czémán
Add devicetree bindings for the global clock controller on Qualcomm MSM8940 platform. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20251117-gcc-msm8940-sdm439-v2-1-4af57c8bc7eb@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-07dt-bindings: remoteproc: Add HSM M4F core on TI K3 SoCsBeleswar Padhi
Some of the TI K3 family of SoCs have a HSM (High Security Module) M4F core in the Wakeup Voltage Domain which could be used to run secure services like Authentication. Add the device tree bindings document for this HSM M4F core. The added example illustrates the DT node for the HSM core present on K3 J722S SoC. Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106104755.948086-2-b-padhi@ti.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
generated by cgit v1.2.3 (git 2.51.0) at 2026-11-09 04:17:44 +0000