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authorZhenyu Wang2009-07-10 14:39:59 +0800
committerEric Anholt2009-07-10 14:11:06 -0700
commit5019914ca3b7517b2d82db2e92e3f683ac48e535 (patch)
tree3415d0d5b89cae51076567854f68f0148b69506c /tools/perf/scripts/python/stackcollapse.py
parentd05ca301997c94c2ef3c112b15319d13fa8cddab (diff)
drm/i915: Fix for LVDS VBT change on IGDNG
IGDNG mobile chip's LVDS data block removes panel fitting register definition. So this fixes offset for LVDS timing block parsing. Thanks for Michael Fu to catch this. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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