diff options
| author | Akshay Jindal | 2025-10-12 23:36:09 +0530 |
|---|---|---|
| committer | Jonathan Cameron | 2025-10-19 11:59:23 +0100 |
| commit | a2ef0af1923ba3fa0b46adfd8fb01d5920906980 (patch) | |
| tree | b06571942239b48a6f1c31d1eeb5ed02bbddd2fc /drivers/iio/accel | |
| parent | 36bf0de9d6ec8f5ce50bdb9f2bd90150c9026d9a (diff) | |
iio: accel: bma400: Use macros for generic event configuration values
Add macros and enums for configuration values used in generic event
handling for activity and inactivity detection. Replace hard-coded
values in activity_event_en() with the new definitions to make the
configuration explicit.
No functional changes are intended.
Signed-off-by: Akshay Jindal <akshayaj.lkd@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/accel')
| -rw-r--r-- | drivers/iio/accel/bma400.h | 30 | ||||
| -rw-r--r-- | drivers/iio/accel/bma400_core.c | 14 |
2 files changed, 41 insertions, 3 deletions
diff --git a/drivers/iio/accel/bma400.h b/drivers/iio/accel/bma400.h index fcafd1fba57a..12e7bf5fe647 100644 --- a/drivers/iio/accel/bma400.h +++ b/drivers/iio/accel/bma400.h @@ -113,8 +113,38 @@ #define BMA400_GEN1INT_CONFIG0_REG 0x3f #define BMA400_GEN2INT_CONFIG0_REG 0x4A #define BMA400_GENINT_CONFIG0_HYST_MASK GENMASK(1, 0) +#define BMA400_GENINT_CONFIG0_REF_UPD_MODE_MASK GENMASK(3, 2) +#define BMA400_GENINT_CONFIG0_DATA_SRC_MASK BIT(4) +#define BMA400_GENINT_CONFIG0_X_EN_MASK BIT(5) +#define BMA400_GENINT_CONFIG0_Y_EN_MASK BIT(6) +#define BMA400_GENINT_CONFIG0_Z_EN_MASK BIT(7) + +enum bma400_accel_data_src { + ACCEL_FILT1 = 0x0, + ACCEL_FILT2 = 0x1, +}; + +enum bma400_ref_updt_mode { + BMA400_REF_MANUAL_UPDT_MODE = 0x0, + BMA400_REF_ONETIME_UPDT_MODE = 0x1, + BMA400_REF_EVERYTIME_UPDT_MODE = 0x2, + BMA400_REF_EVERYTIME_LP_UPDT_MODE = 0x3, +}; #define BMA400_GEN_CONFIG1_OFF 0x01 +#define BMA400_GENINT_CONFIG1_AXES_COMB_MASK BIT(0) +#define BMA400_GENINT_CONFIG1_DETCT_CRIT_MASK BIT(1) + +enum bma400_genintr_acceleval_axescomb { + BMA400_EVAL_X_OR_Y_OR_Z = 0x0, + BMA400_EVAL_X_AND_Y_AND_Z = 0x1, +}; + +enum bma400_detect_criterion { + BMA400_DETECT_INACTIVITY = 0x0, + BMA400_DETECT_ACTIVITY = 0x1, +}; + #define BMA400_GEN_CONFIG2_OFF 0x02 #define BMA400_GEN_CONFIG3_OFF 0x03 #define BMA400_GEN_CONFIG31_OFF 0x04 diff --git a/drivers/iio/accel/bma400_core.c b/drivers/iio/accel/bma400_core.c index 2324c4ef645c..46855073ce3a 100644 --- a/drivers/iio/accel/bma400_core.c +++ b/drivers/iio/accel/bma400_core.c @@ -1166,14 +1166,16 @@ static int bma400_activity_event_en(struct bma400_data *data, case IIO_EV_DIR_RISING: reg = BMA400_GEN1INT_CONFIG0_REG; msk = BMA400_INT_CONFIG0_GEN1_MASK; - value = 2; + value = FIELD_PREP(BMA400_GENINT_CONFIG1_AXES_COMB_MASK, BMA400_EVAL_X_OR_Y_OR_Z) | + FIELD_PREP(BMA400_GENINT_CONFIG1_DETCT_CRIT_MASK, BMA400_DETECT_ACTIVITY); set_mask_bits(&field_value, BMA400_INT_CONFIG0_GEN1_MASK, FIELD_PREP(BMA400_INT_CONFIG0_GEN1_MASK, state)); break; case IIO_EV_DIR_FALLING: reg = BMA400_GEN2INT_CONFIG0_REG; msk = BMA400_INT_CONFIG0_GEN2_MASK; - value = 0; + value = FIELD_PREP(BMA400_GENINT_CONFIG1_AXES_COMB_MASK, BMA400_EVAL_X_OR_Y_OR_Z) | + FIELD_PREP(BMA400_GENINT_CONFIG1_DETCT_CRIT_MASK, BMA400_DETECT_INACTIVITY); set_mask_bits(&field_value, BMA400_INT_CONFIG0_GEN2_MASK, FIELD_PREP(BMA400_INT_CONFIG0_GEN2_MASK, state)); break; @@ -1182,7 +1184,13 @@ static int bma400_activity_event_en(struct bma400_data *data, } /* Enabling all axis for interrupt evaluation */ - ret = regmap_write(data->regmap, reg, 0xF8); + ret = regmap_write(data->regmap, reg, + BMA400_GENINT_CONFIG0_X_EN_MASK | + BMA400_GENINT_CONFIG0_Y_EN_MASK | + BMA400_GENINT_CONFIG0_Z_EN_MASK| + FIELD_PREP(BMA400_GENINT_CONFIG0_DATA_SRC_MASK, ACCEL_FILT2)| + FIELD_PREP(BMA400_GENINT_CONFIG0_REF_UPD_MODE_MASK, + BMA400_REF_EVERYTIME_UPDT_MODE)); if (ret) return ret; |