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<title>kernel.git/tools/arch/riscv/include/asm/fence.h, branch master</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=master</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=master'/>
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<updated>2024-09-20T08:46:46Z</updated>
<entry>
<title>tools: Add riscv barrier implementation</title>
<updated>2024-09-20T08:46:46Z</updated>
<author>
<name>Charlie Jenkins</name>
</author>
<published>2024-08-06T22:01:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6d74d178fe6eaf61e384f3be6ba64150bddce8a6'/>
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<content type='text'>
Many of the other architectures use their custom barrier implementations.
Use the barrier code from the kernel sources to optimize barriers in
tools.

Signed-off-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Reviewed-by: Andrea Parri &lt;parri.andrea@gmail.com&gt;
Link: https://lore.kernel.org/r/20240806-optimize_ring_buffer_read_riscv-v2-1-ca7e193ae198@rivosinc.com
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
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