<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/tools/arch/arm64/include/asm/sysreg.h, branch linux-rolling-lts</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-rolling-lts</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-rolling-lts'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2025-08-21T23:31:56Z</updated>
<entry>
<title>KVM: arm64: Get rid of ARM64_FEATURE_MASK()</title>
<updated>2025-08-21T23:31:56Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-08-17T20:21:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0843e0ced338d07c8bcec5675c560a94d05a4d41'/>
<id>urn:sha1:0843e0ced338d07c8bcec5675c560a94d05a4d41</id>
<content type='text'>
The ARM64_FEATURE_MASK() macro was a hack introduce whilst the
automatic generation of sysreg encoding was introduced, and was
too unreliable to be entirely trusted.

We are in a better place now, and we could really do without this
macro. Get rid of it altogether.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20250817202158.395078-7-maz@kernel.org
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>arm64: tools: Resync sysreg.h</title>
<updated>2025-05-06T16:35:03Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-04-26T10:17:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3654f454bcfdd17446544841bcac3803907122ff'/>
<id>urn:sha1:3654f454bcfdd17446544841bcac3803907122ff</id>
<content type='text'>
Perform a bulk resync of tools/arch/arm64/include/asm/sysreg.h.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: sysreg: Add layout for ICH_MISR_EL2</title>
<updated>2025-03-03T22:51:51Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-02-25T17:29:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b7a252e881f3322abb9ec899d13dbf7bae7d9bea'/>
<id>urn:sha1:b7a252e881f3322abb9ec899d13dbf7bae7d9bea</id>
<content type='text'>
The ICH_MISR_EL2-related macros are missing a number of status
bits that we are about to handle. Take this opportunity to fully
describe the layout of that register as part of the automatic
generation infrastructure.

Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20250225172930.1850838-4-maz@kernel.org
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>arm64: sysreg: Add layout for ICH_VTR_EL2</title>
<updated>2025-03-03T22:51:51Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-02-25T17:29:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5815fb82dc67c936f2881e601f046faa6ff577be'/>
<id>urn:sha1:5815fb82dc67c936f2881e601f046faa6ff577be</id>
<content type='text'>
The ICH_VTR_EL2-related macros are missing a number of config
bits that we are about to handle. Take this opportunity to fully
describe the layout of that register as part of the automatic
generation infrastructure.

This results in a bit of churn to repaint constants that are now
generated with a different format.

Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20250225172930.1850838-3-maz@kernel.org
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>arm64: sysreg: Add layout for ICH_HCR_EL2</title>
<updated>2025-03-03T22:51:51Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-02-25T17:29:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=22513c0d2ad86af126a221ae4cc804b346bce374'/>
<id>urn:sha1:22513c0d2ad86af126a221ae4cc804b346bce374</id>
<content type='text'>
The ICH_HCR_EL2-related macros are missing a number of control
bits that we are about to handle. Take this opportunity to fully
describe the layout of that register as part of the automatic
generation infrastructure.

This results in a bit of churn, unfortunately.

Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20250225172930.1850838-2-maz@kernel.org
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>arm64/sysreg/tools: Move TRFCR definitions to sysreg</title>
<updated>2025-01-12T12:50:11Z</updated>
<author>
<name>James Clark</name>
</author>
<published>2025-01-06T14:24:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c382ee674c8b5005798606267d660cf995218b18'/>
<id>urn:sha1:c382ee674c8b5005798606267d660cf995218b18</id>
<content type='text'>
Convert TRFCR to automatic generation. Add separate definitions for ELx
and EL2 as TRFCR_EL1 doesn't have CX. This also mirrors the previous
definition so no code change is required.

Also add TRFCR_EL12 which will start to be used in a later commit.

Unfortunately, to avoid breaking the Perf build with duplicate
definition errors, the tools copy of the sysreg.h header needs to be
updated at the same time rather than the usual second commit. This is
because the generated version of sysreg
(arch/arm64/include/generated/asm/sysreg-defs.h), is currently shared
and tools/ does not have its own copy.

Reviewed-by: Mark Brown &lt;broonie@kernel.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Signed-off-by: James Clark &lt;james.clark@linaro.org&gt;
Link: https://lore.kernel.org/r/20250106142446.628923-4-james.clark@linaro.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>tools: arm64: Update sysreg.h header files</title>
<updated>2025-01-12T12:50:11Z</updated>
<author>
<name>James Clark</name>
</author>
<published>2025-01-06T14:24:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=38138762faffeb923d9f49efbcc09884f1530786'/>
<id>urn:sha1:38138762faffeb923d9f49efbcc09884f1530786</id>
<content type='text'>
Created with the following:

  cp include/linux/kasan-tags.h tools/include/linux/
  cp arch/arm64/include/asm/sysreg.h tools/arch/arm64/include/asm/

Update the tools copy of sysreg.h so that the next commit to add a new
register doesn't have unrelated changes in it. Because the new version
of sysreg.h includes kasan-tags.h, that file also now needs to be copied
into tools.

Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Reviewed-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Signed-off-by: James Clark &lt;james.clark@linaro.org&gt;
Link: https://lore.kernel.org/r/20250106142446.628923-3-james.clark@linaro.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64/sysreg: Update PIE permission encodings</title>
<updated>2024-04-28T07:28:27Z</updated>
<author>
<name>Shiqi Liu</name>
</author>
<published>2024-04-21T06:33:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=12d712dc8e4f1a30b18f8c3789adfbc07f5eb050'/>
<id>urn:sha1:12d712dc8e4f1a30b18f8c3789adfbc07f5eb050</id>
<content type='text'>
Fix left shift overflow issue when the parameter idx is greater than or
equal to 8 in the calculation of perm in PIRx_ELx_PERM macro.

Fix this by modifying the encoding to use a long integer type.

Signed-off-by: Shiqi Liu &lt;shiqiliu@hust.edu.cn&gt;
Acked-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/20240421063328.29710-1-shiqiliu@hust.edu.cn
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>tools headers arm64: Update sysreg.h with kernel sources</title>
<updated>2023-10-18T23:36:25Z</updated>
<author>
<name>Jing Zhang</name>
</author>
<published>2023-10-11T19:57:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0359c946b13153bd57fac65f4f3600ba5673e3de'/>
<id>urn:sha1:0359c946b13153bd57fac65f4f3600ba5673e3de</id>
<content type='text'>
The users of sysreg.h (perf, KVM selftests) are now generating the
necessary sysreg-defs.h; sync sysreg.h with the kernel sources and
fix the KVM selftests that use macros which suffered a rename.

Signed-off-by: Jing Zhang &lt;jingzhangos@google.com&gt;
Acked-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20231011195740.3349631-5-oliver.upton@linux.dev
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>tools: arm64: Import sysreg.h</title>
<updated>2021-10-17T10:15:51Z</updated>
<author>
<name>Raghavendra Rao Ananta</name>
</author>
<published>2021-10-07T23:34:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=272a067df3c89f6f2176a350f88661625a2c8b3b'/>
<id>urn:sha1:272a067df3c89f6f2176a350f88661625a2c8b3b</id>
<content type='text'>
Bring-in the kernel's arch/arm64/include/asm/sysreg.h
into tools/ for arm64 to make use of all the standard
register definitions in consistence with the kernel.

Make use of the register read/write definitions from
sysreg.h, instead of the existing definitions. A syntax
correction is needed for the files that use write_sysreg()
to make it compliant with the new (kernel's) syntax.

Reviewed-by: Andrew Jones &lt;drjones@redhat.com&gt;
Reviewed-by: Oliver Upton &lt;oupton@google.com&gt;
Signed-off-by: Raghavendra Rao Ananta &lt;rananta@google.com&gt;
[maz: squashed two commits in order to keep the series bisectable]
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20211007233439.1826892-3-rananta@google.com
Link: https://lore.kernel.org/r/20211007233439.1826892-4-rananta@google.com
</content>
</entry>
</feed>
