kernel.git/include/asm-mips/mips-boards, branch linux-2.6.23.y

[MIPS] MTI: Add CoreFPGA4 ID.

2007-07-31T20:35:26Z

Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle

[MIPS] New files for lemote fulong mini-PC support

2007-07-10T16:33:02Z

Signed-off-by: Fuxin Zhang Signed-off-by: Songmao Tian Signed-off-by: Ralf Baechle

[MIPS] Don't drag a platform specific header into generic arch code.

2007-06-20T21:27:10Z

For some platforms it's definitions may conflict. So that's the one-liner. The rest is 10 square kilometers of collateral damage fixup this include used to paper over. Signed-off-by: Ralf Baechle

[MIPS] Malta: Fix for SOCitSC based Maltas

2007-06-14T17:25:14Z

And an attempt to tidy up the core/controller differences. Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle

[MIPS] Atlas, Malta, SEAD: Remove scroll from interrupt handler.

2007-06-06T18:34:30Z

Aside of being handy for debugging this has never been a particularly good idea but is now getting in the way of dyntick / tickless kernels and general cleanups. Signed-off-by: Ralf Baechle

[MIPS] MT: Reenable EIC support and add support for SOCit SC.

2007-05-11T13:28:31Z

Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle

[MIPS] Fix and cleanup the mess that a dozen prom_printf variants are.

2007-03-04T19:02:37Z

early_printk is a so much saner thing. Signed-off-by: Ralf Baechle

[MIPS] prom_free_prom_memory cleanup

2007-02-06T16:53:09Z

Current prom_free_prom_memory() implementations are almost same as free_init_pages(), or no-op. Make free_init_pages() extern (again) and make prom_free_prom_memory() use it. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle

[MIPS] Define MIPS_CPU_IRQ_BASE in generic header

2007-02-06T16:53:08Z

The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle

[MIPS] Atlas: update interrupt handling

2006-09-27T12:37:42Z

The following change updates the Atlas interrupt handling to match that of Malta. Tested with a 5Kc and a 34Kf successfully. Signed-off-by: Maciej W. Rozycki Signed-off-by: Ralf Baechle