<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/include/asm-mips/mips-boards, branch linux-2.6.19.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.19.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.19.y'/>
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<updated>2006-09-27T12:37:42Z</updated>
<entry>
<title>[MIPS] Atlas: update interrupt handling</title>
<updated>2006-09-27T12:37:42Z</updated>
<author>
<name>Maciej W. Rozycki</name>
</author>
<published>2006-09-12T18:12:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fc095a902181b72ce77a10feb7b36ba1cbacd736'/>
<id>urn:sha1:fc095a902181b72ce77a10feb7b36ba1cbacd736</id>
<content type='text'>
The following change updates the Atlas interrupt handling to match that
of Malta.  Tested with a 5Kc and a 34Kf successfully.

Signed-off-by: Maciej W. Rozycki &lt;macro@mips.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6</title>
<updated>2006-04-29T00:42:26Z</updated>
<author>
<name>David Woodhouse</name>
</author>
<published>2006-04-29T00:42:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d6754b401a15eaa16492ea5dbaa4826361d3f411'/>
<id>urn:sha1:d6754b401a15eaa16492ea5dbaa4826361d3f411</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[MIPS] 24K LV: Add core card id.</title>
<updated>2006-04-27T14:13:50Z</updated>
<author>
<name>Chris Dearman</name>
</author>
<published>2006-04-14T23:31:16Z</published>
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<id>urn:sha1:7a8341969fe0df4a1fffa141435e742456270ffd</id>
<content type='text'>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Don't include linux/config.h from anywhere else in include/</title>
<updated>2006-04-26T11:56:16Z</updated>
<author>
<name>David Woodhouse</name>
</author>
<published>2006-04-26T11:56:16Z</published>
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<id>urn:sha1:62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f</id>
<content type='text'>
Signed-off-by: David Woodhouse &lt;dwmw2@infradead.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Fix the crime against humanity that mipsIRQ.S is.</title>
<updated>2006-04-19T02:14:21Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2006-04-03T12:17:41Z</published>
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<id>urn:sha1:d35d473c25d43d7db3e5e18b66d558d2a631cca8</id>
<content type='text'>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] SEAD: More build fixes.</title>
<updated>2005-11-17T16:23:57Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2005-11-15T16:10:01Z</published>
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<id>urn:sha1:1a6ea3ec6784cf3dedc338e1980dc0b4cf28a805</id>
<content type='text'>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] SEAD: Delete seadint_init() prototype.</title>
<updated>2005-11-17T16:23:55Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2005-11-15T13:25:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=561a0792405bea8ead78990d755dd1f95b8e95b8'/>
<id>urn:sha1:561a0792405bea8ead78990d755dd1f95b8e95b8</id>
<content type='text'>
    
There is no definition for seadint_init() and the unprotected prototype
breaks compilation of assembler files.
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Support for MIPSsim, the cycle accurate MIPS simulator.</title>
<updated>2005-10-29T18:32:30Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2005-09-30T12:59:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c78cbf49c4edf2f9ca9e56d4b87a5d6ef08b7fed'/>
<id>urn:sha1:c78cbf49c4edf2f9ca9e56d4b87a5d6ef08b7fed</id>
<content type='text'>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Support for CoreFPGA-3.</title>
<updated>2005-10-29T18:32:02Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2005-08-16T15:44:06Z</published>
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<id>urn:sha1:479a0e3e0245fa116412bc105ab1161636c220cb</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>More AP / SP bits for the 34K, the Malta bits and things.  Still wants</title>
<updated>2005-10-29T18:31:53Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2005-07-14T15:57:16Z</published>
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<id>urn:sha1:e01402b115cccb6357f956649487aca2c6f7fbba</id>
<content type='text'>
a little polishing.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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