<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/include/asm-mips/hazards.h, branch linux-2.6.23.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.23.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.23.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2007-11-16T16:22:56Z</updated>
<entry>
<title>MIPS: R1: Fix hazard barriers to make kernels work on R2 also.</title>
<updated>2007-11-16T16:22:56Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2007-10-10T11:14:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2f51141bab7ae812f99da94d260036dbec4f7b18'/>
<id>urn:sha1:2f51141bab7ae812f99da94d260036dbec4f7b18</id>
<content type='text'>
patch 572afc248c33c902760f6f24a72c180f0e4f1719 in mainline.

Tested with Malta; inflates malta_defconfig by 3932 bytes.  Ideally there
should be additional configuration to allow getting rid of this overhead
but that would be too much complexity at this stage of the release cycle.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>[MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.</title>
<updated>2007-09-10T20:25:28Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2007-09-03T14:22:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7b0fdaa6a193e0b07d9f72e942f51ce25d9e0387'/>
<id>urn:sha1:7b0fdaa6a193e0b07d9f72e942f51ce25d9e0387</id>
<content type='text'>
Following a strict interpretation the empty definition of irq_enable_hazard
has always been a bug - but an intentional one because it didn't bite.
This has now changed, for uniprocessor kernels mm/slab.c:do_drain()

[...]
        on_each_cpu(do_drain, cachep, 1, 1);
        check_irq_on();
[...]

may be compiled into a mtc0 c0_status; mfc0 c0_status sequence resulting
in a back-to-back hazard.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Add missing declaration for mips_ihb().</title>
<updated>2007-07-31T20:35:26Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2007-07-27T23:49:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=98de920a2aa4f5939d47cdbb23ebac809308d871'/>
<id>urn:sha1:98de920a2aa4f5939d47cdbb23ebac809308d871</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] SB1: Build fix.</title>
<updated>2007-05-11T13:28:31Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2007-05-09T16:49:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a1b53a7b22934504d8c4e065759e8674e665506d'/>
<id>urn:sha1:a1b53a7b22934504d8c4e065759e8674e665506d</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] FPU hazard handling</title>
<updated>2007-05-11T13:28:31Z</updated>
<author>
<name>Chris Dearman</name>
</author>
<published>2007-05-08T15:09:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0b6249567b4ecf6e9d5a8efcf149f3e7cf788cc0'/>
<id>urn:sha1:0b6249567b4ecf6e9d5a8efcf149f3e7cf788cc0</id>
<content type='text'>
Move FPU hazard handling to hazards.h and provide proper support for
MIPSR2 processors

Signed-off-by: Chris Dearman &lt;chris@mips.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Fix pipeline hazard.</title>
<updated>2007-03-24T17:01:49Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2007-03-20T13:56:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7605b3906192a171e651076325b1ed1d5ea57ec9'/>
<id>urn:sha1:7605b3906192a171e651076325b1ed1d5ea57ec9</id>
<content type='text'>
In the the sequence:
        ei
        ..
        mfc0    $x, $status

the mfc0 may not see the SR_IE bit set. This was a deliberate bug in the
kernel code because we knew this was a safe thing to do on all R2 silicon
so far but new silicon is changing this.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] vr41xx: need one more nop with mtc0_tlbw_hazard()</title>
<updated>2007-01-24T19:23:21Z</updated>
<author>
<name>Yoichi Yuasa</name>
</author>
<published>2007-01-24T13:22:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3f3183709feb35c30ca5f649224d01921870f81c'/>
<id>urn:sha1:3f3183709feb35c30ca5f649224d01921870f81c</id>
<content type='text'>
NEC VR4111 and VR4121 need one more nop with mtc0_tlbw_hazard().

Signed-off-by: Yoichi Yuasa &lt;yoichi_yuasa@tripeaks.co.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] s/__ASSEMBLER__/__ASSEMBLY__/ for clarity sake.</title>
<updated>2006-09-27T12:37:57Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2006-09-25T14:49:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=36396f3c36b04f79438f87a0fccfa76aa3de6af9'/>
<id>urn:sha1:36396f3c36b04f79438f87a0fccfa76aa3de6af9</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Cleanup hazard handling.</title>
<updated>2006-09-27T12:37:53Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2006-09-08T02:13:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d7d86aa88a1f3922b85e39edd8a6d6c01e939842'/>
<id>urn:sha1:d7d86aa88a1f3922b85e39edd8a6d6c01e939842</id>
<content type='text'>
Mostly based on patch by Chris Dearman and cleanups from Yoichi.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Add missing backslashes to macro definitions.</title>
<updated>2006-06-29T20:10:55Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2006-06-29T19:06:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8db089c6b5594c961fb6bc6d613b9926e0d3d98f'/>
<id>urn:sha1:8db089c6b5594c961fb6bc6d613b9926e0d3d98f</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
