kernel.git/drivers/usb/dwc3/core.h, branch linux-5.9.y

usb: dwc3: gadget: END_TRANSFER before CLEAR_STALL command

2020-11-05T10:51:39Z

commit d97c78a1908e59a1fdbcbece87cd0440b5d7a1f2 upstream. According the programming guide (for all DWC3 IPs), when the driver handles ClearFeature(halt) request, it should issue CLEAR_STALL command _after_ the END_TRANSFER command completes. The END_TRANSFER command may take some time to complete. So, delay the ClearFeature(halt) request control status stage and wait for END_TRANSFER command completion interrupt. Only after END_TRANSFER command completes that the driver may issue CLEAR_STALL command. Cc: stable@vger.kernel.org Fixes: cb11ea56f37a ("usb: dwc3: gadget: Properly handle ClearFeature(halt)") Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi Signed-off-by: Greg Kroah-Hartman

usb: dwc3: Add splitdisable quirk for Hisilicon Kirin Soc

2020-10-29T09:12:13Z

[ Upstream commit f580170f135af14e287560d94045624d4242d712 ] SPLIT_BOUNDARY_DISABLE should be set for DesignWare USB3 DRD Core of Hisilicon Kirin Soc when dwc3 core act as host. [mchehab: dropped a dev_dbg() as only traces are now allowwed on this driver] Signed-off-by: Yu Chen Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Felipe Balbi Signed-off-by: Sasha Levin

usb: dwc3: Replace HTTP links with HTTPS ones

2020-07-15T14:33:51Z

Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov Link: https://lore.kernel.org/r/20200711135804.19735-1-grandmaster@al2klimov.de Signed-off-by: Greg Kroah-Hartman

usb: dwc3: gadget: Use SET_EP_PRIME for NoStream

2020-05-25T08:09:42Z

DWC_usb32 v1.00a and later can use SET_EP_PRIME command to reinitiate a stream. Use the command to handle NoStream rejection instead of ending and restarting the endpoint. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi

usb: dwc3: gadget: Handle stream transfers

2020-05-25T08:09:42Z

Overview of stream transfer requirement: * A transfer will have a set of TRBs of the same stream ID. * A transfer is started with a stream ID in START_TRANSFER command. * A new stream will only start when the previous completes. Overview of stream events: * A "prime" from host indicates that its endpoints are active (buffers prepared and ready to receive/transmit data). The controller automatically initiates stream if it sees this. * A "NoStream" rejection event indicates that the host isn't ready. Host will put the endpoint back to idle state. Device may need to reinitiate the stream to start transfer again. * A Stream Found event means host accepted device initiated stream. Nothing needs to be done from driver. To initiate a stream, the driver will issue START_TRANSFER command with a stream ID. To reinitiate the stream, the driver must issue END_TRANSFER and restart the transfer with START_TRANSFER command with the same stream ID. This implementation handles device-initated streams (e.g. UASP driver). It also handles some hosts' quirky behavior where they only prime each endpoint once. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi

usb: dwc3: gadget: Wait for transfer completion

2020-05-25T08:09:41Z

If a transfer is in-progress, any new request should not kick off another transfer. The driver needs to wait for the current transfer to complete before starting off the next transfer. Introduce a new flag DWC3_EP_WAIT_TRANSFER_COMPLETE for this. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi

usb: dwc3: Get MDWIDTH for DWC_usb32

2020-05-25T08:09:41Z

DWC_usb32 supports MDWIDTH value larger than 255 and up to 1023. The field HWPARAMS6[9:8] stores the upper 2-bit values of the DWC_usb32's MDWIDTH. Check that parameter and properly get the MDWIDTH for DWC_usb32. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi

usb: dwc3: Add support for DWC_usb32 IP

2020-05-25T08:09:40Z

Synopsys introduces a new controller DWC_usb32. It supports dual-lane and speed up to 20 Gbps, and the DWC3 driver will drive this controller. Currently the driver uses a single field dwc->revision to ID both DWC_usb3 and DWC_usb31 and their version number. This was sufficient for two IPs, but this method doesn't work with additional IPs. As a result, let's separate the dwc->revision field to 2 separate fields: ip and revision. The ip field now stores the ID of the controller's IP while the revision field stores the controller's version number. This new scheme enforces DWC3 to compare the revision within the same IP only. As a result, we must update all the revision check of the controller to check its corresponding IP. To help with this enforcement, we create a few macros to help with the common version checks: DWC3_IP_IS(IP) DWC3_VER_IS(IP, VERSION) DWC3_VER_IS_PRIOR(IP, VERSION) DWC3_VER_IS_WITHIN(IP, LOWER_VERSION, UPPER_VERSION) DWC3_VER_TYPE_IS_WITHIN(IP, VERSION, LOWER_VERSION_TYPE, UPPER_VERSION_TYPE) The DWC_usb32 controller operates using the same programming model and with very similar configurations as its previous controllers. Please note that the various IP and revision checks in this patch match the current checks for DWC_usb31 version 1.90a. Additional configurations that are unique to DWC_usb32 are applied separately. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi

USB: dwc3: Use the correct style for SPDX License Identifier

2020-05-05T07:58:49Z

This patch corrects the SPDX License Identifier style in header files related to DesignWare USB3 DRD Core Support. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches Signed-off-by: Nishad Kamdar Signed-off-by: Felipe Balbi

usb: dwc3: gadget: Properly set maxpacket limit

2020-04-16T08:02:27Z

Currently the calculation of max packet size limit for IN endpoints is too restrictive. This prevents a matching of a capable hardware endpoint during configuration. Below is the minimum recommended HW configuration to support a particular endpoint setup from the databook: For OUT endpoints, the databook recommended the minimum RxFIFO size to be at least 3x MaxPacketSize + 3x setup packets size (8 bytes each) + clock crossing margin (16 bytes). For IN endpoints, the databook recommended the minimum TxFIFO size to be at least 3x MaxPacketSize for endpoints that support burst. If the endpoint doesn't support burst or when the device is operating in USB 2.0 mode, a minimum TxFIFO size of 2x MaxPacketSize is recommended. Base on these recommendations, we can calculate the MaxPacketSize limit of each endpoint. This patch revises the IN endpoint MaxPacketSize limit and also sets the MaxPacketSize limit for OUT endpoints. Reference: Databook 3.30a section 3.2.2 and 3.2.3 Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi