<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/usb/dwc2/platform.c, branch linux-5.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2019-07-01T10:01:33Z</updated>
<entry>
<title>Merge tag 'usb-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next</title>
<updated>2019-07-01T10:01:33Z</updated>
<author>
<name>Greg Kroah-Hartman</name>
</author>
<published>2019-07-01T10:01:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f254e65ad694a9189163f5a60707a06225f5db25'/>
<id>urn:sha1:f254e65ad694a9189163f5a60707a06225f5db25</id>
<content type='text'>
Felipe writes:

usb: changes for v5.3 merge window

The biggest part here is a set of patches removing unnecesary variables
from several drivers.

Meson-g12a's dwc3 glue implemented IRQ-based OTG/DRD role swap.

Qcom's dwc3 glue added support for ACPI, mainly for the AArch64-based
SoCs.

DWC3 also got support for Intel Elkhart Lake platforms.

* tag 'usb-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (30 commits)
  usb: dwc3: remove unused @lock member of dwc3_ep struct
  usb: dwc3: pci: Add Support for Intel Elkhart Lake Devices
  usb: Replace snprintf with scnprintf in gether_get_ifname
  usb: gadget: ether: Fix race between gether_disconnect and rx_submit
  usb: gadget: storage: Remove warning message
  usb: dwc3: gadget: Add support for disabling U1 and U2 entries
  usb: gadget: send usb_gadget as an argument in get_config_params
  doc: dt: bindings: usb: dwc3: Update entries for disabling U1 and U2
  usb: dwc3: qcom: Use of_clk_get_parent_count()
  usb: dwc3: Fix core validation in probe, move after clocks are enabled
  usb: dwc3: qcom: Improve error handling
  usb: dwc3: qcom: Start USB in 'host mode' on the SDM845
  usb: dwc3: qcom: Add support for booting with ACPI
  soc: qcom: geni: Add support for ACPI
  Revert "usb: dwc2: host: Setting qtd to NULL after freeing it"
  usb: gadget: net2272: remove redundant assignments to pointer 's'
  usb: gadget: Zero ffs_io_data
  USB: omap_udc: Remove unneeded variable
  fotg210-udc: Remove unneeded variable
  usb: gadget: at91_udc: Remove unneeded variable
  ...
</content>
</entry>
<entry>
<title>USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled</title>
<updated>2019-06-18T08:58:28Z</updated>
<author>
<name>Douglas Anderson</name>
</author>
<published>2019-05-20T17:56:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c846b03ff767149d75d4d8dca6d3d4945a21074a'/>
<id>urn:sha1:c846b03ff767149d75d4d8dca6d3d4945a21074a</id>
<content type='text'>
If the 'snps,need-phy-for-wake' is set in the device tree then:

- We know that we can wakeup, so call device_set_wakeup_capable().
  The USB core will use this knowledge to enable wakeup by default.
- We know that we should keep the PHY on during suspend if something
  on our root hub needs remote wakeup.  This requires the patch (USB:
  Export usb_wakeup_enabled_descendants()).  Note that we don't keep
  the PHY on at suspend time if it's not needed because it would be a
  power draw.

If we later find some users of dwc2 that can support wakeup without
keeping the PHY on we may want to add a way to call
device_set_wakeup_capable() without keeping the PHY on at suspend
time.

Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Chris Zhong &lt;zyw@rock-chips.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Use generic PHY width in params setup</title>
<updated>2019-06-18T07:27:14Z</updated>
<author>
<name>Jules Maselbas</name>
</author>
<published>2019-05-09T09:15:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=42de8afc40c97002fceb500e2331f6a722be3c14'/>
<id>urn:sha1:42de8afc40c97002fceb500e2331f6a722be3c14</id>
<content type='text'>
Setting params.phy_utmi_width in dwc2_lowlevel_hw_init() is pointless since
it's value will be overwritten by dwc2_init_params().

This change make sure to take in account the generic PHY width information
during paraminitialisation, done in dwc2_set_param_phy_utmi_width().

By doing so, the phy_utmi_width params can still be overrided by
devicetree specific params and will also be checked against hardware
capabilities.

Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Tested-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Signed-off-by: Jules Maselbas &lt;jmaselbas@kalray.eu&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: gadget: Replace phyif with phy_utmi_width</title>
<updated>2019-05-03T06:13:48Z</updated>
<author>
<name>Jules Maselbas</name>
</author>
<published>2019-04-05T13:35:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=707d80f0a3c5fb58e61404277f6b103955fac294'/>
<id>urn:sha1:707d80f0a3c5fb58e61404277f6b103955fac294</id>
<content type='text'>
The phy utmi width information is already set in hsotg params,
phyif is only used in few places and I don't see any reason to
not use hsotg's params.

Moreover the utmi width was being forced to 16 bits by platform
initialization which doesn't take in account HW configuration.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Jules Maselbas &lt;jmaselbas@kalray.eu&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: optionally assert phy reset when waking up</title>
<updated>2019-05-03T06:13:47Z</updated>
<author>
<name>Douglas Anderson</name>
</author>
<published>2019-04-16T21:53:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c40cf7705e13d288d900e044c0a2f756e9e4909a'/>
<id>urn:sha1:c40cf7705e13d288d900e044c0a2f756e9e4909a</id>
<content type='text'>
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit), which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Yunzhi Li &lt;lyz@rock-chips.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: get optional clock by devm_clk_get_optional()</title>
<updated>2019-05-03T06:13:47Z</updated>
<author>
<name>Chunfeng Yun</name>
</author>
<published>2019-04-17T08:28:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=60722c4eefbc9acddaf5e641f6dfb24bce930f9a'/>
<id>urn:sha1:60722c4eefbc9acddaf5e641f6dfb24bce930f9a</id>
<content type='text'>
When the driver tries to get optional clock, it ignores all errors,
but if only ignores -ENOENT, it will cover some real errors, such as
-EPROBE_DEFER, so use devm_clk_get_optional() to get optional clock.

Cc: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;
Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: get optional vbus-supply regulator once</title>
<updated>2018-10-02T07:37:01Z</updated>
<author>
<name>Fabrice Gasnier</name>
</author>
<published>2018-09-05T11:40:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e0f681c2c11a25b76626cea77deb819a4754375d'/>
<id>urn:sha1:e0f681c2c11a25b76626cea77deb819a4754375d</id>
<content type='text'>
Move devm_regulator_get_optional() call to probe routine. This avoids
'vbus-supply' regulator to be requested lots of times, upon each call
to dwc2_vbus_supply_init(), e.g. like with runtime pm.

Fixes: 531ef5ebea96 ("usb: dwc2: add support for host mode external
vbus supply")

Tested-by: Artur Petrosyan &lt;arturp@synopsys.com&gt;
Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@st.com&gt;
Signed-off-by: Amelie Delaunay &lt;amelie.delaunay@st.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Fix call location of dwc2_check_core_endianness</title>
<updated>2018-09-05T10:12:31Z</updated>
<author>
<name>Bruno Meirelles Herrera</name>
</author>
<published>2018-08-27T21:36:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d9707490077bee0c7060ef5665a90656e1078b66'/>
<id>urn:sha1:d9707490077bee0c7060ef5665a90656e1078b66</id>
<content type='text'>
Some SoC/IP as STM32F469, the snpsid can only be read after clock is
enabled, otherwise it will read as 0, and the dwc2_check_core_endianness
will assume the core and AHB have opposite endianness, leading to the
following error:

[    1.976339] dwc2 50000000.usb: 50000000.usb supply vusb_d not found, using dummy regulator
[    1.986124] dwc2 50000000.usb: Linked as a consumer to regulator.0
[    1.992711] dwc2 50000000.usb: 50000000.usb supply vusb_a not found, using dummy regulator
[    2.003672] dwc2 50000000.usb: dwc2_core_reset: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE
[    2.015176] dwc2: probe of 50000000.usb failed with error -16

The proposed patch changes the location where dwc2_check_core_endianness
is called, allowing the clock peripheral to be enabled first.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Tested-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Signed-off-by: Bruno Meirelles Herrera &lt;bmh@certi.org.br&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Make dwc2_readl/writel functions endianness-agnostic.</title>
<updated>2018-07-30T07:39:18Z</updated>
<author>
<name>Gevorg Sahakyan</name>
</author>
<published>2018-07-27T08:26:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fe369e1826b3efae11012ad07d1713223c37ec5d'/>
<id>urn:sha1:fe369e1826b3efae11012ad07d1713223c37ec5d</id>
<content type='text'>
Declared dwc2_check_core_endianness() function for dynamicly check
core endianness.
Added needs_byte_swap flag to hsotg structure, and depending on
flag swap value inside dwc2_readl/writel functions.

Signed-off-by: Gevorg Sahakyan &lt;sahakyan@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Force mode optimizations</title>
<updated>2018-03-13T08:47:58Z</updated>
<author>
<name>Vardan Mikayelyan</name>
</author>
<published>2018-02-16T08:56:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=13b1f8e25bfd1d6b96278421f934efdd35be9d5b'/>
<id>urn:sha1:13b1f8e25bfd1d6b96278421f934efdd35be9d5b</id>
<content type='text'>
If the dr_mode is USB_DR_MODE_OTG, forcing the mode is needed during
driver probe to get the host and device specific HW parameters. Then we
clear the force mode bits so that the core operates in OTG mode.

The force mode bits should not be touched at any other time during the
driver lifetime and they should be preserved whenever the GUSBCFG
register is written to. The force mode bit values will persist across
soft resets of the core.

If the dr_mode is either USB_DR_MODE_HOST or USB_DR_MODE_PERIPHERAL, the
force mode is set just once at probe to configure the core as either a
host or peripheral.

Given the above, we no longer need any other reset delays, force delays,
or any forced modes anywhere else in the driver. So replace all calls to
dwc2_core_reset_and_force_dr_mode() with dwc2_core_reset() and remove
all other unnecessary delays.

Also remove the dwc2_force_mode_if_needed() function since the "if
needed" part is already taken care of by the polling in
dwc2_force_mode().

Finally, remove all other calls to dwc2_clear_force_mode().

Tested-by: Stefan Wahren &lt;stefan.wahren@i2se.com&gt;
Signed-off-by: John Youn &lt;johnyoun@synopsys.com&gt;
Signed-off-by: Vardan Mikayelyan &lt;mvardan@synopsys.com&gt;
Signed-off-by: Grigor Tovmasyan &lt;tovmasya@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
</feed>
