kernel.git/drivers/usb/dwc2/core.c, branch linux-5.14.y

usb: dwc2: Don't reset the core after setting turnaround time

2021-06-09T09:25:07Z

Every time the hub signals a reset while we (device) are hsotg->connected, dwc2_hsotg_core_init_disconnected() is called, which in turn calls dwc2_hs_phy_init(). GUSBCFG.USBTrdTim is cleared upon Core Soft Reset, so if hsotg->params.phy_utmi_width is 8-bit, the value of GUSBCFG.USBTrdTim (the default one: 0x5, corresponding to 16-bit) is always different from hsotg->params.phy_utmi_width, thus dwc2_core_reset() is called every time (usbcfg != usbcfg_old), which causes 2 issues: 1) The call to dwc2_core_reset() does another reset 300us after the initial Chirp K of the first reset (which should last at least Tuch = 1ms), and messes up the High-speed Detection Handshake: both hub and device drive current into the D+ and D- lines at the same time. 2) GUSBCFG.USBTrdTim is cleared by the second reset, so its value is always the default one (0x5). Setting GUSBCFG.USBTrdTim after the potential call to dwc2_core_reset() fixes both issues. It is now set even when select_phy is false because the cost of the Core Soft Reset is removed. Fixes: 1e868545f2bb ("usb: dwc2: gadget: Move gadget phy init into core phy init") Signed-off-by: Clément Lassieur Link: https://lore.kernel.org/r/20210603155921.940651-1-clement@lassieur.org Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Get rid of useless error checks in suspend interrupt

2021-04-22T09:55:34Z

Squashed from Douglas Anderson's suggested commit "usb: dwc2: Get rid of useless error checks for hibernation/partial power down" - After this commit there should never be any case where dwc2_enter_partial_power_down() and dwc2_enter_hibernation() are called when 'params.power_down' is not correct. Get rid of the pile of error checking. - As part of this cleanup some of the error messages not to have __func__ in them. That's not needed for dev_err() calls since they already have the device name as part of the message. Acked-by: Minas Harutyunyan Signed-off-by: Artur Petrosyan Signed-off-by: Douglas Anderson Link: https://lore.kernel.org/r/20210416124843.9EDCDA005D@mailhost.synopsys.com Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Clear GINTSTS_RESTOREDONE bit after restore is generated.

2021-04-22T09:55:34Z

When hibernation exit is performed the dwc2_hib_restore_common() function is called. In that function we wait until GINTSTS_RESTOREDONE bit is set. However, after the setting of that bit we get a lot of (dwc2_hsotg_irq:) interrupts which indicates that (GINTSTS.RstrDoneInt) restore done interrupt is asserted. To avoid restore done interrupt storm after restore is generated clear GINTSTS_RESTOREDONE bit in GINTSTS register. Acked-by: Minas Harutyunyan Signed-off-by: Artur Petrosyan Link: https://lore.kernel.org/r/20210416124739.D6269A005D@mailhost.synopsys.com Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Clear fifo_map when resetting core.

2021-04-22T09:55:34Z

Switching from device mode to host mode by disconnecting device cable core enters and exits form hibernation. However, the fifo map remains not cleared. It results to a WARNING (WARNING: CPU: 5 PID: 0 at drivers/usb/dwc2/ gadget.c:307 dwc2_hsotg_init_fifo+0x12/0x152 [dwc2]) if in host mode we disconnect the micro a to b host cable. Because core reset occurs. To avoid the WARNING, fifo_map should be cleared in dwc2_core_reset() function by taking into account configs. fifo_map must be cleared only if driver is configured in "CONFIG_USB_DWC2_PERIPHERAL" or "CONFIG_USB_DWC2_DUAL_ROLE" mode. - Added "static inline void dwc2_clear_fifo_map()" helper function to clear fifo_map with peripheral or dual role mode. - Added a dummy version of "dwc2_clear_fifo_map()" helper for host-only mode. Acked-by: Minas Harutyunyan Signed-off-by: Artur Petrosyan Link: https://lore.kernel.org/r/20210416124731.C500AA005D@mailhost.synopsys.com Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Update enter and exit partial power down functions

2021-04-09T13:16:38Z

These are wrapper functions which are calling device or host enter/exit partial power down functions. This change is done because we need to separate device and host partial power down functions as the programming flow has a lot of difference between host and device. With this update during partial power down exit driver relies on backup value of "GOTGCTL_CURMODE_HOST" to determine the mode of core before entering to PPD. Acked-by: Minas Harutyunyan Signed-off-by: Artur Petrosyan Link: https://lore.kernel.org/r/20210408094446.6491BA022E@mailhost.synopsys.com Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Update Core Reset programming flow.

2020-05-25T08:09:44Z

Starting from core version 4.20a Core Reset flow is changed. Introduced new bit in GRSTCTL register - GRSTCTL_CSFTRST_DONE. Core Reset new programming flow steps are follow: 1. Set GRSTCTL_CSFTRST bit. 2. Wait for bit GRSTCTL_CSFTRST_DONE is set. 3. Clear GRSTCTL_CSFTRST and GRSTCTL_CSFTRST_DONE bits. Check core version functionality separated from dwc2_get_hwparams() to new dwc2_check_core_version() function because Core Reset flow depend on SNPSID. Signed-off-by: Minas Harutyunyan Signed-off-by: Felipe Balbi

usb: dwc2: use a longer core rest timeout in dwc2_core_reset()

2019-10-22T07:42:08Z

Testing on different generations of Lantiq MIPS SoC based boards, showed that it takes up to 1500 us until the core reset bit is cleared. The driver from the vendor SDK (ifxhcd) uses a 1 second timeout. Use the same timeout to fix wrong hang detections and make the driver work for Lantiq MIPS SoCs. At least till kernel 4.14 the hanging reset only caused a warning but the driver was probed successful. With kernel 4.19 errors out with EBUSY. Cc: linux-stable # 4.19+ Signed-off-by: Mathias Kresin Signed-off-by: Felipe Balbi

usb: dwc2: use a longer AHB idle timeout in dwc2_core_reset()

2019-07-03T07:59:22Z

Use a 10000us AHB idle timeout in dwc2_core_reset() and make it consistent with the other "wait for AHB master IDLE state" ocurrences. This fixes a problem for me where dwc2 would not want to initialize when updating to 4.19 on a MIPS Lantiq VRX200 SoC. dwc2 worked fine with 4.14. Testing on my board shows that it takes 180us until AHB master IDLE state is signalled. The very old vendor driver for this SoC (ifxhcd) used a 1 second timeout. Use the same timeout that is used everywhere when polling for GRSTCTL_AHBIDLE instead of using a timeout that "works for one board" (180us in my case) to have consistent behavior across the dwc2 driver. Cc: linux-stable # 4.19+ Acked-by: Minas Harutyunyan Signed-off-by: Martin Blumenstingl Signed-off-by: Felipe Balbi

usb: dwc2: gadget: Move gadget phy init into core phy init

2019-05-03T06:13:48Z

Most of the phy initialization is shared between host and gadget, this adds the turnaround configuration only used by gadgets to the global phy init. Acked-by: Minas Harutyunyan Signed-off-by: Jules Maselbas Signed-off-by: Felipe Balbi

usb: dwc2: Move phy init into core

2019-05-03T06:13:48Z

As the phy initialization is almost the same in host and gadget mode. This only move the phy initialization functions into core.c for now, the goal is to share theses functions between the two modes. Acked-by: Minas Harutyunyan Signed-off-by: Jules Maselbas Signed-off-by: Felipe Balbi