<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/spi/Makefile, branch linux-2.6.36.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.36.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.36.y'/>
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<updated>2010-05-25T06:23:17Z</updated>
<entry>
<title>spi/mpc5121: Add SPI master driver for MPC5121 PSC</title>
<updated>2010-05-25T06:23:17Z</updated>
<author>
<name>Anatolij Gustschin</name>
</author>
<published>2010-04-30T13:21:27Z</published>
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<id>urn:sha1:6e27388f1bd60b55e0b1a83d14233e6c7ad33700</id>
<content type='text'>
Signed-off-by: John Rigby &lt;jcrigby@gmail.com&gt;
Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>spi/ep93xx: implemented driver for Cirrus EP93xx SPI controller</title>
<updated>2010-05-25T06:23:16Z</updated>
<author>
<name>Mika Westerberg</name>
</author>
<published>2010-05-06T04:47:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=011f23a3c2f20ae15b7664d3942493af107fe39b'/>
<id>urn:sha1:011f23a3c2f20ae15b7664d3942493af107fe39b</id>
<content type='text'>
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found
in EP93xx chips.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@iki.fi&gt;
Signed-off-by: H Hartley Sweeten &lt;hsweeten@visionengravers.com&gt;
Acked-by: H Hartley Sweeten &lt;hsweeten@visionengravers.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>Memory-mapped dw_spi driver</title>
<updated>2010-01-21T14:46:42Z</updated>
<author>
<name>Jean-Hugues Deschenes</name>
</author>
<published>2010-01-21T14:46:42Z</published>
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<id>urn:sha1:f7b6fd6d1d3833529f1626c761ba7e338586d35e</id>
<content type='text'>
Adds a memory-mapped I/O dw_spi platform device.

Signed-off-by: Jean-Hugues Deschenes &lt;jean-hugues.deschenes@octasic.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>spi: Add Freescale/Motorola Coldfire QSPI driver</title>
<updated>2010-01-20T20:49:44Z</updated>
<author>
<name>Steven King</name>
</author>
<published>2010-01-20T20:49:44Z</published>
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<id>urn:sha1:34b8c66173666025020e3a6f8d4a5c238b19cde5</id>
<content type='text'>
Add support for the QSPI controller found some on Freescale/Motorola
Coldfire MCUs.

Full duplex, active high cs, spi modes 0-3 and word sizes 8-16 bits are
supported.  The hardware drives the MISO, MOSI and SCLK lines, but the chip
selects are managed via GPIO and must be configured by the board code.

The QSPI controller has an 80 byte buffer which allows us to transfer up to 16
words at a time.  For transfers longer than 16 words, we split the buffer in
half so we can update in one half while the controller is operating on the
other half.  Interrupt latencies then ultimately limits our sustained thru-put
to something less than half the maximum speed supported by the part.

Signed-off-by: Steven King &lt;sfking@fdwdc.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>spi: Add SPI master driver for DaVinci/DA8xx</title>
<updated>2010-01-20T20:49:34Z</updated>
<author>
<name>Sandeep Paulraj</name>
</author>
<published>2009-12-16T22:02:18Z</published>
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<id>urn:sha1:358934a60d2180dcd1ed20691dbb66d4fb977ab2</id>
<content type='text'>
This patch adds support for a SPI master driver for the
DaVinci series of SOCs

Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
Signed-off-by: Mark A. Greer &lt;mgreer@mvista.com&gt;
Signed-off-by: Philby John &lt;pjohn@in.mvista.com&gt;
Signed-off-by: Sudhakar Rajashekhara &lt;sudhakar.raj@ti.com&gt;
Signed-off-by: Kevin Hilman &lt;khilman@deeprootsystems.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>spi: Add s3c64xx SPI Controller driver</title>
<updated>2009-12-17T15:58:17Z</updated>
<author>
<name>Jassi Brar</name>
</author>
<published>2009-11-30T07:39:42Z</published>
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<id>urn:sha1:230d42d422e7b69fc9b270f41c69e63b54572e26</id>
<content type='text'>
Each SPI controller has exactly one CS line and as such doesn't
provide for multi-cs. We implement a workaround to support
multi-cs by _not_ configuring the mux'ed CS pin for each SPI
controller. The CS mechanism is assumed to be fully machine
specific - the driver doesn't even assume some GPIO pin is used
to control the CS.

The driver selects between DMA and POLLING mode depending upon
the xfer size - DMA mode for xfers bigger than FIFO size, POLLING
mode otherwise.

The driver has been designed to be capable of running SoCs since
s3c64xx and till date, for that reason some of the register fields
have been passed via, SoC specific, platform data.

Signed-off-by: Jassi Brar &lt;jassi.brar@samsung.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>spi_s3c24xx: add FIQ pseudo-DMA support</title>
<updated>2009-12-17T15:57:01Z</updated>
<author>
<name>Ben Dooks</name>
</author>
<published>2009-12-15T06:20:24Z</published>
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<id>urn:sha1:bec0806cfec6ded1a7e097bb95279e521a796129</id>
<content type='text'>
Add pseudo-DMA by FIQ to the S3C24XX SPI driver.  This allows the driver
to get DMA-like performance where there are either no free DMA channels or
when doing transfers that required both TX and RX data paths.

Since this patch requires the addition of an assembly file to hold the FIQ
code, we rename the module (instead of adding a rename of the .c file to
this patch).  We expect most users are loading this via udev and thus
there should be no change to the userland configuration.

Signed-off-by: Ben Dooks &lt;ben@simtec.co.uk&gt;
Signed-off-by: Simtec Linux Team &lt;linux@simtec.co.uk&gt;
Cc: David Brownell &lt;david-b@pacbell.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>spi: controller driver for Designware SPI core</title>
<updated>2009-12-17T15:39:13Z</updated>
<author>
<name>Feng Tang</name>
</author>
<published>2009-12-14T22:20:22Z</published>
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<id>urn:sha1:e24c745272072fd2abe55209f1949b7b7ee602a7</id>
<content type='text'>
Driver for the Designware SPI core, it supports multipul interfaces like
PCI/APB etc.  User can use "dw_apb_ssi_db.pdf" from Synopsys as HW
datasheet.

[randy.dunlap@oracle.com: fix build]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Feng Tang &lt;feng.tang@intel.com&gt;
Cc: David Brownell &lt;david-b@pacbell.net&gt;
Signed-off-by: Randy Dunlap &lt;randy.dunlap@oracle.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>Add OMAP spi100k driver</title>
<updated>2009-12-13T08:02:11Z</updated>
<author>
<name>Cory Maccarrone</name>
</author>
<published>2009-12-13T08:02:11Z</published>
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<id>urn:sha1:35c9049b27040d09461bc90928ad770be7ddf661</id>
<content type='text'>
This change adds the OMAP SPI 100k driver created by
Fabrice Crohas &lt;fcrohas@gmail.com&gt;.  This SPI bus is found on
OMAP7xx-series smartphones, and for many, the touchscreen is
attached to this bus.

The lion's share of the work was done by Fabrice on this driver --
I am merely porting it from the Linwizard project on his behalf.

Signed-off-by: Cory Maccarrone &lt;darkstar6262@gmail.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
<entry>
<title>ARM: NUC900: Add spi driver support for nuc900</title>
<updated>2009-12-13T07:58:00Z</updated>
<author>
<name>Wan ZongShun</name>
</author>
<published>2009-12-01T14:29:20Z</published>
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<id>urn:sha1:30eaed053c9bced7a23624e4bab5602e5b85124f</id>
<content type='text'>
Signed-off-by: Wan ZongShun &lt;mcuos.com@gmail.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
</entry>
</feed>
