kernel.git/drivers/soc/tegra/pmc.c, branch linux-4.16.y

soc/tegra: pmc: Consolidate Tegra186 support

2017-12-13T12:06:44Z

Move Tegra186 support to the consolidated PMC driver to reduce some of the duplication and also gain I/O pad functionality on the new SoC as a side-effect. Signed-off-by: Thierry Reding

soc/tegra: pmc: Parameterize driver

2017-12-13T12:04:50Z

Parameterize some aspects of the driver in preparation for Tegra186 PMC support. Initially the Tegra186 driver had been split off into an extra driver, but it turns out the backwards-compatibility break isn't as bad as originally assumed, so with a little parameterization the same code can be used to keep supporting all SoC generations. Signed-off-by: Thierry Reding

soc/tegra: Fix bad of_node_put() in powergate init

2017-07-31T10:08:55Z

The for_each_child_of_node macro itself maintains the correct reference count of the nodes so the explicit of_node_put() call causes a warning: [ 0.098960] OF: ERROR: Bad of_node_put() on /pmc@7000e400/powergates/xusba [ 0.098981] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.11.3 #1-NixOS [ 0.098996] Hardware name: NVIDIA Jetson TX1 Developer Kit (DT) [ 0.099011] Call trace: [ 0.099034] [] dump_backtrace+0x0/0x2a0 [ 0.099051] [] show_stack+0x24/0x30 [ 0.099069] [] dump_stack+0x9c/0xc0 [ 0.099090] [] of_node_release+0xa4/0xa8 [ 0.099107] [] kobject_put+0x90/0x1f8 [ 0.099124] [] of_node_put+0x24/0x30 [ 0.099140] [] __of_get_next_child+0x4c/0x70 [ 0.099155] [] of_get_next_child+0x40/0x68 [ 0.099173] [] tegra_pmc_early_init+0x4e8/0x5ac [ 0.099189] [] do_one_initcall+0x5c/0x168 [ 0.099206] [] kernel_init_freeable+0xd4/0x240 [ 0.099224] [] kernel_init+0x18/0x108 [ 0.099238] [] ret_from_fork+0x10/0x50 (It's not very apparent from the OF documentation that of_node_put() is not needed; the macro itself has no docstring and of_get_next_child() used in the implementation begins with "Returns a node pointer with refcount incremented" but then only at the very end of the docstring the crucial part "Decrements the refcount of prev" is mentioned.) Fixes: a38045121bf42 ("soc/tegra: pmc: Add generic PM domain support") Signed-off-by: Tuomas Tynkkynen Signed-off-by: Thierry Reding

soc/tegra: pmc: Use consistent naming for PM domains

2016-11-15T14:51:56Z

The various error messages refer to the PM domains as "power domain", "genpd" and "PM domain". That's confusing, so convert all error messages to use the most prominent: "PM domain". Acked-by: Jon Hunter Signed-off-by: Thierry Reding

soc/tegra: pmc: Remove genpd when adding provider fails

2016-11-15T14:51:55Z

Commit 3fe577107ccf ("PM / Domains: Add support for removing PM domains") add support for removing PM domains. Update the Tegra PMC driver to remove PM domains if we fail to add a provider for the PM domain. Please note that the code under 'power_on_cleanup' label does not really belong in the clean-up error path for tegra_powergate_add(). To keep the error path simple, remove this label and move the associated code to where it needs to be invoked. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding

soc/tegra: pmc: Check return code for pm_genpd_init()

2016-11-15T14:51:54Z

Commit 7eb231c337e0 ("PM / Domains: Convert pm_genpd_init() to return an error code") updated pm_genpd_init() to return an error code. Update the Tegra PMC driver to check the return value from pm_genpd_init() and handle any errors returned. Signed-off-by: Jon Hunter [treding@nvidia.com: use pr_err() instead of dev_err()] Signed-off-by: Thierry Reding

soc/tegra: pmc: Clean-up I/O rail error messages

2016-11-15T14:51:53Z

Use pr_err() instead of dev_err() when the pmc->dev field has not been initialized yet and add a few missing error messages as well as remove duplicate ones. Based on work by Jon Hunter . Signed-off-by: Thierry Reding

soc/tegra: pmc: Simplify IO rail bit handling

2016-11-15T14:51:53Z

The function tegra_io_rail_prepare() converts the IO rail ID into a bit position that is used to check the status and control the IO rail in the PMC registers. However, rather than converting to a bit position it is more useful to convert to a bit-mask because this is what is actually used. By doing so the BIT() marco only needs to be used once and we can use the IO_DPD_REQ_CODE_MASK when checking for erroneous rail IDs. Signed-off-by: Jon Hunter [treding@nvidia.com: rebase and rename bit -> mask] Signed-off-by: Thierry Reding

soc/tegra: pmc: Guard against uninitialised PMC clock

2016-11-15T14:51:52Z

It is possible for the public functions, tegra_io_rail_power_on/off() to be called before the PMC device has been probed. If this happens then the pmc->clk member will not be initialised and the call to clk_get_rate() in tegra_io_rail_prepare() will return zero and lead to a divide-by-zero exception. The function clk_get_rate() will return zero if a NULl clk pointer is passed. Therefore, rather that checking if pmc->clk is initialised, fix this by checking the return value for clk_get_rate() to make sure it is not zero. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding

soc/tegra: pmc: Add I/O pad voltage support

2016-11-15T14:51:51Z

I/O pins on Tegra SoCs are grouped into so-called I/O pads. Each such pad can be used to control the common voltage signal level and power state of the pins in the given pad. I/O pads can be powered down even if the system is active, which can save power from that I/O interface. For SoC generations prior to Tegra124 the I/O pad voltage is automatically detected and hence the system software doesn't need to configure it. However, starting with Tegra210 the detection logic has been removed, so explicit control of the I/O pad voltage by system software is required. Signed-off-by: Laxman Dewangan Signed-off-by: Thierry Reding