<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/soc/tegra/Kconfig, branch linux-5.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.2.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.2.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2019-05-21T08:50:46Z</updated>
<entry>
<title>treewide: Add SPDX license identifier - Makefile/Kconfig</title>
<updated>2019-05-21T08:50:46Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2019-05-19T12:07:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1'/>
<id>urn:sha1:ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1</id>
<content type='text'>
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>soc/tegra: default select TEGRA_TIMER for Tegra210</title>
<updated>2019-02-23T11:13:45Z</updated>
<author>
<name>Joseph Lo</name>
</author>
<published>2019-02-21T07:21:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f40f4fc9506d6b2b786920059b320aac3a831574'/>
<id>urn:sha1:f40f4fc9506d6b2b786920059b320aac3a831574</id>
<content type='text'>
The tegra timer is necessary for Tegra210 to support CPU idle power-down
state. So select it by default.

Signed-off-by: Joseph Lo &lt;josephl@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>soc/tegra: Add Tegra194 SoC configuration option</title>
<updated>2018-03-08T15:44:01Z</updated>
<author>
<name>Mikko Perttunen</name>
</author>
<published>2018-02-20T11:58:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6f9ed07fde03870ec247dcaf244313fe32521545'/>
<id>urn:sha1:6f9ed07fde03870ec247dcaf244313fe32521545</id>
<content type='text'>
Add the configuration option to enable support for the Tegra194 system-
on-chip.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Consolidate Tegra186 support</title>
<updated>2017-12-13T12:06:44Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2017-08-30T10:42:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c641ec6eab8587a78160d37f085a5ed6e542ca88'/>
<id>urn:sha1:c641ec6eab8587a78160d37f085a5ed6e542ca88</id>
<content type='text'>
Move Tegra186 support to the consolidated PMC driver to reduce some of
the duplication and also gain I/O pad functionality on the new SoC as a
side-effect.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: Register SoC device</title>
<updated>2017-08-17T14:43:13Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2017-08-17T14:42:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=27a0342ac162bf2ba30c288cfb7b72eabed38d8b'/>
<id>urn:sha1:27a0342ac162bf2ba30c288cfb7b72eabed38d8b</id>
<content type='text'>
Move this code from arch/arm/mach-tegra and make it common among 32-bit
and 64-bit Tegra SoCs. This is slightly complicated by the fact that on
32-bit Tegra, the SoC device is used as the parent for all devices that
are instantiated from device tree.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: bpmp: Implement generic PM domains</title>
<updated>2017-06-13T13:23:29Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2017-03-29T16:34:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e7149a7a3fc4ee6785f17961738f40ce1266d8d0'/>
<id>urn:sha1:e7149a7a3fc4ee6785f17961738f40ce1266d8d0</id>
<content type='text'>
The BPMP firmware, found on Tegra186 and later, provides an ABI that can
be used to enable and disable power to several power partitions in Tegra
SoCs. The ABI allows for enumeration of the available power partitions,
so the driver can be reused on future generations, provided the BPMP ABI
remains stable.

Based on work by Stefan Kristiansson &lt;stefank@nvidia.com&gt; and Mikko
Perttunen &lt;mperttunen@nvidia.com&gt;.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Reviewed-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: Add initial flowctrl support for Tegra132/210</title>
<updated>2017-04-04T13:52:31Z</updated>
<author>
<name>Jon Hunter</name>
</author>
<published>2017-03-28T12:42:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1fd09e5d884a5ff4060948e0cf8f5d7eed16e936'/>
<id>urn:sha1:1fd09e5d884a5ff4060948e0cf8f5d7eed16e936</id>
<content type='text'>
Tegra132 and Tegra210 support the flowctrl module and so add initial
support for these devices.

Please note that Tegra186 does not support the flowctrl module, so
update the initialisation function such that we do not fall back and
attempt to map the 'hardcoded' address range for Tegra186. Furthermore
64-bit Tegra devices have always had the flowctrl node defined in their
device-tree and so only use the 'hardcoded' addresses for 32-bit Tegra
devices.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: Move Tegra flowctrl driver</title>
<updated>2017-04-04T13:48:04Z</updated>
<author>
<name>Jon Hunter</name>
</author>
<published>2017-03-28T12:42:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7e10cf743634a6b0f3cf63046c49294b38254fe9'/>
<id>urn:sha1:7e10cf743634a6b0f3cf63046c49294b38254fe9</id>
<content type='text'>
The flowctrl driver is required for both ARM and ARM64 Tegra devices
and in order to enable support for it for ARM64, move the Tegra flowctrl
driver into drivers/soc/tegra.

By moving the flowctrl driver, tegra_flowctrl_init() is now called by
via an early initcall and to prevent this function from attempting to
mapping IO space for a non-Tegra device, a test for 'soc_is_tegra()'
is also added.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: Implement Tegra186 PMC support</title>
<updated>2017-04-04T13:43:50Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2017-02-23T17:11:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5e7d4c65294174d6f58fe36df3edd55cd3b859d6'/>
<id>urn:sha1:5e7d4c65294174d6f58fe36df3edd55cd3b859d6</id>
<content type='text'>
The power management controller on Tegra186 has changed in backwards-
incompatible ways with respect to earlier generations. This implements a
new driver that supports inversion of the PMU interrupt as well as the
"recovery", "bootloader" and "forced-recovery" reboot commands.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: Add Tegra186 support</title>
<updated>2016-11-15T14:50:50Z</updated>
<author>
<name>Joseph Lo</name>
</author>
<published>2016-07-05T09:04:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=25a06442656001daac6edca98d868414355ee5b8'/>
<id>urn:sha1:25a06442656001daac6edca98d868414355ee5b8</id>
<content type='text'>
The Tegra186 features a combination of Denver and Cortex-A57 CPU cores
and a GPU based on the Pascal architecture. It contains an ADSP with a
Cortex-A9 CPU used for audio processing, hardware video encoders and
decoders with multi-format support, ISP for image capture processing
and BPMP for power management.

Signed-off-by: Joseph Lo &lt;josephl@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
