kernel.git/drivers/soc/renesas, branch linux-5.2.y

soc: renesas: Enable ARM_ERRATA_754322 for affected Cortex-A9

2019-10-05T11:13:46Z

[ Upstream commit 2eced4607a1e6f51f928ae3e521fe02be5cb7d23 ] ARM Erratum 754322 affects Cortex-A9 revisions r2p* and r3p*. Automatically enable support code to mitigate the erratum when compiling a kernel for any of the affected Renesas SoCs: - RZ/A1: r3p0, - R-Mobile A1: r2p4, - R-Car M1A: r2p2-00rel0, - R-Car H1: r3p0, - SH-Mobile AG5: r2p2. EMMA Mobile EV2 (r1p3) and RZ/A2 (r4p1) are not affected. Signed-off-by: Geert Uytterhoeven Reviewed-by: Simon Horman Signed-off-by: Sasha Levin

soc: renesas: rmobile-sysc: Set GENPD_FLAG_ALWAYS_ON for always-on domain

2019-10-05T11:13:46Z

[ Upstream commit af0bc634728c0bc6a3f66f911f227d5c6396db88 ] Currently the R-Mobile "always-on" PM Domain is implemented by returning -EBUSY from the generic_pm_domain.power_off() callback, and doing nothing in the generic_pm_domain.power_on() callback. However, this means the PM Domain core code is not aware of the semantics of this special domain, leading to boot warnings like the following on SH/R-Mobile SoCs: sh_cmt e6130000.timer: PM domain c5 will not be powered off Fix this by making the always-on nature of the domain explicit instead, by setting the GENPD_FLAG_ALWAYS_ON flag. This removes the need for the domain to provide power control callbacks. Signed-off-by: Geert Uytterhoeven Reviewed-by: Simon Horman Reviewed-by: Ulf Hansson Signed-off-by: Sasha Levin

soc: renesas: Identify R-Car M3-W ES1.3

2019-03-18T09:33:42Z

The Product Register of R-Car M3-W ES1.3 incorrectly identifies the SoC revision as ES2.1. Add a workaround to fix this. Signed-off-by: Takeshi Kihara Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman

soc: renesas: r8a774c0-sysc: Fix initialization order of 3DG-{A,B}

2019-01-07T13:51:51Z

The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on RZ/G2E ES1.0 corrected the parent domains. However, the 3DG-{A,B} power domains were still initialized and powered in the wrong order, causing 3DG operation to fail. Fix this by changing the order in the table at runtime, when running on an affected SoC. This work is based on the work done by Geert for R-Car E3. Fixes: f37d211c687588328 ("soc: renesas: rcar-sysc: Add r8a774c0 support") Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman

ARM: shmobile: fix build regressions

2019-01-07T12:31:05Z

A number of Kconfig options have become available now to random ARM platforms outside of ARCH_MULTIPLATFORM, which now causes Kconfig warnings, and other build errors when those select options that lack additional dependencies, e.g.: WARNING: unmet direct dependencies detected for HAVE_ARM_ARCH_TIMER Depends on [n]: CPU_V7 [=n] Selected by [y]: - ARCH_RCAR_GEN2 [=y] && SOC_RENESAS [=y] - ARCH_R8A73A4 [=y] && SOC_RENESAS [=y] && ARM [=y] WARNING: unmet direct dependencies detected for SYS_SUPPORTS_EM_STI Depends on [n]: GENERIC_CLOCKEVENTS [=n] Selected by [y]: - ARCH_EMEV2 [=y] && SOC_RENESAS [=y] && ARM [=y] Put the old dependency on ARCH_RENESAS back for the moment to restore the previous behavior. Fixes: 062887bf5ef7 ("ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/") Signed-off-by: Arnd Bergmann Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2019-01-01T01:32:35Z

Pull ARM SoC driver updates from Olof Johansson: "Misc driver updates for platforms, many of them power related. - Rockchip adds power domain support for rk3066 and rk3188 - Amlogic adds a power measurement driver - Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1) - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7 - Broadcom fixes suspend/resume with Thumb2 kernels, and improves stability of a handful of firmware/platform interfaces - PXA completes their conversion to dmaengine framework - Renesas does a bunch of PM cleanups across many platforms - Tegra adds support for suspend/resume on T186/T194, which includes some driver cleanups and addition of wake events - Tegra also adds a driver for memory controller (EMC) on Tegra2 - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60 and misc cleanups across several platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits) ARM: at91: add support in soc driver for new SAM9X60 ARM: at91: add support in soc driver for LPDDR2 SiP memory: omap-gpmc: Use of_node_name_eq for node name comparisons bus: ti-sysc: Check for no-reset and no-idle flags at the child level ARM: OMAP2+: Check also the first dts child for hwmod flags soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency soc: imx: gpc: Increase GPC_CLK_MAX to 7 soc: renesas: rcar-sysc: Fix power domain control after system resume soc: renesas: rcar-sysc: Merge PM Domain registration and linking soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B} dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1 dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1 dt-bindings: sram: Add Allwinner suniv F1C100s soc: sunxi: sram: Add support for the H5 SoC system control soc: sunxi: sram: Enable EMAC clock access for H3 variant soc: imx: gpcv2: add support for i.MX8MQ SoC soc: imx: gpcv2: move register access table to domain data soc: imx: gpcv2: prefix i.MX7 specific defines dmaengine: pxa: make the filter function internal ...

soc: renesas: rcar-sysc: Fix power domain control after system resume

2018-12-06T20:10:10Z

To control power to a power domain, the System Controller (SYSC) needs the corresponding interrupt source to be enabled, but masked, to prevent the CPU from receiving it. Currently this is handled in the driver's probe() routine, and set up for every domain present, even if it will not be controlled directly by SYSC (CPU domains are powered through the APMU on R-Car Gen2 and later). On R-Car Gen3, PSCI powers down the SoC during system suspend, thus losing any configured interrupt state. Hence after system resume, power domains not controlled through the APMU (e.g. A3IR, A3VC, A3VP) fail to power up. Fix this by replacing the global interrupt setup in the probe() routine by a domain-specific interrupt setup in rcar_sysc_power(), where the domain's power is actually controlled. This brings the code more in line with the flowchart in the Hardware User's Manual. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman

soc: renesas: rcar-sysc: Merge PM Domain registration and linking

2018-12-06T20:10:09Z

Commit 977d5ba4507dfe5b ("soc: renesas: rcar-sysc: Make PM domain initialization more robust") split PM Domain registration and the linking of children to their parents, to accommodate PM Domain tables that list child domains before their parents. However, this failed to realize that parent power domains must be powered up before their children anyway, and that this thus must be reflected by the order in the PM Domain tables. Revert the split, as it did not help anyway. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman

soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers

2018-12-06T20:10:09Z

Until commit 7e8a50df26f4e700 ("soc: renesas: rcar-sysc: Drop legacy handling"), the rcar_sysc_power_{down,up}() helpers were public, as they were called by the legacy (pre-DT) CPU power management code on R-Car H1 and R-Car Gen2 before. As they are just one-line wrappers around rcar_sysc_power(), it makes sense to just remove them. This also avoids a bool/helper/bool conversion in rcar_sysc_power_cpu(), where a bool is checked to call one of two helper functions, which just call rcar_sysc_power() with hardcoded boolean values again. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman

soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}

2018-12-06T20:10:08Z

The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on R-Car E3 ES1.0 corrected the parent domains. However, the 3DG-{A,B} power domains were still initialized and powered in the wrong order, causing 3DG operation to fail. Fix this by changing the order in the table at runtime, when running on an affected SoC. Fixes: 086b399965a7ee7e ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}") Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman