<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/powercap/intel_rapl_common.c, branch linux-6.18.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.18.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.18.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2026-01-08T09:17:21Z</updated>
<entry>
<title>powercap: intel_rapl: Add support for Nova Lake processors</title>
<updated>2026-01-08T09:17:21Z</updated>
<author>
<name>Kaushlendra Kumar</name>
</author>
<published>2025-10-28T10:18:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=845306163962454083f97d9a2e22f67f94ac8e1f'/>
<id>urn:sha1:845306163962454083f97d9a2e22f67f94ac8e1f</id>
<content type='text'>
commit 58075aec92a8141fd7f42e1c36d1bc54552c015e upstream.

Add RAPL support for Intel Nova Lake and Nova Lake L processors using
the core defaults configuration.

Signed-off-by: Kaushlendra Kumar &lt;kaushlendra.kumar@intel.com&gt;
[ rjw: Subject and changelog edits, rebase ]
Link: https://patch.msgid.link/20251028101814.3482508-1-kaushlendra.kumar@intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Add support for Wildcat Lake platform</title>
<updated>2026-01-08T09:17:21Z</updated>
<author>
<name>Srinivas Pandruvada</name>
</author>
<published>2025-10-23T17:45:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=77aa0f5223ffc33545712ec73392822614ed2e9d'/>
<id>urn:sha1:77aa0f5223ffc33545712ec73392822614ed2e9d</id>
<content type='text'>
commit 39f421f2e301f995c17c35b783e2863155b3f647 upstream.

Add Wildcat Lake to the list of supported processors for RAPL.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Link: https://patch.msgid.link/20251023174532.1882008-1-srinivas.pandruvada@linux.intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Add support for Bartlett Lake platform</title>
<updated>2025-06-30T18:34:57Z</updated>
<author>
<name>Qiao Wei</name>
</author>
<published>2025-06-12T07:06:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=82a7021f5074ff69478b5104739b91ff2ae3bb4a'/>
<id>urn:sha1:82a7021f5074ff69478b5104739b91ff2ae3bb4a</id>
<content type='text'>
Add Bartlett Lake to the list of supported processors in the RAPL
common driver.

Acked-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Qiao Wei &lt;wei.qiao@intel.com&gt;
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Do not change CLAMPING bit if ENABLE bit cannot be changed</title>
<updated>2025-06-30T18:32:29Z</updated>
<author>
<name>Zhang Rui</name>
</author>
<published>2025-06-19T07:13:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=964209202ebe1569c858337441e87ef0f9d71416'/>
<id>urn:sha1:964209202ebe1569c858337441e87ef0f9d71416</id>
<content type='text'>
PL1 cannot be disabled on some platforms. The ENABLE bit is still set
after software clears it. This behavior leads to a scenario where, upon
user request to disable the Power Limit through the powercap sysfs, the
ENABLE bit remains set while the CLAMPING bit is inadvertently cleared.

According to the Intel Software Developer's Manual, the CLAMPING bit,
"When set, allows the processor to go below the OS requested P states in
order to maintain the power below specified Platform Power Limit value."

Thus this means the system may operate at higher power levels than
intended on such platforms.

Enhance the code to check ENABLE bit after writing to it, and stop
further processing if ENABLE bit cannot be changed.

Reported-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Fixes: 2d281d8196e3 ("PowerCap: Introduce Intel RAPL power capping driver")
Cc: All applicable &lt;stable@vger.kernel.org&gt;
Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Link: https://patch.msgid.link/20250619071340.384782-1-rui.zhang@intel.com
[ rjw: Use str_enabled_disabled() instead of open-coded equivalent ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>x86/msr: Add explicit includes of &lt;asm/msr.h&gt;</title>
<updated>2025-05-02T08:23:47Z</updated>
<author>
<name>Xin Li (Intel)</name>
</author>
<published>2025-05-01T05:42:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=efef7f184f2eaf29a1ca676712d0e6e851cd0191'/>
<id>urn:sha1:efef7f184f2eaf29a1ca676712d0e6e851cd0191</id>
<content type='text'>
For historic reasons there are some TSC-related functions in the
&lt;asm/msr.h&gt; header, even though there's an &lt;asm/tsc.h&gt; header.

To facilitate the relocation of rdtsc{,_ordered}() from &lt;asm/msr.h&gt;
to &lt;asm/tsc.h&gt; and to eventually eliminate the inclusion of
&lt;asm/msr.h&gt; in &lt;asm/tsc.h&gt;, add an explicit &lt;asm/msr.h&gt; dependency
to the source files that reference definitions from &lt;asm/msr.h&gt;.

[ mingo: Clarified the changelog. ]

Signed-off-by: Xin Li (Intel) &lt;xin@zytor.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Acked-by: Dave Hansen &lt;dave.hansen@linux.intel.com&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Acked-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Cc: Andy Lutomirski &lt;luto@kernel.org&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Juergen Gross &lt;jgross@suse.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Kees Cook &lt;keescook@chromium.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Josh Poimboeuf &lt;jpoimboe@redhat.com&gt;
Cc: Uros Bizjak &lt;ubizjak@gmail.com&gt;
Link: https://lore.kernel.org/r/20250501054241.1245648-1-xin@zytor.com
</content>
</entry>
<entry>
<title>Merge tag 'timers-cleanups-2025-03-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2025-03-25T17:54:15Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2025-03-25T17:54:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a50b4fe095fb98e0b7da03b0a42fd1247284868e'/>
<id>urn:sha1:a50b4fe095fb98e0b7da03b0a42fd1247284868e</id>
<content type='text'>
Pull timer cleanups from Thomas Gleixner:
 "A treewide hrtimer timer cleanup

  hrtimers are initialized with hrtimer_init() and a subsequent store to
  the callback pointer. This turned out to be suboptimal for the
  upcoming Rust integration and is obviously a silly implementation to
  begin with.

  This cleanup replaces the hrtimer_init(T); T-&gt;function = cb; sequence
  with hrtimer_setup(T, cb);

  The conversion was done with Coccinelle and a few manual fixups.

  Once the conversion has completely landed in mainline, hrtimer_init()
  will be removed and the hrtimer::function becomes a private member"

* tag 'timers-cleanups-2025-03-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (100 commits)
  wifi: rt2x00: Switch to use hrtimer_update_function()
  io_uring: Use helper function hrtimer_update_function()
  serial: xilinx_uartps: Use helper function hrtimer_update_function()
  ASoC: fsl: imx-pcm-fiq: Switch to use hrtimer_setup()
  RDMA: Switch to use hrtimer_setup()
  virtio: mem: Switch to use hrtimer_setup()
  drm/vmwgfx: Switch to use hrtimer_setup()
  drm/xe/oa: Switch to use hrtimer_setup()
  drm/vkms: Switch to use hrtimer_setup()
  drm/msm: Switch to use hrtimer_setup()
  drm/i915/request: Switch to use hrtimer_setup()
  drm/i915/uncore: Switch to use hrtimer_setup()
  drm/i915/pmu: Switch to use hrtimer_setup()
  drm/i915/perf: Switch to use hrtimer_setup()
  drm/i915/gvt: Switch to use hrtimer_setup()
  drm/i915/huc: Switch to use hrtimer_setup()
  drm/amdgpu: Switch to use hrtimer_setup()
  stm class: heartbeat: Switch to use hrtimer_setup()
  i2c: Switch to use hrtimer_setup()
  iio: Switch to use hrtimer_setup()
  ...
</content>
</entry>
<entry>
<title>powercap: Switch to use hrtimer_setup()</title>
<updated>2025-02-18T10:19:03Z</updated>
<author>
<name>Nam Cao</name>
</author>
<published>2025-02-05T10:46:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d9a67240729dbfb097a1258484d8c8ae100769b1'/>
<id>urn:sha1:d9a67240729dbfb097a1258484d8c8ae100769b1</id>
<content type='text'>
hrtimer_setup() takes the callback function pointer as argument and
initializes the timer completely.

Replace hrtimer_init() and the open coded initialization of
hrtimer::function with the new setup mechanism.

Patch was created by using Coccinelle.

Signed-off-by: Nam Cao &lt;namcao@linutronix.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Rafael J. Wysocki &lt;rafael@kernel.org&gt;
Acked-by: Zack Rusin &lt;zack.rusin@broadcom.com&gt;
Link: https://lore.kernel.org/all/fffc5ecc232069d91817b519dcafd8985120e51c.1738746904.git.namcao@linutronix.de

</content>
</entry>
<entry>
<title>x86/cpu: Fix #define name for Intel CPU model 0x5A</title>
<updated>2025-02-04T18:05:53Z</updated>
<author>
<name>Tony Luck</name>
</author>
<published>2024-10-07T16:57:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1e66d6cf888fd206a89b8c476b1b28b63faf7fd6'/>
<id>urn:sha1:1e66d6cf888fd206a89b8c476b1b28b63faf7fd6</id>
<content type='text'>
This CPU was mistakenly given the name INTEL_ATOM_AIRMONT_MID. But it
uses a Silvermont core, not Airmont.

Change #define name to INTEL_ATOM_SILVERMONT_MID2

Reported-by: Christian Ludloff &lt;ludloff@gmail.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Dave Hansen &lt;dave.hansen@linux.intel.com&gt;
Link: https://lore.kernel.org/all/20241007165701.19693-1-tony.luck%40intel.com
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Add support for Panther Lake platform</title>
<updated>2024-12-10T19:01:38Z</updated>
<author>
<name>Zhang Rui</name>
</author>
<published>2024-12-03T07:58:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=85a810f91d9bb9c4440cbe745643cec87642ae5c'/>
<id>urn:sha1:85a810f91d9bb9c4440cbe745643cec87642ae5c</id>
<content type='text'>
Add support for PantherLake platform to the RAPL common driver.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Link: https://patch.msgid.link/20241203075802.584741-2-rui.zhang@intel.com
[ rjw: Subject edit ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Change an error pointer to NULL</title>
<updated>2024-08-23T13:45:17Z</updated>
<author>
<name>Dan Carpenter</name>
</author>
<published>2024-08-23T12:51:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6b08b4ee5e60d8789aeb87250f718ef14bebb90e'/>
<id>urn:sha1:6b08b4ee5e60d8789aeb87250f718ef14bebb90e</id>
<content type='text'>
The rapl_find_package_domain_cpuslocked() function is supposed to
return NULL on error.

This new error patch returns ERR_PTR(-EINVAL) but none of the callers
check for that so it would lead to an Oops.

Fixes: 26096aed255f ("powercap/intel_rapl: Fix the energy-pkg event for AMD CPUs")
Signed-off-by: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Link: https://patch.msgid.link/fa719c6a-8d3b-4cca-9b43-bcd477ff6655@stanley.mountain
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
</feed>
