<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/platform/x86/p2sb.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-rolling-stable</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-rolling-stable'/>
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<updated>2024-12-10T14:24:51Z</updated>
<entry>
<title>p2sb: Do not scan and remove the P2SB device when it is unhidden</title>
<updated>2024-12-10T14:24:51Z</updated>
<author>
<name>Shin'ichiro Kawasaki</name>
</author>
<published>2024-11-28T00:28:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=360c400d0f568636c1b98d1d5f9f49aa3d420c70'/>
<id>urn:sha1:360c400d0f568636c1b98d1d5f9f49aa3d420c70</id>
<content type='text'>
When drivers access P2SB device resources, it calls p2sb_bar(). Before
the commit 5913320eb0b3 ("platform/x86: p2sb: Allow p2sb_bar() calls
during PCI device probe"), p2sb_bar() obtained the resources and then
called pci_stop_and_remove_bus_device() for clean up. Then the P2SB
device disappeared. The commit 5913320eb0b3 introduced the P2SB device
resource cache feature in the boot process. During the resource cache,
pci_stop_and_remove_bus_device() is called for the P2SB device, then the
P2SB device disappears regardless of whether p2sb_bar() is called or
not. Such P2SB device disappearance caused a confusion [1]. To avoid the
confusion, avoid the pci_stop_and_remove_bus_device() call when the BIOS
does not hide the P2SB device.

For that purpose, cache the P2SB device resources only if the BIOS hides
the P2SB device. Call p2sb_scan_and_cache() only if p2sb_hidden_by_bios
is true. This allows removing two branches from p2sb_scan_and_cache().
When p2sb_bar() is called, get the resources from the cache if the P2SB
device is hidden. Otherwise, read the resources from the unhidden P2SB
device.

Reported-by: Daniel Walker (danielwa) &lt;danielwa@cisco.com&gt;
Closes: https://lore.kernel.org/lkml/ZzTI+biIUTvFT6NC@goliath/ [1]
Fixes: 5913320eb0b3 ("platform/x86: p2sb: Allow p2sb_bar() calls during PCI device probe")
Signed-off-by: Shin'ichiro Kawasaki &lt;shinichiro.kawasaki@wdc.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Link: https://lore.kernel.org/r/20241128002836.373745-5-shinichiro.kawasaki@wdc.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>p2sb: Move P2SB hide and unhide code to p2sb_scan_and_cache()</title>
<updated>2024-12-10T14:24:49Z</updated>
<author>
<name>Shin'ichiro Kawasaki</name>
</author>
<published>2024-11-28T00:28:35Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0286070c74ee48391fc07f7f617460479472d221'/>
<id>urn:sha1:0286070c74ee48391fc07f7f617460479472d221</id>
<content type='text'>
To prepare for the following fix, move the code to hide and unhide the
P2SB device from p2sb_cache_resources() to p2sb_scan_and_cache().

Signed-off-by: Shin'ichiro Kawasaki &lt;shinichiro.kawasaki@wdc.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Link: https://lore.kernel.org/r/20241128002836.373745-4-shinichiro.kawasaki@wdc.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>p2sb: Introduce the global flag p2sb_hidden_by_bios</title>
<updated>2024-12-10T14:24:48Z</updated>
<author>
<name>Shin'ichiro Kawasaki</name>
</author>
<published>2024-11-28T00:28:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ae3e6ebc5ab046d434c05c58a3e3f7e94441fec2'/>
<id>urn:sha1:ae3e6ebc5ab046d434c05c58a3e3f7e94441fec2</id>
<content type='text'>
To prepare for the following fix, introduce the global flag
p2sb_hidden_by_bios. Check if the BIOS hides the P2SB device and store
the result in the flag. This allows to refer to the check result across
functions.

Signed-off-by: Shin'ichiro Kawasaki &lt;shinichiro.kawasaki@wdc.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Link: https://lore.kernel.org/r/20241128002836.373745-3-shinichiro.kawasaki@wdc.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>p2sb: Factor out p2sb_read_from_cache()</title>
<updated>2024-12-10T14:24:45Z</updated>
<author>
<name>Shin'ichiro Kawasaki</name>
</author>
<published>2024-11-28T00:28:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9244524d60ddea55f4df54c51200e8fef2032447'/>
<id>urn:sha1:9244524d60ddea55f4df54c51200e8fef2032447</id>
<content type='text'>
To prepare for the following fix, factor out the code to read the P2SB
resource from the cache to the new function p2sb_read_from_cache().

Signed-off-by: Shin'ichiro Kawasaki &lt;shinichiro.kawasaki@wdc.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Link: https://lore.kernel.org/r/20241128002836.373745-2-shinichiro.kawasaki@wdc.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86: p2sb: Cache correct PCI bar for P2SB on Gemini Lake</title>
<updated>2024-11-18T11:53:03Z</updated>
<author>
<name>Hans de Goede</name>
</author>
<published>2024-11-16T15:45:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c6a2b4fcec5f2d80b0183fae1117f06127584c28'/>
<id>urn:sha1:c6a2b4fcec5f2d80b0183fae1117f06127584c28</id>
<content type='text'>
Gemini Lake (Goldmont Plus) is an Apollo Lake (Goldmont) derived design and
as such has the P2SB at device.function 13.0, rather then at the default
31.1, just like Apollo Lake.

At a mapping to P2SB_DEVFN_GOLDMONT to p2sb_cpu_ids[] for Goldmont Plus,
so that the correct PCI bar gets cached.

This fixes P2SB unhiding not working on these devices, which fixes
SPI support for the bootrom SPI controller not working.

Fixes: 2841631a0365 ("platform/x86: p2sb: Allow p2sb_bar() calls during PCI device probe")
Reviewed-by: Andy Shevchenko &lt;andy@kernel.org&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Link: https://lore.kernel.org/r/20241116154546.85761-1-hdegoede@redhat.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86: p2sb: Switch to new Intel CPU model defines</title>
<updated>2024-06-03T06:49:02Z</updated>
<author>
<name>Tony Luck</name>
</author>
<published>2024-05-31T20:37:00Z</published>
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<id>urn:sha1:fad21268dc3141bbe63a8556fe5f771af4e11ecc</id>
<content type='text'>
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Acked-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Link: https://lore.kernel.org/r/20240531203706.233365-5-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86: p2sb: Don't init until unassigned resources have been assigned</title>
<updated>2024-05-14T09:43:39Z</updated>
<author>
<name>Ben Fradella</name>
</author>
<published>2024-05-09T16:49:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2c6370e6607663fc5fa0fd9ed58e2e01014898c7'/>
<id>urn:sha1:2c6370e6607663fc5fa0fd9ed58e2e01014898c7</id>
<content type='text'>
The P2SB could get an invalid BAR from the BIOS, and that won't be fixed
up until pcibios_assign_resources(), which is an fs_initcall().

- Move p2sb_fs_init() to an fs_initcall_sync(). This is still early
  enough to avoid a race with any dependent drivers.

- Add a check for IORESOURCE_UNSET in p2sb_valid_resource() to catch
  unset BARs going forward.

- Return error values from p2sb_fs_init() so that the 'initcall_debug'
  cmdline arg provides useful data.

Signed-off-by: Ben Fradella &lt;bfradell@netapp.com&gt;
Acked-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Tested-by: Klara Modin &lt;klarasmodin@gmail.com&gt;
Reviewed-by: Shin'ichiro Kawasaki &lt;shinichiro.kawasaki@wdc.com&gt;
Link: https://lore.kernel.org/r/20240509164905.41016-1-bcfradella@proton.me
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86: p2sb: Make p2sb_get_devfn() return void</title>
<updated>2024-03-25T14:44:03Z</updated>
<author>
<name>Hans de Goede</name>
</author>
<published>2024-03-05T09:45:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3ff5873602a874035ba28826852bd45393002a08'/>
<id>urn:sha1:3ff5873602a874035ba28826852bd45393002a08</id>
<content type='text'>
p2sb_get_devfn() always succeeds, make it return void and
remove error checking from its callers.

Reviewed-by: Shin'ichiro Kawasaki &lt;shinichiro.kawasaki@wdc.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Link: https://lore.kernel.org/r/20240305094500.23778-1-hdegoede@redhat.com
</content>
</entry>
<entry>
<title>platform/x86: p2sb: On Goldmont only cache P2SB and SPI devfn BAR</title>
<updated>2024-03-05T09:16:27Z</updated>
<author>
<name>Hans de Goede</name>
</author>
<published>2024-03-04T13:43:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=aec7d25b497ce4a8d044e9496de0aa433f7f8f06'/>
<id>urn:sha1:aec7d25b497ce4a8d044e9496de0aa433f7f8f06</id>
<content type='text'>
On Goldmont p2sb_bar() only ever gets called for 2 devices, the actual P2SB
devfn 13,0 and the SPI controller which is part of the P2SB, devfn 13,2.

But the current p2sb code tries to cache BAR0 info for all of
devfn 13,0 to 13,7 . This involves calling pci_scan_single_device()
for device 13 functions 0-7 and the hw does not seem to like
pci_scan_single_device() getting called for some of the other hidden
devices. E.g. on an ASUS VivoBook D540NV-GQ065T this leads to continuous
ACPI errors leading to high CPU usage.

Fix this by only caching BAR0 info and thus only calling
pci_scan_single_device() for the P2SB and the SPI controller.

Fixes: 5913320eb0b3 ("platform/x86: p2sb: Allow p2sb_bar() calls during PCI device probe")
Reported-by: Danil Rybakov &lt;danilrybakov249@gmail.com&gt;
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218531
Tested-by: Danil Rybakov &lt;danilrybakov249@gmail.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Link: https://lore.kernel.org/r/20240304134356.305375-2-hdegoede@redhat.com
</content>
</entry>
<entry>
<title>platform/x86: p2sb: Use pci_resource_n() in p2sb_read_bar0()</title>
<updated>2024-01-22T10:37:27Z</updated>
<author>
<name>Shin'ichiro Kawasaki</name>
</author>
<published>2024-01-08T06:20:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9e054ed05ddae2c1b4b2bcb5dfcae49c5ac7637e'/>
<id>urn:sha1:9e054ed05ddae2c1b4b2bcb5dfcae49c5ac7637e</id>
<content type='text'>
Accesses to resource[] member of struct pci_dev shall be wrapped with
pci_resource_n() for future compatibility. Call the helper function in
p2sb_read_bar0().

Suggested-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Shin'ichiro Kawasaki &lt;shinichiro.kawasaki@wdc.com&gt;
Link: https://lore.kernel.org/r/20240108062059.3583028-3-shinichiro.kawasaki@wdc.com
Tested-by Klara Modin &lt;klarasmodin@gmail.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
</feed>
