kernel.git/drivers/platform/x86/mlx-platform.c, branch linux-6.6.y

platform/x86: mlx-platform: call pci_dev_put() to balance the refcount

2025-01-09T12:31:53Z

[ Upstream commit 185e1b1d91e419445d3fd99c1c0376a970438acf ] mlxplat_pci_fpga_device_init() calls pci_get_device() but does not release the refcount on error path. Call pci_dev_put() on the error path and in mlxplat_pci_fpga_device_exit() to fix this. This bug was found by an experimental static analysis tool that I am developing. Fixes: 02daa222fbdd ("platform: mellanox: Add initial support for PCIe based programming logic device") Signed-off-by: Joe Hattori Reviewed-by: Vadim Pasternak Link: https://lore.kernel.org/r/20241216022538.381209-1-joe@pf.is.s.u-tokyo.ac.jp Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen Signed-off-by: Sasha Levin

platform: mellanox: Fix a resource leak in an error handling path in probing flow

2023-10-06T13:40:35Z

Fix missed resource deallocation in rollback flows. Currently if an error occurs after a successful mlxplat_i2c_main_init(), mlxplat_i2c_main_exit() call is missed in rollback flow. Thus, some resources are not de-allocated. Move mlxplat_pre_exit() call from mlxplat_remove() into mlxplat_i2c_main_exit(). Call mlxplat_i2c_main_exit() instead of calling mlxplat_pre_exit() in mlxplat_probe() error handling flow. Unregister 'priv->pdev_i2c' device in mlxplat_i2c_main_init() cleanup flow if this device was successfully registered. Fixes: 158cd8320776 ("platform: mellanox: Split logic in init and exit flow") Reported-by: Christophe JAILLET Closes: https://lore.kernel.org/lkml/70165032-796e-6f5c-6748-f514e3b9d08c@linux.intel.com/T/ Signed-off-by: Vadim Pasternak Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20231005075616.42777-2-vadimp@nvidia.com Signed-off-by: Ilpo Järvinen

platform: mellanox: Add initial support for PCIe based programming logic device

2023-08-23T15:31:30Z

Extend driver to support logic implemented by FPGA device connected through PCIe bus. The motivation two support new generation of Nvidia COME module equipped with Lattice LFD2NX-40 FPGA device. In order to support new Nvidia COME module FPGA device driver initialization flow is modified. In case FPGA device is detected, system resources are to be mapped to this device, otherwise system resources are to be mapped same as it has been done before for Lattice LPC based CPLD. FPGA device is associated with three PCIe devices: - PCIe-LPC bridge for main register space access. - PCIe-I2C bridge for I2C controller access. - PCIe-JTAG bridge for JTAG access. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-14-vadimp@nvidia.com Signed-off-by: Hans de Goede

platform: mellanox: mlx-platform: Get interrupt line through ACPI

2023-08-23T15:31:29Z

Add support for getting system interrupt line from ACPI table. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-13-vadimp@nvidia.com Signed-off-by: Hans de Goede

platform: mellanox: mlx-platform: Introduce ACPI init flow

2023-08-23T15:31:29Z

Introduce support for ACPI initialization flow - add ACPI match hook. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-12-vadimp@nvidia.com Signed-off-by: Hans de Goede

platform: mellanox: mlx-platform: Prepare driver to allow probing through ACPI infrastructure

2023-08-23T15:31:29Z

Currently driver is activated through DMI hooks. Prepare driver to allow activation also through ACPI trigger. Modify mlxplat_init()/mlxplat_exit() routines. Add mlxplat_probe()/mlxplat_remove() routines and "mlxplat_driver" structure. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-11-vadimp@nvidia.com Signed-off-by: Hans de Goede

platform: mellanox: mlx-platform: Add reset callback

2023-08-23T15:31:29Z

On L1 switches reset should include special actions against CPLD device for performing graceful operations. For that purpose, special PLATFORM_RESET# signal should be indicated. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-10-vadimp@nvidia.com Signed-off-by: Hans de Goede

platform: mellanox: Cosmetic changes

2023-08-23T15:31:28Z

Fix routines and labels names by s/topolgy/topology. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-9-vadimp@nvidia.com Signed-off-by: Hans de Goede

platform: mellanox: mlx-platform: Modify power off callback

2023-08-23T15:31:28Z

Extend platform power off callback with kernel_halt() call. When powering off, the process involves setting a halt bit in the register space, which is then activated after a certain delay and power off auxiliary power. By invoking `kernel_halt()` within this timeframe, the intention is to facilitate a clean system power-off sequence. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-8-vadimp@nvidia.com Signed-off-by: Hans de Goede

platform: mellanox: mlx-platform: add support for additional CPLD

2023-08-23T15:31:28Z

Extend to support 5-th CPLD version, PN and minimal version registers. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-7-vadimp@nvidia.com Signed-off-by: Hans de Goede