<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/pinctrl/qcom/Kconfig, branch linux-5.11.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.11.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.11.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2020-12-05T22:36:24Z</updated>
<entry>
<title>pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver</title>
<updated>2020-12-05T22:36:24Z</updated>
<author>
<name>Srinivas Kandagatla</name>
</author>
<published>2020-12-02T16:34:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6e261d1090d6db0e9dd22978b6f38a2c58558a3f'/>
<id>urn:sha1:6e261d1090d6db0e9dd22978b6f38a2c58558a3f</id>
<content type='text'>
Add initial pinctrl driver to support pin configuration for
LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SM8250.

This IP is an additional pin control block for Audio Pins on top the
existing SoC Top level pin-controller.
Hardware setup looks like:

TLMM GPIO[146 - 159] --&gt; LPASS LPI GPIO [0 - 13]

This pin controller has some similarities compared to Top level
msm SoC Pin controller like 'each pin belongs to a single group'
and so on. However this one is intended to control only audio
pins in particular, which can not be configured/touched by the
Top level SoC pin controller except setting them as gpios.
Apart from this, slew rate is also available in this block for
certain pins which are connected to SLIMbus or SoundWire Bus.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20201202163443.26499-3-srinivas.kandagatla@linaro.org
[Add some dependencies]
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add sc7280 pinctrl driver</title>
<updated>2020-11-24T08:37:03Z</updated>
<author>
<name>Rajendra Nayak</name>
</author>
<published>2020-11-05T09:56:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ecb454594c43456bdeb1bd5cd68ac454db51b2c6'/>
<id>urn:sha1:ecb454594c43456bdeb1bd5cd68ac454db51b2c6</id>
<content type='text'>
Add initial pinctrl driver to support pin configuration with
pinctrl framework for SC7280 SoC

Signed-off-by: Rajendra Nayak &lt;rnayak@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/1604570192-15057-2-git-send-email-rnayak@codeaurora.org
[Change select PINCTRL_MSM to depends on PINCTRL_MSM]
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Fix msm8953 Kconfig entry to depend on, not select PINCTRL_MSM</title>
<updated>2020-11-24T08:33:16Z</updated>
<author>
<name>John Stultz</name>
</author>
<published>2020-11-10T21:56:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2a984219b53422261cd90feb8a1bb5c1583be3fb'/>
<id>urn:sha1:2a984219b53422261cd90feb8a1bb5c1583be3fb</id>
<content type='text'>
One fixup following my patch commit be117ca32261 ("pinctrl:
qcom: Kconfig: Rework PINCTRL_MSM to be a depenency rather then
a selected config") being queued in LinusW's tree, as a new
config entry was added for the msm8953 that also needs the
change.

Applies to LinusW's pinctrl devel tree.

Signed-off-by: John Stultz &lt;john.stultz@linaro.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Cc: Andy Gross &lt;agross@kernel.org&gt;
Cc: Prasad Sodagudi &lt;psodagud@codeaurora.org&gt;
Cc: Vladimir Lypak &lt;junak.pub@gmail.com&gt;
Cc: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Link: https://lore.kernel.org/r/20201110215619.86076-1-john.stultz@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sdx55: update kconfig dependency</title>
<updated>2020-11-11T08:58:36Z</updated>
<author>
<name>Vinod Koul</name>
</author>
<published>2020-11-11T04:36:10Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=80f1803dbc0506c5d192ef4df4e851690ca68114'/>
<id>urn:sha1:80f1803dbc0506c5d192ef4df4e851690ca68114</id>
<content type='text'>
Commit be117ca32261 ("pinctrl: qcom: Kconfig: Rework PINCTRL_MSM to be a
dependency rather then a selected config") moved the qcom pinctrl drivers
to have PINCTRL_MSM as dependency rather then a selected config, so do
this change for SDX55 pinctrl driver as well.

Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20201111043610.177168-1-vkoul@kernel.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add SDX55 pincontrol driver</title>
<updated>2020-11-10T14:45:37Z</updated>
<author>
<name>Jeevan Shriram</name>
</author>
<published>2020-11-09T06:26:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ac43c44a7a375ae0f0e96e10e227e226f2f2cb70'/>
<id>urn:sha1:ac43c44a7a375ae0f0e96e10e227e226f2f2cb70</id>
<content type='text'>
Add initial Qualcomm SDX55 pinctrl driver to support pin configuration
with pinctrl framework for SDX55 SoC.

[ported from downstream and tidy up]

Signed-off-by: Jeevan Shriram &lt;jshriram@codeaurora.org&gt;
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://lore.kernel.org/r/20201109062620.14566-3-vkoul@kernel.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Allow pinctrl-msm code to be loadable as a module</title>
<updated>2020-11-10T13:58:15Z</updated>
<author>
<name>John Stultz</name>
</author>
<published>2020-11-06T04:27:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=38e86f5c2645f3c16f698fa7e66b4eb23da5369c'/>
<id>urn:sha1:38e86f5c2645f3c16f698fa7e66b4eb23da5369c</id>
<content type='text'>
Tweaks to allow pinctrl-msm code to be loadable as a module.

This is needed in order to support having the qcom-scm driver,
which pinctrl-msm calls into, configured as a module.

This requires that we tweak Kconfigs selecting PINCTRL_MSM to
also depend on QCOM_SCM || QCOM_SCM=n so that we match the
module setting of QCOM_SCM.

Signed-off-by: John Stultz &lt;john.stultz@linaro.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Andy Gross &lt;agross@kernel.org&gt;
Cc: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Cc: Joerg Roedel &lt;joro@8bytes.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Vinod Koul &lt;vkoul@kernel.org&gt;
Cc: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Cc: Maulik Shah &lt;mkshah@codeaurora.org&gt;
Cc: Lina Iyer &lt;ilina@codeaurora.org&gt;
Cc: Saravana Kannan &lt;saravanak@google.com&gt;
Cc: Todd Kjos &lt;tkjos@google.com&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: linux-arm-msm@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-gpio@vger.kernel.org
Link: https://lore.kernel.org/r/20201106042710.55979-2-john.stultz@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Kconfig: Rework PINCTRL_MSM to be a depenency rather then a selected config</title>
<updated>2020-11-10T13:58:14Z</updated>
<author>
<name>John Stultz</name>
</author>
<published>2020-11-06T04:27:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=be117ca32261c3331b614f440c737650791a6998'/>
<id>urn:sha1:be117ca32261c3331b614f440c737650791a6998</id>
<content type='text'>
This patch reworks PINCTRL_MSM to be a visible option, and
instead of having the various SoC specific drivers select
PINCTRL_MSM, this switches those configs to depend on
PINCTRL_MSM.

This is useful, as it will be needed in order to cleanly support
having the qcom-scm driver, which pinctrl-msm calls into,
configured as a module. Without this change, we would eventually
have to add dependency lines to every config that selects
PINCTRL_MSM, and that would becomes a maintenance headache.

We also add PINCTRL_MSM to the arm64 defconfig to avoid
surprises as otherwise PINCTRL_MSM/IPQ* options previously
enabled, will be off.

Signed-off-by: John Stultz &lt;john.stultz@linaro.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Andy Gross &lt;agross@kernel.org&gt;
Cc: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Cc: Joerg Roedel &lt;joro@8bytes.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Vinod Koul &lt;vkoul@kernel.org&gt;
Cc: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Cc: Maulik Shah &lt;mkshah@codeaurora.org&gt;
Cc: Lina Iyer &lt;ilina@codeaurora.org&gt;
Cc: Saravana Kannan &lt;saravanak@google.com&gt;
Cc: Todd Kjos &lt;tkjos@google.com&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: linux-arm-msm@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-gpio@vger.kernel.org
Link: https://lore.kernel.org/r/20201106042710.55979-1-john.stultz@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: add pinctrl driver for msm8953</title>
<updated>2020-11-10T13:58:14Z</updated>
<author>
<name>Vladimir Lypak</name>
</author>
<published>2020-10-07T16:06:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0e74abf3a0a3a711145f11f3a782432a2df5f744'/>
<id>urn:sha1:0e74abf3a0a3a711145f11f3a782432a2df5f744</id>
<content type='text'>
Add inititial pinctrl driver for MSM8953 platform. Compatible SoCs are:
MSM8953, APQ8053, SDM(SDA)450, SDM(SDA)632.
Based off CAF implementation.

Signed-off-by: Prasad Sodagudi &lt;psodagud@codeaurora.org&gt;
Signed-off-by: Vladimir Lypak &lt;junak.pub@gmail.com&gt;
Acked-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20201007160611.942754-1-junak.pub@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add msm8226 pinctrl driver.</title>
<updated>2020-08-27T08:27:14Z</updated>
<author>
<name>Bartosz Dudziak</name>
</author>
<published>2020-07-16T20:55:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=db436a7198a78d8d02178dc992ad5ae2de57cd2e'/>
<id>urn:sha1:db436a7198a78d8d02178dc992ad5ae2de57cd2e</id>
<content type='text'>
Add initial Qualcomm msm8226 pinctrl driver to support pin configuration
with pinctrl framework for msm8226 SoC.

- Initial formatting and style was taken from the msm8x74 pinctrl driver
  added by Björn Andersson &lt;bjorn.andersson@linaro.org&gt;

Signed-off-by: Bartosz Dudziak &lt;bartosz.dudziak@snejp.pl&gt;
Link: https://lore.kernel.org/r/20200716205530.22910-3-bartosz.dudziak@snejp.pl
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Handle broken/missing PDC dual edge IRQs on sc7180</title>
<updated>2020-07-16T13:41:41Z</updated>
<author>
<name>Douglas Anderson</name>
</author>
<published>2020-07-14T15:04:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c3c0c2e18d943ec4a84162ac679970b592555a4a'/>
<id>urn:sha1:c3c0c2e18d943ec4a84162ac679970b592555a4a</id>
<content type='text'>
Depending on how you look at it, you can either say that:
a) There is a PDC hardware issue (with the specific IP rev that exists
   on sc7180) that causes the PDC not to work properly when configured
   to handle dual edges.
b) The dual edge feature of the PDC hardware was only added in later
   HW revisions and thus isn't in all hardware.

Regardless of how you look at it, let's work around the lack of dual
edge support by only ever letting our parent see requests for single
edge interrupts on affected hardware.

NOTE: it's possible that a driver requesting a dual edge interrupt
might get several edges coalesced into a single IRQ.  For instance if
a line starts low and then goes high and low again, the driver that
requested the IRQ is not guaranteed to be called twice.  However, it
is guaranteed that once the driver's interrupt handler starts running
its first instruction that any new edges coming in will cause the
interrupt to fire again.  This is relatively commonplace for dual-edge
gpio interrupts (many gpio controllers require software to emulate
dual edge with single edge) so client drivers should be setup to
handle it.

Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Reviewed-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200714080254.v3.1.Ie0d730120b232a86a4eac1e2909bcbec844d1766@changeid
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
