<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/pinctrl/pinctrl-single.c, branch linux-4.4.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.4.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.4.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2021-09-22T09:41:23Z</updated>
<entry>
<title>pinctrl: single: Fix error return code in pcs_parse_bits_in_pinctrl_entry()</title>
<updated>2021-09-22T09:41:23Z</updated>
<author>
<name>Zhen Lei</name>
</author>
<published>2021-07-22T03:39:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0fda79d3c3c48dd8ff2e0f47cace0366b003fc97'/>
<id>urn:sha1:0fda79d3c3c48dd8ff2e0f47cace0366b003fc97</id>
<content type='text'>
[ Upstream commit d789a490d32fdf0465275e3607f8a3bc87d3f3ba ]

Fix to return -ENOTSUPP instead of 0 when PCS_HAS_PINCONF is true, which
is the same as that returned in pcs_parse_pinconf().

Fixes: 4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: Zhen Lei &lt;thunder.leizhen@huawei.com&gt;
Link: https://lore.kernel.org/r/20210722033930.4034-2-thunder.leizhen@huawei.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl-single: fix pcs_parse_pinconf() return value</title>
<updated>2020-08-21T08:53:03Z</updated>
<author>
<name>Drew Fustini</name>
</author>
<published>2020-06-08T12:51:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6686a02d2a5f7e70094cb732347c125f35f7c073'/>
<id>urn:sha1:6686a02d2a5f7e70094cb732347c125f35f7c073</id>
<content type='text'>
[ Upstream commit f46fe79ff1b65692a65266a5bec6dbe2bf7fc70f ]

This patch causes pcs_parse_pinconf() to return -ENOTSUPP when no
pinctrl_map is added.  The current behavior is to return 0 when
!PCS_HAS_PINCONF or !nconfs.  Thus pcs_parse_one_pinctrl_entry()
incorrectly assumes that a map was added and sets num_maps = 2.

Analysis:
=========
The function pcs_parse_one_pinctrl_entry() calls pcs_parse_pinconf()
if PCS_HAS_PINCONF is enabled.  The function pcs_parse_pinconf()
returns 0 to indicate there was no error and num_maps is then set to 2:

 980 static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
 981                                                 struct device_node *np,
 982                                                 struct pinctrl_map **map,
 983                                                 unsigned *num_maps,
 984                                                 const char **pgnames)
 985 {
&lt;snip&gt;
1053         (*map)-&gt;type = PIN_MAP_TYPE_MUX_GROUP;
1054         (*map)-&gt;data.mux.group = np-&gt;name;
1055         (*map)-&gt;data.mux.function = np-&gt;name;
1056
1057         if (PCS_HAS_PINCONF &amp;&amp; function) {
1058                 res = pcs_parse_pinconf(pcs, np, function, map);
1059                 if (res)
1060                         goto free_pingroups;
1061                 *num_maps = 2;
1062         } else {
1063                 *num_maps = 1;
1064         }

However, pcs_parse_pinconf() will also return 0 if !PCS_HAS_PINCONF or
!nconfs.  I believe these conditions should indicate that no map was
added by returning -ENOTSUPP. Otherwise pcs_parse_one_pinctrl_entry()
will set num_maps = 2 even though no maps were successfully added, as
it does not reach "m++" on line 940:

 895 static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
 896                              struct pcs_function *func,
 897                              struct pinctrl_map **map)
 898
 899 {
 900         struct pinctrl_map *m = *map;
&lt;snip&gt;
 917         /* If pinconf isn't supported, don't parse properties in below. */
 918         if (!PCS_HAS_PINCONF)
 919                 return 0;
 920
 921         /* cacluate how much properties are supported in current node */
 922         for (i = 0; i &lt; ARRAY_SIZE(prop2); i++) {
 923                 if (of_find_property(np, prop2[i].name, NULL))
 924                         nconfs++;
 925         }
 926         for (i = 0; i &lt; ARRAY_SIZE(prop4); i++) {
 927                 if (of_find_property(np, prop4[i].name, NULL))
 928                         nconfs++;
 929         }
 930         if (!nconfs)
 919                 return 0;
 932
 933         func-&gt;conf = devm_kcalloc(pcs-&gt;dev,
 934                                   nconfs, sizeof(struct pcs_conf_vals),
 935                                   GFP_KERNEL);
 936         if (!func-&gt;conf)
 937                 return -ENOMEM;
 938         func-&gt;nconfs = nconfs;
 939         conf = &amp;(func-&gt;conf[0]);
 940         m++;

This situtation will cause a boot failure [0] on the BeagleBone Black
(AM3358) when am33xx_pinmux node in arch/arm/boot/dts/am33xx-l4.dtsi
has compatible = "pinconf-single" instead of "pinctrl-single".

The patch fixes this issue by returning -ENOSUPP when !PCS_HAS_PINCONF
or !nconfs, so that pcs_parse_one_pinctrl_entry() will know that no
map was added.

Logic is also added to pcs_parse_one_pinctrl_entry() to distinguish
between -ENOSUPP and other errors.  In the case of -ENOSUPP, num_maps
is set to 1 as it is valid for pinconf to be enabled and a given pin
group to not any pinconf properties.

[0] https://lore.kernel.org/linux-omap/20200529175544.GA3766151@x1/

Fixes: 9dddb4df90d1 ("pinctrl: single: support generic pinconf")
Signed-off-by: Drew Fustini &lt;drew@beagleboard.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20200608125143.GA2789203@x1
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: single: Fix missing flush of posted write for a wakeirq</title>
<updated>2016-08-10T09:49:27Z</updated>
<author>
<name>Tony Lindgren</name>
</author>
<published>2016-05-31T21:17:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6701df3c0a3672faef3e2cfbc4747254e603324a'/>
<id>urn:sha1:6701df3c0a3672faef3e2cfbc4747254e603324a</id>
<content type='text'>
commit 0ac3c0a4025f41748a083bdd4970cb3ede802b15 upstream.

With many repeated suspend resume cycles, the pin specific wakeirq
may not always work on omaps. This is because the write to enable the
pin interrupt may not have reached the device over the interconnect
before suspend happens.

Let's fix the issue with a flush of posted write with a readback.

Reported-by: Nishanth Menon &lt;nm@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>pinctrl: single: Fix pcs_parse_bits_in_pinctrl_entry to use __ffs than ffs</title>
<updated>2016-05-04T21:48:45Z</updated>
<author>
<name>Keerthy</name>
</author>
<published>2016-04-14T04:59:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ee6a1e9eefed56308fcbd5619cb02b926b7ec630'/>
<id>urn:sha1:ee6a1e9eefed56308fcbd5619cb02b926b7ec630</id>
<content type='text'>
commit 56b367c0cd67d4c3006738e7dc9dda9273fd2bfe upstream.

pcs_parse_bits_in_pinctrl_entry uses ffs which gives bit indices
ranging from 1 to MAX. This leads to a corner case where we try to request
the pin number = MAX and fails.

bit_pos value is being calculted using ffs. pin_num_from_lsb uses
bit_pos value. pins array is populated with:

pin + pin_num_from_lsb.

The above is 1 more than usual bit indices as bit_pos uses ffs to compute
first set bit. Hence the last of the pins array is populated with the MAX
value and not MAX - 1 which causes error when we call pin_request.

mask_pos is rightly calculated as ((pcs-&gt;fmask) &lt;&lt; (bit_pos - 1))
Consequently val_pos and submask are correct.

Hence use __ffs which gives (ffs(x) - 1) as the first bit set.

fixes: 4e7e8017a8 ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
Signed-off-by: Keerthy &lt;j-keerthy@ti.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>genirq: Remove irq argument from irq flow handlers</title>
<updated>2015-09-16T13:47:51Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2015-09-14T08:42:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bd0b9ac405e1794d72533c3d487aa65b6b955a0c'/>
<id>urn:sha1:bd0b9ac405e1794d72533c3d487aa65b6b955a0c</id>
<content type='text'>
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;
Cc: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2015-09-04T17:22:09Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2015-09-04T17:22:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=88a99886c26fec8bf662e7b6bc080431a8660326'/>
<id>urn:sha1:88a99886c26fec8bf662e7b6bc080431a8660326</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.3 development
  cycle.

  Like with GPIO it's a lot of stuff.  If my subsystems are any sign of
  the overall tempo of the kernel v4.3 will be a gigantic diff.

[ It looks like 4.3 is calmer than 4.2 in most other subsystems, but
  we'll see - Linus ]

  Core changes:

   - It is possible configure groups in debugfs.

   - Consolidation of chained IRQ handler install/remove replacing all
     call sites where irq_set_handler_data() and
     irq_set_chained_handler() were done in succession with a combined
     call to irq_set_chained_handler_and_data().  This series was
     created by Thomas Gleixner after the problem was observed by
     Russell King.

   - Tglx also made another series of patches switching
     __irq_set_handler_locked() for irq_set_handler_locked() which is
     way cleaner.

   - Tglx also wrote a good bunch of patches to make use of
     irq_desc_get_xxx() accessors and avoid looking up irq_descs from
     IRQ numbers.  The goal is to get rid of the irq number from the
     handlers in the IRQ flow which is nice.

  Driver feature enhancements:

   - Power management support for the SiRF SoC Atlas 7.

   - Power down support for the Qualcomm driver.

   - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks
     in IRQ handlers to play nice with the realtime patch set.

   - Rework and new modes handling for Qualcomm SPMI-MPP.

   - Pinconf power source config for SH PFC.

  New drivers and subdrivers:

   - A new driver for Conexant Digicolor CX92755.

   - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5,
     ProXtream2 and PH1-LD6b SoC pin control support.

   - Reverse-egineered the S/PDIF settings for the Allwinner sun4i
     driver.

   - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs

   - A new Freescale i.mx6ul subdriver.

  Cleanup:

   - Remove platform data support in a number of SH PFC subdrivers"

* tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (95 commits)
  pinctrl: at91: fix null pointer dereference
  pinctrl: mediatek: Implement wake handler and suspend resume
  pinctrl: mediatek: Fix multiple registration issue.
  pinctrl: sh-pfc: r8a7794: add USB pin groups
  pinctrl: at91: Use generic irq_{request,release}_resources()
  pinctrl: cherryview: Use raw_spinlock for locking
  pinctrl: baytrail: Use raw_spinlock for locking
  pinctrl: imx6ul: Remove .owner field
  pinctrl: zynq: Fix typos in smc0_nand_grp and smc0_nor_grp
  pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching
  clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocks
  pinctrl: sun4i: add spdif to pin description.
  pinctrl: atlas7: clear ugly branch statements for pull and drivestrength
  pinctrl: baytrail: Serialize all register access
  pinctrl: baytrail: Drop FSF mailing address
  pinctrl: rockchip: only enable gpio clock when it setting
  pinctrl/mediatek: fix spelling mistake in dev_err error message
  pinctrl: cherryview: Serialize all register access
  pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting
  pinctrl: nomadik: reflect current input value
  ...
</content>
</entry>
<entry>
<title>pinctrl: kill off set_irq_flags usage</title>
<updated>2015-07-28T10:15:19Z</updated>
<author>
<name>Rob Herring</name>
</author>
<published>2015-07-27T20:55:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9458120ea112c06f56ea1b75a1511815d36aecc2'/>
<id>urn:sha1:9458120ea112c06f56ea1b75a1511815d36aecc2</id>
<content type='text'>
set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:

IRQF_VALID -&gt; !IRQ_NOREQUEST
IRQF_PROBE -&gt; !IRQ_NOPROBE
IRQF_NOAUTOEN -&gt; IRQ_NOAUTOEN

For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also modify IRQ_NOPROBE and this has been maintained although it
is not clear that is really needed. There appears to be a great deal of
blind copy and paste of this code.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Lee Jones &lt;lee@kernel.org&gt;
Cc: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Cc: Tomasz Figa &lt;tomasz.figa@gmail.com&gt;
Cc: Thomas Abraham &lt;thomas.abraham@linaro.org&gt;
Cc: Kukjin Kim &lt;kgene@kernel.org&gt;
Cc: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Cc: linux-gpio@vger.kernel.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: single: ensure pcs irq will not be forced threaded</title>
<updated>2015-07-20T09:01:52Z</updated>
<author>
<name>Grygorii Strashko</name>
</author>
<published>2015-07-06T15:13:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c10372e615b8f790d30cbfcf59e43908ca42bf1a'/>
<id>urn:sha1:c10372e615b8f790d30cbfcf59e43908ca42bf1a</id>
<content type='text'>
The PSC IRQ is requested using request_irq() API and as result it can
be forced to be threaded IRQ in RT-Kernel if PCS_QUIRK_HAS_SHARED_IRQ
is enabled for pinctrl domain.

As result, following 'possible irq lock inversion dependency' report
can be seen:
=========================================================
[ INFO: possible irq lock inversion dependency detected ]
3.14.43-rt42-00360-g96ff499-dirty #24 Not tainted
---------------------------------------------------------
irq/369-pinctrl/927 just changed the state of lock:
 (&amp;pcs-&gt;lock){+.....}, at: [&lt;c0375b54&gt;] pcs_irq_handle+0x48/0x9c
but this lock was taken by another, HARDIRQ-safe lock in the past:
 (&amp;irq_desc_lock_class){-.....}

and interrupts could create inverse lock ordering between them.

other info that might help us debug this:
 Possible interrupt unsafe locking scenario:

       CPU0                    CPU1
       ----                    ----
  lock(&amp;pcs-&gt;lock);
                               local_irq_disable();
                               lock(&amp;irq_desc_lock_class);
                               lock(&amp;pcs-&gt;lock);
  &lt;Interrupt&gt;
    lock(&amp;irq_desc_lock_class);

 *** DEADLOCK ***

no locks held by irq/369-pinctrl/927.

the shortest dependencies between 2nd lock and 1st lock:
  -&gt; (&amp;irq_desc_lock_class){-.....} ops: 58724 {
     IN-HARDIRQ-W at:
                       [&lt;c0090040&gt;] lock_acquire+0x9c/0x158
                       [&lt;c07065c8&gt;] _raw_spin_lock+0x48/0x58
                       [&lt;c009edac&gt;] handle_fasteoi_irq+0x24/0x15c
                       [&lt;c009abb0&gt;] generic_handle_irq+0x3c/0x4c
                       [&lt;c000f83c&gt;] handle_IRQ+0x50/0xa0
                       [&lt;c0008674&gt;] gic_handle_irq+0x3c/0x6c
                       [&lt;c0707a04&gt;] __irq_svc+0x44/0x8c
                       [&lt;c000fc44&gt;] arch_cpu_idle+0x40/0x4c
                       [&lt;c009aadc&gt;] cpu_startup_entry+0x270/0x2e0
                       [&lt;c06fcbf8&gt;] rest_init+0xd4/0xe4
                       [&lt;c0a44bfc&gt;] start_kernel+0x3d0/0x3dc
                       [&lt;80008084&gt;] 0x80008084
     INITIAL USE at:
                      [&lt;c0090040&gt;] lock_acquire+0x9c/0x158
                      [&lt;c070674c&gt;] _raw_spin_lock_irqsave+0x54/0x68
                      [&lt;c009aff8&gt;] __irq_get_desc_lock+0x64/0xa4
                      [&lt;c009e38c&gt;] irq_set_chip+0x30/0x78
                      [&lt;c009ec30&gt;] irq_set_chip_and_handler_name+0x24/0x3c
                      [&lt;c036ca10&gt;] gic_irq_domain_map+0x48/0xb4
                      [&lt;c00a0a80&gt;] irq_domain_associate+0x84/0x1d4
                      [&lt;c00a1154&gt;] irq_create_mapping+0x80/0x11c
                      [&lt;c00a1270&gt;] irq_create_of_mapping+0x80/0x120
                      [&lt;c05cdaa8&gt;] irq_of_parse_and_map+0x34/0x3c
                      [&lt;c0a4ea24&gt;] omap_dm_timer_init_one+0x90/0x30c
                      [&lt;c0a4eef0&gt;] omap5_realtime_timer_init+0x8c/0x48c
                      [&lt;c0a486b0&gt;] time_init+0x28/0x38
                      [&lt;c0a44a6c&gt;] start_kernel+0x240/0x3dc
                      [&lt;80008084&gt;] 0x80008084
   }
   ... key      at: [&lt;c1049ce0&gt;] irq_desc_lock_class+0x0/0x8
   ... acquired at:
   [&lt;c07065c8&gt;] _raw_spin_lock+0x48/0x58
   [&lt;c0375a90&gt;] pcs_irq_unmask+0x58/0xa0
   [&lt;c009ea48&gt;] irq_enable+0x38/0x48
   [&lt;c009ead0&gt;] irq_startup+0x78/0x7c
   [&lt;c009d440&gt;] __setup_irq+0x4a8/0x4f4
   [&lt;c009d5dc&gt;] request_threaded_irq+0xb8/0x138
   [&lt;c0415a5c&gt;] omap_8250_startup+0x4c/0x148
   [&lt;c041276c&gt;] serial8250_startup+0x24/0x30
   [&lt;c040d0ec&gt;] uart_startup.part.9+0x5c/0x1b4
   [&lt;c040dbcc&gt;] uart_open+0xf4/0x16c
   [&lt;c03f0540&gt;] tty_open+0x170/0x61c
   [&lt;c0157028&gt;] chrdev_open+0xbc/0x1b4
   [&lt;c0150494&gt;] do_dentry_open+0x1e8/0x2bc
   [&lt;c0150a84&gt;] finish_open+0x44/0x5c
   [&lt;c0160d50&gt;] do_last.isra.47+0x710/0xca0
   [&lt;c01613a4&gt;] path_openat+0xc4/0x640
   [&lt;c0162904&gt;] do_filp_open+0x3c/0x98
   [&lt;c0151bdc&gt;] do_sys_open+0x114/0x1d8
   [&lt;c0151cc8&gt;] SyS_open+0x28/0x2c
   [&lt;c0a44d70&gt;] kernel_init_freeable+0x168/0x1e4
   [&lt;c06fcc24&gt;] kernel_init+0x1c/0xf8
   [&lt;c000eee8&gt;] ret_from_fork+0x14/0x20

-&gt; (&amp;pcs-&gt;lock){+.....} ops: 65 {
   HARDIRQ-ON-W at:
                    [&lt;c0090040&gt;] lock_acquire+0x9c/0x158
                    [&lt;c07065c8&gt;] _raw_spin_lock+0x48/0x58
                    [&lt;c0375b54&gt;] pcs_irq_handle+0x48/0x9c
                    [&lt;c0375c5c&gt;] pcs_irq_handler+0x1c/0x28
                    [&lt;c009c458&gt;] irq_forced_thread_fn+0x30/0x74
                    [&lt;c009c784&gt;] irq_thread+0x158/0x1c4
                    [&lt;c0063fc4&gt;] kthread+0xd4/0xe8
                    [&lt;c000eee8&gt;] ret_from_fork+0x14/0x20
   INITIAL USE at:
                   [&lt;c0090040&gt;] lock_acquire+0x9c/0x158
                   [&lt;c070674c&gt;] _raw_spin_lock_irqsave+0x54/0x68
                   [&lt;c0375344&gt;] pcs_enable+0x7c/0xe8
                   [&lt;c0372a44&gt;] pinmux_enable_setting+0x178/0x220
                   [&lt;c036fecc&gt;] pinctrl_select_state+0x110/0x194
                   [&lt;c04732dc&gt;] pinctrl_bind_pins+0x7c/0x108
                   [&lt;c045853c&gt;] driver_probe_device+0x70/0x254
                   [&lt;c0458810&gt;] __driver_attach+0x9c/0xa0
                   [&lt;c045674c&gt;] bus_for_each_dev+0x78/0xac
                   [&lt;c0458030&gt;] driver_attach+0x2c/0x30
                   [&lt;c0457c78&gt;] bus_add_driver+0x15c/0x204
                   [&lt;c0458ee0&gt;] driver_register+0x88/0x108
                   [&lt;c045a168&gt;] __platform_driver_register+0x64/0x6c
                   [&lt;c0a8170c&gt;] omap_hsmmc_driver_init+0x1c/0x20
                   [&lt;c0008a94&gt;] do_one_initcall+0x110/0x170
                   [&lt;c0a44d48&gt;] kernel_init_freeable+0x140/0x1e4
                   [&lt;c06fcc24&gt;] kernel_init+0x1c/0xf8
                   [&lt;c000eee8&gt;] ret_from_fork+0x14/0x20
 }
 ... key      at: [&lt;c1088a8c&gt;] __key.18572+0x0/0x8
 ... acquired at:
   [&lt;c008cdd4&gt;] mark_lock+0x388/0x76c
   [&lt;c008df40&gt;] __lock_acquire+0x6d0/0x1f98
   [&lt;c0090040&gt;] lock_acquire+0x9c/0x158
   [&lt;c07065c8&gt;] _raw_spin_lock+0x48/0x58
   [&lt;c0375b54&gt;] pcs_irq_handle+0x48/0x9c
   [&lt;c0375c5c&gt;] pcs_irq_handler+0x1c/0x28
   [&lt;c009c458&gt;] irq_forced_thread_fn+0x30/0x74
   [&lt;c009c784&gt;] irq_thread+0x158/0x1c4
   [&lt;c0063fc4&gt;] kthread+0xd4/0xe8
   [&lt;c000eee8&gt;] ret_from_fork+0x14/0x20

stack backtrace:
CPU: 1 PID: 927 Comm: irq/369-pinctrl Not tainted 3.14.43-rt42-00360-g96ff499-dirty #24
[&lt;c00177e0&gt;] (unwind_backtrace) from [&lt;c00130b0&gt;] (show_stack+0x20/0x24)
[&lt;c00130b0&gt;] (show_stack) from [&lt;c0702958&gt;] (dump_stack+0x84/0xd0)
[&lt;c0702958&gt;] (dump_stack) from [&lt;c008bcfc&gt;] (print_irq_inversion_bug+0x1d0/0x21c)
[&lt;c008bcfc&gt;] (print_irq_inversion_bug) from [&lt;c008bf18&gt;] (check_usage_backwards+0xb4/0x11c)
[&lt;c008bf18&gt;] (check_usage_backwards) from [&lt;c008cdd4&gt;] (mark_lock+0x388/0x76c)
[&lt;c008cdd4&gt;] (mark_lock) from [&lt;c008df40&gt;] (__lock_acquire+0x6d0/0x1f98)
[&lt;c008df40&gt;] (__lock_acquire) from [&lt;c0090040&gt;] (lock_acquire+0x9c/0x158)
[&lt;c0090040&gt;] (lock_acquire) from [&lt;c07065c8&gt;] (_raw_spin_lock+0x48/0x58)
[&lt;c07065c8&gt;] (_raw_spin_lock) from [&lt;c0375b54&gt;] (pcs_irq_handle+0x48/0x9c)
[&lt;c0375b54&gt;] (pcs_irq_handle) from [&lt;c0375c5c&gt;] (pcs_irq_handler+0x1c/0x28)
[&lt;c0375c5c&gt;] (pcs_irq_handler) from [&lt;c009c458&gt;] (irq_forced_thread_fn+0x30/0x74)
[&lt;c009c458&gt;] (irq_forced_thread_fn) from [&lt;c009c784&gt;] (irq_thread+0x158/0x1c4)
[&lt;c009c784&gt;] (irq_thread) from [&lt;c0063fc4&gt;] (kthread+0xd4/0xe8)
[&lt;c0063fc4&gt;] (kthread) from [&lt;c000eee8&gt;] (ret_from_fork+0x14/0x20)

To fix it use IRQF_NO_THREAD to ensure that pcs irq will not be forced threaded.

Cc: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;
Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc</title>
<updated>2015-07-17T19:56:20Z</updated>
<author>
<name>Jiang Liu</name>
</author>
<published>2015-06-04T04:13:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5663bb27dec1a2bfaf9d92e3685834b91a36a5a3'/>
<id>urn:sha1:5663bb27dec1a2bfaf9d92e3685834b91a36a5a3</id>
<content type='text'>
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.

Signed-off-by: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>pinctrl: Consolidate chained IRQ handler install/remove</title>
<updated>2015-07-17T19:56:15Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2015-06-21T19:11:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=20d5d142a645600f28cf42b8e3336f7309897b1e'/>
<id>urn:sha1:20d5d142a645600f28cf42b8e3336f7309897b1e</id>
<content type='text'>
Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc-&gt;lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-gpio@vger.kernel.org
</content>
</entry>
</feed>
