kernel.git/drivers/pinctrl/freescale, branch linux-4.9.y

pinctrl: imxl: Fix an error handling path in 'imx1_pinctrl_core_probe()'

2020-06-30T19:38:28Z

[ Upstream commit 9eb728321286c4b31e964d2377fca2368526d408 ] When 'pinctrl_register()' has been turned into 'devm_pinctrl_register()', an error handling path has not been updated. Axe a now unneeded 'pinctrl_unregister()'. Fixes: e55e025d1687 ("pinctrl: imxl: Use devm_pinctrl_register() for pinctrl registration") Signed-off-by: Christophe JAILLET Link: https://lore.kernel.org/r/20200530201952.585798-1-christophe.jaillet@wanadoo.fr Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: freescale: off by one in imx1_pinconf_group_dbg_show()

2018-09-05T07:20:09Z

commit 19da44cd33a3a6ff7c97fff0189999ff15b241e4 upstream. The info->groups[] array is allocated in imx1_pinctrl_parse_dt(). It has info->ngroups elements. Thus the > here should be >= to prevent reading one element beyond the end of the array. Cc: stable@vger.kernel.org Fixes: 30612cd90005 ("pinctrl: imx1 core driver") Signed-off-by: Dan Carpenter Reviewed-by: Uwe Kleine-König Acked-by: Dong Aisheng Signed-off-by: Linus Walleij Signed-off-by: Greg Kroah-Hartman

pinctrl: mxs: atomically switch mux and drive strength config

2017-07-12T13:01:05Z

commit da6c2addf66d7ff7d0b090d6267d4292f951e4e6 upstream. To set the mux mode of a pin two bits must be set. Up to now this is implemented using the following idiom: writel(mask, reg + CLR); writel(value, reg + SET); . This however results in the mux mode being 0 between the two writes. On my machine there is an IC's reset pin connected to LCD_D20. The bootloader configures this pin as GPIO output-high (i.e. not holding the IC in reset). When Linux reconfigures the pin to GPIO the short time LCD_D20 is muxed as LCD_D20 instead of GPIO_1_20 is enough to confuse the connected IC. The same problem is present for the pin's drive strength setting which is reset to low drive strength before using the right value. So instead of relying on the hardware to modify the register setting using two writes implement the bit toggling using read-modify-write. Fixes: 17723111e64f ("pinctrl: add pinctrl-mxs support") Signed-off-by: Uwe Kleine-König Acked-by: Shawn Guo Signed-off-by: Linus Walleij Signed-off-by: Greg Kroah-Hartman

pinctrl: imx: fix imx_pinctrl_desc initialization

2017-01-19T19:17:57Z

commit 8f5983ad6b81070376db9487ce81000c85a16027 upstream. Fixes: 6e408ed8be0e ("pinctrl: imx: fix initialization of imx_pinctrl_desc") Reviewed-by: Vladimir Zapolskiy Reviewed-by: Peng Fan Signed-off-by: Gary Bisson Signed-off-by: Greg Kroah-Hartman Signed-off-by: Linus Walleij

pinctrl: imx: reset group index on probe

2016-10-31T20:25:15Z

Group index is incremented on every new group parsed. Since the field is part of struct imx_pinctrl_soc_info, which is typically a global variable passed by the individual pinctrl-imx.c based driver, it does not get cleared automatically when re-probing the driver. This lead imx_pinctrl_parse_functions passing a group pointer which is outside of the allocated group space on second probe and onwards. Typically this ended up in a NULL pointer dereference when accessing the name field like this: Unable to handle kernel NULL pointer dereference at virtual address 00000000 ... PC is at strcmp+0x18/0x44 LR is at imx_dt_node_to_map+0xc4/0x290 Avoid this by setting group_index to 0 on probe. This has been observed when using DEBUG_TEST_DRIVER_REMOVE. Signed-off-by: Stefan Agner Signed-off-by: Linus Walleij

pinctrl: imx: accept gpio request/free from pinctrl

2016-09-12T12:25:52Z

While only Freescale Vybrid SoC has settings of GPIO capabilities done by iomux controller, it is only a matter of GPIO controller driver implementation for the rest of Freescale/NXP SoCs from iMX series. As a practical example on GPIO request a pad function should be switched to GPIO, but because this requires updates to all particular iMX pinctrl drivers, for simplicity at the moment add only a proper connection between shared pinctrl-imx and pinctrl/pinmux core, namely .gpio_request_enable/.gpio_disable_free/.gpio_set_direction callbacks should return success to a caller. This change allows to progress by adding request/free callbacks into gpio-mxc.c driver. Signed-off-by: Vladimir Zapolskiy Acked-by: Shawn Guo Signed-off-by: Linus Walleij

pinctrl: imx: output one pin/config pair per line in pinconf-groups

2016-09-05T22:18:10Z

cat /sys/kernel/debug/pinctrl/${pinctrl}/pinconf-groups output is hardly readable, if a pin group contains more than one pin the output is glued and looks like this: MX6Q_PAD_SD1_DAT0: 0x17071MX6Q_PAD_SD1_CMD: 0x17071MX6Q_PAD_SD1_CLK: 0x17071 Add two space indentation and a new line separator to improve readability of the output. Signed-off-by: Vladimir Zapolskiy Acked-by: Shawn Guo Signed-off-by: Linus Walleij

Merge tag 'pinctrl-v4.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2016-07-29T00:06:51Z

Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.8 kernel cycle. Nothing stands out as especially exiting: new drivers, new subdrivers, lots of cleanups and incremental features. Business as usual. New drivers: - New driver for Oxnas pin control and GPIO. This ARM-based chipset is used in a few storage (NAS) type devices. - New driver for the MAX77620/MAX20024 pin controller portions. - New driver for the Intel Merrifield pin controller. New subdrivers: - New subdriver for the Qualcomm MDM9615 - New subdriver for the STM32F746 MCU - New subdriver for the Broadcom NSP SoC. Cleanups: - Demodularization of bool compiled-in drivers. Apart from this there is just regular incremental improvements to a lot of drivers, especially Uniphier and PFC" * tag 'pinctrl-v4.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (131 commits) pinctrl: fix pincontrol definition for marvell pinctrl: xway: fix typo Revert "pinctrl: amd: make it explicitly non-modular" pinctrl: iproc: Add NSP and Stingray GPIO support pinctrl: Update iProc GPIO DT bindings pinctrl: bcm: add OF dependencies pinctrl: ns2: remove redundant dev_err call in ns2_pinmux_probe() pinctrl: Add STM32F746 MCU support pinctrl: intel: Protect set wake flow by spin lock pinctrl: nsp: remove redundant dev_err call in nsp_pinmux_probe() pinctrl: uniphier: add Ethernet pin-mux settings sh-pfc: Use PTR_ERR_OR_ZERO() to simplify the code pinctrl: ns2: fix return value check in ns2_pinmux_probe() pinctrl: qcom: update DT bindings with ebi2 groups pinctrl: qcom: establish proper EBI2 pin groups pinctrl: imx21: Remove the MODULE_DEVICE_TABLE() macro Documentation: dt: Add new compatible to STM32 pinctrl driver bindings includes: dt-bindings: Add STM32F746 pinctrl DT bindings pinctrl: sunxi: fix nand0 function name for sun8i pinctrl: uniphier: remove pointless pin-mux settings for PH1-LD11 ...

pinctrl: imx21: Remove the MODULE_DEVICE_TABLE() macro

2016-07-06T13:41:31Z

Commit e2756baa4217 ("pinctrl: imx21: make it explicitly non-modular") missed the removal of the MODULE_DEVICE_TABLE() macro causing the following build error: drivers/pinctrl/freescale/pinctrl-imx21.c:328:1: error: data definition has no type or storage class [-Werror] MODULE_DEVICE_TABLE(of, imx21_pinctrl_of_match); ,so remove the macro to fix this problem. Reported-by: Arnd Bergmann Signed-off-by: Fabio Estevam Acked-by: Arnd Bergmann Signed-off-by: Linus Walleij

pinctrl: remove orphaned exported ".remove" function

2016-06-29T07:56:28Z

The Kconfig currently controlling compilation of this code is: drivers/pinctrl/freescale/Kconfig:config PINCTRL_MXS drivers/pinctrl/freescale/Kconfig: bool ...meaning that it currently is not being built as a module by anyone. It also doesn't have any modular functionality, so it doesn't need module.h included at all. What it does have is an exported function that was used as a shared ".remove" by other drivers, but those use cases (imx23 and imx28) are now gone, and hence this can disappear as well. Cc: Linus Walleij Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker Signed-off-by: Linus Walleij