<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/pci/pcie, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.9.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2024-06-12T09:39:18Z</updated>
<entry>
<title>PCI/EDR: Align EDR_PORT_LOCATE_DSM with PCI Firmware r3.3</title>
<updated>2024-06-12T09:39:18Z</updated>
<author>
<name>Kuppuswamy Sathyanarayanan</name>
</author>
<published>2024-05-08T19:31:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5db8860bb2deb26f114cc6739d5bbe9d666a3b58'/>
<id>urn:sha1:5db8860bb2deb26f114cc6739d5bbe9d666a3b58</id>
<content type='text'>
[ Upstream commit e2e78a294a8a863898b781dbcf90e087eda3155d ]

The "Downstream Port Containment related Enhancements" ECN of Jan 28, 2019
(document 12888 below), defined the EDR_PORT_LOCATE_DSM function with
Revision ID 5 with a return value encoding (Bits 2:0 = Function, Bits 7:3 =
Device, Bits 15:8 = Bus).  When the ECN was integrated into PCI Firmware
r3.3, sec 4.6.13, Bit 31 was added to indicate success or failure.

Check Bit 31 for failure in acpi_dpc_port_get().

Link: https://lore.kernel.org/r/20240501022543.1626025-1-sathyanarayanan.kuppuswamy@linux.intel.com
Link: https://members.pcisig.com/wg/PCI-SIG/document/12888
Fixes: ac1c8e35a326 ("PCI/DPC: Add Error Disconnect Recover (EDR) support")
Signed-off-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
[bhelgaas: split into two patches, update commit log]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Tested-by: Satish Thatchanamurthy &lt;Satish.Thatchanamurt@Dell.com&gt; # one platform
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI/EDR: Align EDR_PORT_DPC_ENABLE_DSM with PCI Firmware r3.3</title>
<updated>2024-06-12T09:39:18Z</updated>
<author>
<name>Kuppuswamy Sathyanarayanan</name>
</author>
<published>2024-05-01T02:25:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2fd6dc7a371191b9aea729d9b04fb0e5c9d0326d'/>
<id>urn:sha1:2fd6dc7a371191b9aea729d9b04fb0e5c9d0326d</id>
<content type='text'>
[ Upstream commit f24ba846133d0edec785ac6430d4daf6e9c93a09 ]

The "Downstream Port Containment related Enhancements" ECN of Jan 28, 2019
(document 12888 below), defined the EDR_PORT_DPC_ENABLE_DSM function with
Revision ID 5 with Arg3 being an integer.  But when the ECN was integrated
into PCI Firmware r3.3, sec 4.6.12, it was defined as Revision ID 6 with
Arg3 being a package containing an integer.

The implementation in acpi_enable_dpc() supplies a package as Arg3 (arg4 in
the code), but it previously specified Revision ID 5.  Align this with PCI
Firmware r3.3 by using Revision ID 6.

If firmware implemented per the ECN, its Revision 5 function would receive
a package as Arg3 when it expects an integer, so acpi_enable_dpc() would
likely fail.  If such firmware exists and lacks a Revision 6 function that
expects a package, we may have to add support for Revision 5.

Link: https://lore.kernel.org/r/20240501022543.1626025-1-sathyanarayanan.kuppuswamy@linux.intel.com
Link: https://members.pcisig.com/wg/PCI-SIG/document/12888
Fixes: ac1c8e35a326 ("PCI/DPC: Add Error Disconnect Recover (EDR) support")
Signed-off-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
[bhelgaas: split into two patches, update commit log]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Tested-by: Satish Thatchanamurthy &lt;Satish.Thatchanamurt@Dell.com&gt; # one platform
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI/ASPM: Restore parent state to parent, child state to child</title>
<updated>2024-05-06T19:12:40Z</updated>
<author>
<name>Kai-Heng Feng</name>
</author>
<published>2024-05-06T05:16:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f3d049b35b01fff656d720606fcbab0b819f26d1'/>
<id>urn:sha1:f3d049b35b01fff656d720606fcbab0b819f26d1</id>
<content type='text'>
There's a typo that makes parent device uses child LNKCTL value and vice
versa. This causes Micron NVMe to trigger a reboot upon system resume.

Correct the typo to fix the issue.

Fixes: 64dbb2d70744 ("PCI/ASPM: Disable L1 before configuring L1 Substates")
Link: https://lore.kernel.org/r/20240506051602.1990743-1-kai.heng.feng@canonical.com
Signed-off-by: Kai-Heng Feng &lt;kai.heng.feng@canonical.com&gt;
[bhelgaas: update subject]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pci-v6.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci</title>
<updated>2024-03-14T17:58:27Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2024-03-14T17:58:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=705c1da8fa4816fb0159b5602fef1df5946a3ee2'/>
<id>urn:sha1:705c1da8fa4816fb0159b5602fef1df5946a3ee2</id>
<content type='text'>
Pull PCI updates from Bjorn Helgaas:
 "Enumeration:

   - Consolidate interrupt related code in irq.c (Ilpo Järvinen)

   - Reduce kernel size by replacing sysfs resource macros with
     functions (Ilpo Järvinen)

   - Reduce kernel size by compiling sysfs support only when
     CONFIG_SYSFS=y (Lukas Wunner)

   - Avoid using Extended Tags on 3ware-9650SE Root Port to work around
     an apparent hardware defect (Jörg Wedekind)

  Resource management:

   - Fix an MMIO mapping leak in pci_iounmap() (Philipp Stanner)

   - Move pci_iomap.c and other PCI-specific devres code to drivers/pci
     (Philipp Stanner)

   - Consolidate PCI devres code in devres.c (Philipp Stanner)

  Power management:

   - Avoid D3cold on Asus B1400 PCI-NVMe bridge, where firmware doesn't
     know how to return correctly to D0, and remove previous quirk that
     wasn't as specific (Daniel Drake)

   - Allow runtime PM when the driver enables it but doesn't need any
     runtime PM callbacks (Raag Jadav)

   - Drain runtime-idle callbacks before driver removal to avoid races
     between .remove() and .runtime_idle(), which caused intermittent
     page faults when the rtsx .runtime_idle() accessed registers that
     its .remove() had already unmapped (Rafael J. Wysocki)

  Virtualization:

   - Avoid Secondary Bus Reset on LSI FW643 so it can be assigned to VMs
     with VFIO, e.g., for professional audio software on many Apple
     machines, at the cost of leaking state between VMs (Edmund Raile)

  Error handling:

   - Print all logged TLP Prefixes, not just the first, after AER or DPC
     errors (Ilpo Järvinen)

   - Quirk the DPC PIO log size for Intel Raptor Lake Root Ports, which
     still don't advertise a legal size (Paul Menzel)

   - Ignore expected DPC Surprise Down errors on hot removal (Smita
     Koralahalli)

   - Block runtime suspend while handling AER errors to avoid races that
     prevent the device form being resumed from D3hot (Stanislaw
     Gruszka)

  Peer-to-peer DMA:

   - Use atomic XA allocation in RCU read section (Christophe JAILLET)

  ASPM:

   - Collect bits of ASPM-related code that we need even without
     CONFIG_PCIEASPM into aspm.c (David E. Box)

   - Save/restore L1 PM Substates config for suspend/resume (David E.
     Box)

   - Update save_save when ASPM config is changed, so a .slot_reset()
     during error recovery restores the changed config, not the
     .probe()-time config (Vidya Sagar)

  Endpoint framework:

   - Refactor and improve pci_epf_alloc_space() API (Niklas Cassel)

   - Clean up endpoint BAR descriptions (Niklas Cassel)

   - Fix ntb_register_device() name leak in error path (Yang Yingliang)

   - Return actual error code for pci_vntb_probe() failure (Yang
     Yingliang)

  Broadcom STB PCIe controller driver:

   - Fix MDIO write polling, which previously never waited for
     completion (Jonathan Bell)

  Cadence PCIe endpoint driver:

   - Clear the ARI "Next Function Number" of last function (Jasko-EXT
     Wojciech)

  Freescale i.MX6 PCIe controller driver:

   - Simplify by replacing switch statements with function pointers for
     different hardware variants (Frank Li)

   - Simplify by using clk_bulk*() API (Frank Li)

   - Remove redundant DT clock and reg/reg-name details (Frank Li)

   - Add i.MX95 DT and driver support for both Root Complex and Endpoint
     mode (Frank Li)

  Microsoft Hyper-V host bridge driver:

   - Reduce memory usage by limiting ring buffer size to 16KB instead of
     4 pages (Michael Kelley)

  Qualcomm PCIe controller driver:

   - Add X1E80100 DT and driver support (Abel Vesa)

   - Add DT 'required-opps' for SoCs that require a minimum performance
     level (Johan Hovold)

   - Make DT 'msi-map-mask' optional, depending on how MSI interrupts
     are mapped (Johan Hovold)

   - Disable ASPM L0s for sc8280xp, sa8540p and sa8295p because the PHY
     configuration isn't tuned correctly for L0s (Johan Hovold)

   - Split dt-binding qcom,pcie.yaml into qcom,pcie-common.yaml and
     separate files for SA8775p, SC7280, SC8180X, SC8280XP, SM8150,
     SM8250, SM8350, SM8450, SM8550 for easier reviewing (Krzysztof
     Kozlowski)

   - Enable BDF to SID translation by disabling bypass mode (Manivannan
     Sadhasivam)

   - Add endpoint MHI support for Snapdragon SA8775P SoC (Mrinmay
     Sarkar)

  Synopsys DesignWare PCIe controller driver:

   - Allocate 64-bit MSI address if no 32-bit address is available (Ajay
     Agarwal)

   - Fix endpoint Resizable BAR to actually advertise the required 1MB
     size (Niklas Cassel)

  MicroSemi Switchtec management driver:

   - Release resources if the .probe() fails (Christophe JAILLET)

  Miscellaneous:

   - Make pcie_port_bus_type const (Ricardo B. Marliere)"

* tag 'pci-v6.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (77 commits)
  PCI/ASPM: Update save_state when configuration changes
  PCI/ASPM: Disable L1 before configuring L1 Substates
  PCI/ASPM: Call pci_save_ltr_state() from pci_save_pcie_state()
  PCI/ASPM: Save L1 PM Substates Capability for suspend/resume
  PCI: hv: Fix ring buffer size calculation
  PCI: dwc: endpoint: Fix advertised resizable BAR size
  PCI: cadence: Clear the ARI Capability Next Function Number of the last function
  PCI: dwc: Strengthen the MSI address allocation logic
  PCI: brcmstb: Fix broken brcm_pcie_mdio_write() polling
  PCI: qcom: Add X1E80100 PCIe support
  dt-bindings: PCI: qcom: Document the X1E80100 PCIe Controller
  PCI: qcom: Enable BDF to SID translation properly
  PCI/AER: Generalize TLP Header Log reading
  PCI/AER: Use explicit register size for PCI_ERR_CAP
  PCI: qcom: Disable ASPM L0s for sc8280xp, sa8540p and sa8295p
  dt-bindings: PCI: qcom: Do not require 'msi-map-mask'
  dt-bindings: PCI: qcom: Allow 'required-opps'
  PCI/AER: Block runtime suspend when handling errors
  PCI/ASPM: Move pci_save_ltr_state() to aspm.c
  PCI/ASPM: Always build aspm.c
  ...
</content>
</entry>
<entry>
<title>Merge branch 'pci/misc'</title>
<updated>2024-03-12T17:14:24Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2024-03-12T17:14:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=45a516f616cae50eabd81c1aa6b1bacbdf2f8c65'/>
<id>urn:sha1:45a516f616cae50eabd81c1aa6b1bacbdf2f8c65</id>
<content type='text'>
- Make pcie_port_bus_type const (Ricardo B. Marliere)

* pci/misc:
  PCI: Make pcie_port_bus_type const
</content>
</entry>
<entry>
<title>Merge branch 'pci/dpc'</title>
<updated>2024-03-12T17:14:20Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2024-03-12T17:14:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c6c411a9489bd16c13e326fb503b46e5322d6eae'/>
<id>urn:sha1:c6c411a9489bd16c13e326fb503b46e5322d6eae</id>
<content type='text'>
- After a DPC event, print all logged TLP Prefixes instead of printing the
  first prefix several times (Ilpo Järvinen)

- Ignore the expected Surprise Down error that may cause a DPC event when
  hot-removing a device (Smita Koralahalli)

- Add an RP PIO log size quirk for Intel Raptor Lake Root Ports, which
  still don't advertise the correct log size, which prevented logging of RP
  PIO Log registers when DPC is triggered (Paul Menzel)

* pci/dpc:
  PCI/DPC: Quirk PIO log size for Intel Raptor Lake Root Ports
  PCI/DPC: Ignore Surprise Down error on hot removal
  PCI/DPC: Print all TLP Prefixes, not just the first
</content>
</entry>
<entry>
<title>Merge branch 'pci/aspm'</title>
<updated>2024-03-12T17:14:19Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2024-03-12T17:14:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=239981b66966e8f9c1c2eb020aaff61c82f56ae6'/>
<id>urn:sha1:239981b66966e8f9c1c2eb020aaff61c82f56ae6</id>
<content type='text'>
- Collect ASPM-related code into aspm.c (David E. Box)

- Save and restore ASPM L1 PM Substates configuration so these states
  continue working after suspend/resume (David E. Box)

- Move the ASPM L1.2-related LTR save/restore next to the ASPM save/restore
  (David E. Box)

- Move the required L1 disable before L1 Substate configuration into
  pci_restore_aspm_l1ss_state() (Bjorn Helgaas)

- Update save_save when ASPM config is changed, so a .slot_reset() during
  error recovery restores the changed config, not the .probe()-time config
  (Vidya Sagar)

* pci/aspm:
  PCI/ASPM: Update save_state when configuration changes
  PCI/ASPM: Disable L1 before configuring L1 Substates
  PCI/ASPM: Call pci_save_ltr_state() from pci_save_pcie_state()
  PCI/ASPM: Save L1 PM Substates Capability for suspend/resume
  PCI/ASPM: Move pci_save_ltr_state() to aspm.c
  PCI/ASPM: Always build aspm.c
  PCI/ASPM: Move pci_configure_ltr() to aspm.c
</content>
</entry>
<entry>
<title>PCI/ASPM: Update save_state when configuration changes</title>
<updated>2024-03-12T17:09:12Z</updated>
<author>
<name>Vidya Sagar</name>
</author>
<published>2024-02-23T19:36:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6d4266675279b38c301243f3a4fac4a511b03246'/>
<id>urn:sha1:6d4266675279b38c301243f3a4fac4a511b03246</id>
<content type='text'>
Many PCIe device drivers save the configuration state of their device
during probe and restore it when their .slot_reset() hook is called during
PCIe error recovery.

If the ASPM configuration is changed after the driver's probe is called and
before an error event occurs, .slot_reset() restores the ASPM configuration
to what it was at the time of probe, not to what it was just before the
occurrence of the error event.  This leads to a mismatch in ASPM
configuration between the device and its upstream device.

Update the saved configuration of the device when the ASPM configuration
changes.

Link: https://lore.kernel.org/r/20240222174436.3565146-1-vidyas@nvidia.com
Signed-off-by: Vidya Sagar &lt;vidyas@nvidia.com&gt;
[bhelgaas: commit log, rebase to pci/aspm, rename to
pci_update_aspm_saved_state() since it updates only LNKCTL, update only
ASPMC and CLKREQ_EN in LNKCTL]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Reviewed-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>PCI/ASPM: Disable L1 before configuring L1 Substates</title>
<updated>2024-03-12T17:09:11Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2024-03-05T21:15:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=64dbb2d707444f691539fb12aacf81797786c10b'/>
<id>urn:sha1:64dbb2d707444f691539fb12aacf81797786c10b</id>
<content type='text'>
Per PCIe r6.1, sec 5.5.4, L1 must be disabled while setting ASPM L1 PM
Substates enable bits.  Previously this was enforced by clearing
PCI_EXP_LNKCTL_ASPMC before calling pci_restore_aspm_l1ss_state().

Move the L1 (and L0s, although that doesn't seem required) disable into
pci_restore_aspm_l1ss_state() itself so it's closer to the code that
depends on it.

Link: https://lore.kernel.org/r/20240223213733.GA115410@bhelgaas
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/ASPM: Save L1 PM Substates Capability for suspend/resume</title>
<updated>2024-03-12T16:53:45Z</updated>
<author>
<name>David E. Box</name>
</author>
<published>2024-02-23T20:58:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=17423360a27ae58c1850f588bdd8013bbfcd250b'/>
<id>urn:sha1:17423360a27ae58c1850f588bdd8013bbfcd250b</id>
<content type='text'>
4ff116d0d5fd ("PCI/ASPM: Save L1 PM Substates Capability for
suspend/resume") restored the L1 PM Substates Capability after resume,
which reduced power consumption by making the ASPM L1.x states work after
resume.

a7152be79b62 ("Revert "PCI/ASPM: Save L1 PM Substates Capability for
suspend/resume"") reverted 4ff116d0d5fd because resume failed on some
systems, so power consumption after resume increased again.

a7152be79b62 mentioned that we restore L1 PM substate configuration even
though ASPM L1 may already be enabled. This is due the fact that the
pci_restore_aspm_l1ss_state() was called before pci_restore_pcie_state().

Save and restore the L1 PM Substates Capability, following PCIe r6.1, sec
5.5.4 more closely by:

  1) Do not restore ASPM configuration in pci_restore_pcie_state() but
     do that after PCIe capability is restored in pci_restore_aspm_state()
     following PCIe r6.1, sec 5.5.4.

  2) If BIOS reenables L1SS, particularly L1.2, we need to clear the
     enables in the right order, downstream before upstream. Defer
     restoring the L1SS config until we are at the downstream component.
     Then update the config for both ends of the link in the prescribed
     order.

  3) Program ASPM L1 PM substate configuration before L1 enables.

  4) Program ASPM L1 PM substate enables last, after rest of the fields
     in the capability are programmed.

[bhelgaas: commit log, squash L1SS-related patches, do both LNKCTL restores
in pci_restore_pcie_state()]

Link: https://lore.kernel.org/r/20240128233212.1139663-3-david.e.box@linux.intel.com
Link: https://lore.kernel.org/r/20240128233212.1139663-4-david.e.box@linux.intel.com
Link: https://lore.kernel.org/r/20240223205851.114931-5-helgaas@kernel.org
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217321
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216782
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216877
Co-developed-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Co-developed-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Reported-by: Koba Ko &lt;koba.ko@canonical.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Tested-by: Tasev Nikola &lt;tasev.stefanoska@skynet.be&gt; # Asus UX305FA
Cc: Mark Enriquez &lt;enriquezmark36@gmail.com&gt;
Cc: Thomas Witt &lt;kernel@witt.link&gt;
Cc: Werner Sembach &lt;wse@tuxedocomputers.com&gt;
Cc: Vidya Sagar &lt;vidyas@nvidia.com&gt;
</content>
</entry>
</feed>
