<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/pci/msi.c, branch linux-4.10.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.10.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.10.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2017-02-02T16:35:46Z</updated>
<entry>
<title>PCI/MSI: Don't apply affinity if there aren't enough vectors left</title>
<updated>2017-02-02T16:35:46Z</updated>
<author>
<name>Christoph Hellwig</name>
</author>
<published>2017-01-30T12:15:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=dfef358bd1beb4e7b5c94eca944be9cd23dfc752'/>
<id>urn:sha1:dfef358bd1beb4e7b5c94eca944be9cd23dfc752</id>
<content type='text'>
Bart reported a problem wіth an out of bounds access in the low-level IRQ
affinity code, which we root caused to the qla2xxx driver assigning all its
MSI-X vectors to the pre and post vectors, and not having any left for the
actually spread IRQs.

Fix this issue by not asking for affinity assignment when there are no
vectors to assign left.

Fixes: 402723ad5c62 ("PCI/MSI: Provide pci_alloc_irq_vectors_affinity()")
Link: https://lkml.kernel.org/r/1485359225.3093.3.camel@sandisk.com
Reported-by: Bart Van Assche &lt;bart.vanassche@sandisk.com&gt;
Tested-by: Bart Van Assche &lt;bart.vanassche@sandisk.com&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>Merge tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2016-12-15T20:46:48Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2016-12-15T20:46:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0ab7b12c49b6fbf2d4d0381374b82935f949be5f'/>
<id>urn:sha1:0ab7b12c49b6fbf2d4d0381374b82935f949be5f</id>
<content type='text'>
Pull PCI updates from Bjorn Helgaas:
 "PCI changes:

   - add support for PCI on ARM64 boxes with ACPI. We already had this
     for theoretical spec-compliant hardware; now we're adding quirks
     for the actual hardware (Cavium, HiSilicon, Qualcomm, X-Gene)

   - add runtime PM support for hotplug ports

   - enable runtime suspend for Intel UHCI that uses platform-specific
     wakeup signaling

   - add yet another host bridge registration interface. We hope this is
     extensible enough to subsume the others

   - expose device revision in sysfs for DRM

   - to avoid device conflicts, make sure any VF BAR updates are done
     before enabling the VF

   - avoid unnecessary link retrains for ASPM

   - allow INTx masking on Mellanox devices that support it

   - allow access to non-standard VPD for Chelsio devices

   - update Broadcom iProc support for PAXB v2, PAXC v2, inbound DMA,
     etc

   - update Rockchip support for max-link-speed

   - add NVIDIA Tegra210 support

   - add Layerscape LS1046a support

   - update R-Car compatibility strings

   - add Qualcomm MSM8996 support

   - remove some uninformative bootup messages"

* tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (115 commits)
  PCI: Enable access to non-standard VPD for Chelsio devices (cxgb3)
  PCI: Expand "VPD access disabled" quirk message
  PCI: pciehp: Remove loading message
  PCI: hotplug: Remove hotplug core message
  PCI: Remove service driver load/unload messages
  PCI/AER: Log AER IRQ when claiming Root Port
  PCI/AER: Log errors with PCI device, not PCIe service device
  PCI/AER: Remove unused version macros
  PCI/PME: Log PME IRQ when claiming Root Port
  PCI/PME: Drop unused support for PMEs from Root Complex Event Collectors
  PCI: Move config space size macros to pci_regs.h
  x86/platform/intel-mid: Constify mid_pci_platform_pm
  PCI/ASPM: Don't retrain link if ASPM not possible
  PCI: iproc: Skip check for legacy IRQ on PAXC buses
  PCI: pciehp: Leave power indicator on when enabling already-enabled slot
  PCI: pciehp: Prioritize data-link event over presence detect
  PCI: rcar: Add gen3 fallback compatibility string for pcie-rcar
  PCI: rcar: Use gen2 fallback compatibility last
  PCI: rcar-gen2: Use gen2 fallback compatibility last
  PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init()
  ..
</content>
</entry>
<entry>
<title>PCI/MSI: Provide pci_alloc_irq_vectors_affinity()</title>
<updated>2016-11-09T07:25:10Z</updated>
<author>
<name>Christoph Hellwig</name>
</author>
<published>2016-11-09T01:15:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=402723ad5c625ee052432698ae5e56b02d38d4ec'/>
<id>urn:sha1:402723ad5c625ee052432698ae5e56b02d38d4ec</id>
<content type='text'>
This is a variant of pci_alloc_irq_vectors() that allows passing a struct
irq_affinity to provide fine-grained IRQ affinity control.

For now this means being able to exclude vectors at the beginning or end of
the MSI vector space, but it could also be used for any other quirks needed
in the future (e.g. more vectors than CPUs, or excluding CPUs from the
spreading).

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Hannes Reinecke &lt;hare@suse.com&gt;
Reviewed-by: Johannes Thumshirn &lt;jthumshirn@suse.de&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: linux-block@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Link: http://lkml.kernel.org/r/1478654107-7384-6-git-send-email-hch@lst.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>PCI/MSI: Propagate IRQ affinity description through the MSI code</title>
<updated>2016-11-09T07:25:09Z</updated>
<author>
<name>Christoph Hellwig</name>
</author>
<published>2016-11-09T01:15:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=61e1c5905290efe48bacda5e342d4af4cb1b923b'/>
<id>urn:sha1:61e1c5905290efe48bacda5e342d4af4cb1b923b</id>
<content type='text'>
No API change yet, just pass it down all the way from
pci_alloc_irq_vectors() to the core MSI code.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Hannes Reinecke &lt;hare@suse.com&gt;
Reviewed-by: Johannes Thumshirn &lt;jthumshirn@suse.de&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: linux-block@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Link: http://lkml.kernel.org/r/1478654107-7384-5-git-send-email-hch@lst.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>genirq/affinity: Handle pre/post vectors in irq_create_affinity_masks()</title>
<updated>2016-11-09T07:25:09Z</updated>
<author>
<name>Christoph Hellwig</name>
</author>
<published>2016-11-09T01:15:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=67c93c218dc5d1b45d547771f1fdb44a381e1faf'/>
<id>urn:sha1:67c93c218dc5d1b45d547771f1fdb44a381e1faf</id>
<content type='text'>
Only calculate the affinity for the main I/O vectors, and skip the
pre or post vectors specified by struct irq_affinity.

Also remove the irq_affinity cpumask argument that has never been used.
If we ever need it in the future we can pass it through struct
irq_affinity.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Hannes Reinecke &lt;hare@suse.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: linux-block@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Link: http://lkml.kernel.org/r/1478654107-7384-4-git-send-email-hch@lst.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>genirq/affinity: Handle pre/post vectors in irq_calc_affinity_vectors()</title>
<updated>2016-11-09T07:25:08Z</updated>
<author>
<name>Christoph Hellwig</name>
</author>
<published>2016-11-09T01:15:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=212bd846223c718b6577d4df16fd8d05a55ad914'/>
<id>urn:sha1:212bd846223c718b6577d4df16fd8d05a55ad914</id>
<content type='text'>
Only calculate the affinity for the main I/O vectors, and skip the pre or
post vectors specified by struct irq_affinity.

Also remove the irq_affinity cpumask argument that has never been used.  If
we ever need it in the future we can pass it through struct irq_affinity.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Hannes Reinecke &lt;hare@suse.com&gt;
Acked-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: linux-block@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Link: http://lkml.kernel.org/r/1478654107-7384-3-git-send-email-hch@lst.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>PCI/MSI: Check for NULL affinity mask in pci_irq_get_affinity()</title>
<updated>2016-11-08T21:35:17Z</updated>
<author>
<name>Jan Beulich</name>
</author>
<published>2016-11-08T07:43:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d1d111e073840b8dbc1ae90ba3fc274736451bdc'/>
<id>urn:sha1:d1d111e073840b8dbc1ae90ba3fc274736451bdc</id>
<content type='text'>
If msi_setup_entry() fails to allocate an affinity mask, it logs a message
but continues on and allocates an MSI entry with entry-&gt;affinity == NULL.

Check for this case in pci_irq_get_affinity() so we don't try to
dereference a NULL pointer.

[bhelgaas: changelog]
Fixes: ee8d41e53efe "pci/msi: Retrieve affinity for a vector"
Signed-off-by: Jan Beulich &lt;jbeulich@suse.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;</content>
</entry>
<entry>
<title>doc: Add missing parameter for msi_setup</title>
<updated>2016-10-26T10:05:34Z</updated>
<author>
<name>Stephen Hemminger</name>
</author>
<published>2016-10-23T16:32:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=62c61514191bfe5731b43619b9b1bf4b423beeb0'/>
<id>urn:sha1:62c61514191bfe5731b43619b9b1bf4b423beeb0</id>
<content type='text'>
commit 92ca8d20dee2 ("genirq/msi: Switch to new irq spreading")
introduced new parameter to msi_init_setup and but did not update
docbook comments. Fixes 'make htmldocs' warning.

Signed-off-by: Stephen Hemminger &lt;sthemmin@microsoft.com&gt;
Cc: bhelgaas@google.com
Cc: linux-pci@vger.kernel.org
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>Merge branch 'irq/for-block' into irq/core</title>
<updated>2016-09-15T18:54:40Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2016-09-15T18:54:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0a30d69195604f136a4e3bfaf453f742e583ce95'/>
<id>urn:sha1:0a30d69195604f136a4e3bfaf453f742e583ce95</id>
<content type='text'>
Add the new irq spreading infrastructure.
</content>
</entry>
<entry>
<title>pci/msi: Retrieve affinity for a vector</title>
<updated>2016-09-14T20:11:10Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2016-09-14T14:18:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ee8d41e53efe14bfc5ea5866e1178b06d78a7c95'/>
<id>urn:sha1:ee8d41e53efe14bfc5ea5866e1178b06d78a7c95</id>
<content type='text'>
Add a helper to get the affinity mask for a given PCI irq vector.  For MSI or
MSI-X vectors these are stored by the IRQ core, while for legacy interrupts
we will always return cpu_possible_map.

[hch: updated to follow the style of pci_irq_vector()]

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Cc: axboe@fb.com
Cc: keith.busch@intel.com
Cc: agordeev@redhat.com
Cc: linux-block@vger.kernel.org
Link: http://lkml.kernel.org/r/1473862739-15032-6-git-send-email-hch@lst.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
</feed>
