kernel.git/drivers/pci/msi.c, branch linux-3.19.y

Merge branch 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2014-12-10T17:01:01Z

Pull irq domain updates from Thomas Gleixner: "The real interesting irq updates: - Support for hierarchical irq domains: For complex interrupt routing scenarios where more than one interrupt related chip is involved we had no proper representation in the generic interrupt infrastructure so far. That made people implement rather ugly constructs in their nested irq chip implementations. The main offenders are x86 and arm/gic. To distangle that mess we have now hierarchical irqdomains which seperate the various interrupt chips and connect them via the hierarchical domains. That keeps the domain specific details internal to the particular hierarchy level and removes the criss/cross referencing of chip internals. The resulting hierarchy for a complex x86 system will look like this: vector mapped: 74 msi-0 mapped: 2 dmar-ir-1 mapped: 69 ioapic-1 mapped: 4 ioapic-0 mapped: 20 pci-msi-2 mapped: 45 dmar-ir-0 mapped: 3 ioapic-2 mapped: 1 pci-msi-1 mapped: 2 htirq mapped: 0 Neither ioapic nor pci-msi know about the dmar interrupt remapping between themself and the vector domain. If interrupt remapping is disabled ioapic and pci-msi become direct childs of the vector domain. In hindsight we should have done that years ago, but in hindsight we always know better :) - Support for generic MSI interrupt domain handling We have more and more non PCI related MSI interrupts, so providing a generic infrastructure for this is better than having all affected architectures implementing their own private hacks. - Support for PCI-MSI interrupt domain handling, based on the generic MSI support. This part carries the pci/msi branch from Bjorn Helgaas pci tree to avoid a massive conflict. The PCI/MSI parts are acked by Bjorn. I have two more branches on top of this. The full conversion of x86 to hierarchical domains and a partial conversion of arm/gic" * 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits) genirq: Move irq_chip_write_msi_msg() helper to core PCI/MSI: Allow an msi_controller to be associated to an irq domain PCI/MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain PCI/MSI: Enhance core to support hierarchy irqdomain PCI/MSI: Move cached entry functions to irq core genirq: Provide default callbacks for msi_domain_ops genirq: Introduce msi_domain_alloc/free_irqs() asm-generic: Add msi.h genirq: Add generic msi irq domain support genirq: Introduce callback irq_chip.irq_write_msi_msg genirq: Work around __irq_set_handler vs stacked domains ordering issues irqdomain: Introduce helper function irq_domain_add_hierarchy() irqdomain: Implement a method to automatically call parent domains alloc/free genirq: Introduce helper irq_domain_set_info() to reduce duplicated code genirq: Split out flow handler typedefs into seperate header file genirq: Add IRQ_SET_MASK_OK_DONE to support stacked irqchip genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip genirq: Add more helper functions to support stacked irq_chip genirq: Introduce helper functions to support stacked irq_chip irqdomain: Do irq_find_mapping and set_type for hierarchy irqdomain in case OF ...

PCI/MSI: Add device flag indicating that 64-bit MSIs don't work

2014-11-24T03:11:34Z

This can be set by quirks/drivers to be used by the architecture code that assigns the MSI addresses. We additionally add verification in the core MSI code that the values assigned by the architecture do satisfy the limitation in order to fail gracefully if they don't (ie. the arch hasn't been updated to deal with that quirk yet). Signed-off-by: Benjamin Herrenschmidt CC: Acked-by: Bjorn Helgaas

PCI/MSI: Allow an msi_controller to be associated to an irq domain

2014-11-23T16:14:43Z

With the new stacked irq domains, it becomes pretty tempting to allocate an MSI domain per PCI bus, which would remove the requirement of either relying on arch-specific code, or a default PCI MSI domain. By allowing the msi_controller structure to carry a pointer to an irq_domain, we can easily use this in pci_msi_setup_msi_irqs. The existing code can still be used as a fallback if the MSI driver does not populate the domain field. Tested on arm64 with the GICv3 ITS driver. Signed-off-by: Marc Zyngier Cc: Yingjoe Chen Cc: Bjorn Helgaas Cc: linux-arm-kernel@lists.infradead.org Cc: Jiang Liu Link: http://lkml.kernel.org/r/1416048553-29289-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner

PCI/MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain

2014-11-23T12:01:47Z

Provide mechanism to directly alloc/free MSI/MSIX interrupt from irqdomain, which will be used to replace arch_setup_msi_irq()/ arch_setup_msi_irqs()/arch_teardown_msi_irq()/arch_teardown_msi_irqs(). To kill weak functions, this patch introduce a new weak function arch_get_pci_msi_domain(), which is to retrieve the MSI irqdomain for a PCI device. This weak function could be killed once we get a common way to associate MSI domain with PCI device. Signed-off-by: Jiang Liu Cc: Tony Luck Cc: linux-arm-kernel@lists.infradead.org Cc: Bjorn Helgaas Cc: Grant Likely Cc: Marc Zyngier Cc: Yijing Wang Cc: Yingjoe Chen Cc: Borislav Petkov Cc: Matthias Brugger Cc: Alexander Gordeev Link: http://lkml.kernel.org/r/1416061447-9472-10-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner

PCI/MSI: Enhance core to support hierarchy irqdomain

2014-11-23T12:01:47Z

Enhance PCI MSI core to support hierarchy irqdomain, so the common code can be shared across architectures. [ tglx: Extracted and combined from several patches ] Signed-off-by: Jiang Liu Cc: Bjorn Helgaas Cc: Grant Likely Cc: Marc Zyngier Cc: Yingjoe Chen Cc: Yijing Wang Signed-off-by: Thomas Gleixner

PCI/MSI: Move cached entry functions to irq core

2014-11-23T12:01:47Z

Required to support non PCI based MSI. [ tglx: Extracted from Jiangs patch series ] Signed-off-by: Jiang Liu Signed-off-by: Thomas Gleixner

PCI/MSI: Rename mask/unmask_msi_irq et al

2014-11-23T12:01:45Z

mask/unmask_msi_irq and __mask_msi/msix_irq are PCI/MSI specific functions and should be named accordingly. This is a preparatory patch to support MSI on non PCI devices. Rename mask/unmask_msi_irq to pci_msi_mask/unmask_irq and document the functions. Provide conversion helpers. Rename __mask_msi/msix_irq to __pci_msi/msix_desc_mask so its clear that they operated on msi_desc. Fixup the only user outside of pci/msi. Signed-off-by: Thomas Gleixner Cc: Bjorn Helgaas Cc: Jiang Liu Cc: Grant Likely Cc: Marc Zyngier Cc: Yijing Wang Cc: Heiko Carstens

PCI/MSI: Rename write_msi_msg() to pci_write_msi_msg()

2014-11-23T12:01:45Z

Rename write_msi_msg() to pci_write_msi_msg() to mark it as PCI specific. Signed-off-by: Jiang Liu Cc: Bjorn Helgaas Cc: Grant Likely Cc: Marc Zyngier Cc: Yingjoe Chen Cc: Yijing Wang Signed-off-by: Thomas Gleixner

PCI/MSI: Rename __read_msi_msg() to __pci_read_msi_msg()

2014-11-23T12:01:45Z

Rename __read_msi_msg() to __pci_read_msi_msg() and kill unused read_msi_msg(). It's a preparation to separate generic MSI code from PCI core. Signed-off-by: Jiang Liu Cc: Bjorn Helgaas Cc: Grant Likely Cc: Marc Zyngier Cc: Yingjoe Chen Cc: Yijing Wang Signed-off-by: Thomas Gleixner

PCI/MSI: Kill redundant call of irq_set_msi_desc() for MSI-X interrupts

2014-11-23T12:01:45Z

It is the repsonsibility of arch_setup_msi_irq()/arch_setup_msi_irqs() to call irq_set_msi_desc() to associate IRQ descriptors and MSI descriptors. Kill the redundant call of irq_set_msi_desc() for MSI-X interrupts in the PCI MSI core. Signed-off-by: Jiang Liu Cc: Bjorn Helgaas Cc: Grant Likely Cc: Marc Zyngier Cc: Yingjoe Chen Cc: Yijing Wang Signed-off-by: Thomas Gleixner