kernel.git/drivers/pci/controller/cadence, branch linux-6.4.y

PCI: cadence: Fix Gen2 Link Retraining process

2023-07-19T14:36:09Z

[ Upstream commit 0e12f830236928b6fadf40d917a7527f0a048d2f ] The Link Retraining process is initiated to account for the Gen2 defect in the Cadence PCIe controller in J721E SoC. The errata corresponding to this is i2085, documented at: https://www.ti.com/lit/er/sprz455c/sprz455c.pdf The existing workaround implemented for the errata waits for the Data Link initialization to complete and assumes that the link retraining process at the Physical Layer has completed. However, it is possible that the Physical Layer training might be ongoing as indicated by the PCI_EXP_LNKSTA_LT bit in the PCI_EXP_LNKSTA register. Fix the existing workaround, to ensure that the Physical Layer training has also completed, in addition to the Data Link initialization. Link: https://lore.kernel.org/r/20230315070800.1615527-1-s-vadapalli@ti.com Fixes: 4740b969aaf5 ("PCI: cadence: Retrain Link to work around Gen2 training defect") Signed-off-by: Siddharth Vadapalli Signed-off-by: Lorenzo Pieralisi Reviewed-by: Vignesh Raghavendra Signed-off-by: Sasha Levin

PCI: Use consistent controller Kconfig menu entry language

2023-04-20T21:18:04Z

Use "PCIe controller" consistently instead of "host bridge", "bus driver", etc. Annotate with "(host mode)" or "(endpoint mode)" as needed. Link: https://lore.kernel.org/r/20230418174336.145585-5-helgaas@kernel.org Signed-off-by: Bjorn Helgaas

PCI: Remove unnecessary includes

2022-11-10T20:53:51Z

Many host controller drivers #include even though they don't need it. Remove the unnecessary #includes. Link: https://lore.kernel.org/r/20221031153954.1163623-6-helgaas@kernel.org Signed-off-by: Bjorn Helgaas Acked-by: Roy Zang

PCI: Convert to new *_PM_OPS macros

2022-07-27T16:56:17Z

Replace SET_*_PM_OPS with *_PM_OPS, which which have the advantage that the compiler always sees the PM callbacks as referenced, so they don't need to be wrapped with "#ifdef CONFIG_PM_SLEEP" or tagged with "__maybe_unused" to avoid "defined but not used" warnings. See 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old ones"). Link: https://lore.kernel.org/r/20220719215108.1583108-1-helgaas@kernel.org Tested-by: Arnd Bergmann Signed-off-by: Bjorn Helgaas Reviewed-by: Pali Rohár # pci-mvebu.c Reviewed-by: Arnd Bergmann

PCI: cadence: Clear FLR in device capabilities register

2022-05-12T21:19:40Z

Clear FLR (Function Level Reset) from device capabilities registers for all physical functions. During FLR, the Margining Lane Status and Margining Lane Control registers should not be reset, as per PCIe specification. However, the controller incorrectly resets these registers upon FLR. This causes PCISIG compliance FLR test to fail. Hence preventing all functions from advertising FLR support if flag quirk_disable_flr is set. Link: https://lore.kernel.org/r/1635165075-89864-1-git-send-email-pthombar@cadence.com Signed-off-by: Parshuram Thombare Signed-off-by: Lorenzo Pieralisi

PCI: cadence: Allow PTM Responder to be enabled

2022-05-12T21:03:05Z

This enables the Controller [RP] to automatically respond with Response/ResponseD messages if CDNS_PCIE_LM_TPM_CTRL_PTMRSEN and PCI_PTM_CTRL_ENABLE bits are both set. Link: https://lore.kernel.org/r/20220512055539.1782437-1-christian.gmeiner@gmail.com Signed-off-by: Christian Gmeiner Signed-off-by: Lorenzo Pieralisi

PCI: cadence: Fix find_first_zero_bit() limit

2022-04-08T13:38:07Z

The ep->ob_region_map bitmap is a long and it has BITS_PER_LONG bits. Link: https://lore.kernel.org/r/20220315065829.GA13572@kili Fixes: 37dddf14f1ae ("PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller") Signed-off-by: Dan Carpenter Signed-off-by: Lorenzo Pieralisi

PCI: j721e: Initialize pcie->cdns_pcie before using it

2022-02-01T17:13:52Z

Christian reported a NULL pointer dereference in j721e_pcie_probe() caused by 19e863828acf ("PCI: j721e: Drop redundant struct device *"), which removed struct j721e_pcie.dev since there's another copy in struct cdns_pcie.dev reachable via j721e_pcie->cdns_pcie->dev. The problem is that j721e_pcie->cdns_pcie was dereferenced before being initialized: j721e_pcie_probe pcie = devm_kzalloc() # struct j721e_pcie j721e_pcie_ctrl_init(pcie) dev = pcie->cdns_pcie->dev <-- dereference cdns_pcie switch (mode) { case PCI_MODE_RC: cdns_pcie = ... # alloc as part of pci_host_bridge pcie->cdns_pcie = cdns_pcie <-- initialize pcie->cdns_pcie Move the cdns_pcie initialization earlier so it is done before it is used. This also simplifies the error exits. Fixes: 19e863828acf ("PCI: j721e: Drop redundant struct device *") Link: https://lore.kernel.org/r/20220127222951.GA144828@bhelgaas Link: https://lore.kernel.org/r/20220124122132.435743-1-christian.gmeiner@gmail.com Reported-by: Christian Gmeiner Tested-by: Christian Gmeiner Signed-off-by: Bjorn Helgaas

Merge branch 'pci/driver-cleanup'

2022-01-13T15:57:53Z

- Use of_device_get_match_data(), not of_match_device(), when we only need the device data in altera, artpec6, cadence, designware-plat, dra7xx, keystone, kirin (Fan Fei) - Drop pointless of_device_get_match_data() cast in j721e (Bjorn Helgaas) - Drop redundant struct device * from j721e since struct cdns_pcie already has one (Bjorn Helgaas) - Rename driver structs to *_pcie in intel-gw, iproc, ls-gen4, mediatek-gen3, microchip, mt7621, rcar-gen2, tegra194, uniphier, xgene, xilinx, xilinx-cpm for consistency across drivers (Fan Fei) - Fix invalid address space conversions in hisi, spear13xx (Bjorn Helgaas) * pci/driver-cleanup: PCI: spear13xx: Avoid invalid address space conversions PCI: hisi: Avoid invalid address space conversions PCI: xilinx-cpm: Rename xilinx_cpm_pcie_port to xilinx_cpm_pcie PCI: xilinx: Rename xilinx_pcie_port to xilinx_pcie PCI: xgene: Rename xgene_pcie_port to xgene_pcie PCI: uniphier: Rename uniphier_pcie_priv to uniphier_pcie PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie PCI: rcar-gen2: Rename rcar_pci_priv to rcar_pci PCI: mt7621: Rename mt7621_pci_ to mt7621_pcie_ PCI: microchip: Rename mc_port to mc_pcie PCI: mediatek-gen3: Rename mtk_pcie_port to mtk_gen3_pcie PCI: ls-gen4: Rename ls_pcie_g4 to ls_g4_pcie PCI: iproc: Rename iproc_pcie_pltfm_ to iproc_pltfm_pcie_ PCI: iproc: Rename iproc_pcie_bcma_ to iproc_bcma_pcie_ PCI: intel-gw: Rename intel_pcie_port to intel_pcie PCI: j721e: Drop redundant struct device * PCI: j721e: Drop pointless of_device_get_match_data() cast PCI: kirin: Prefer of_device_get_match_data() PCI: keystone: Prefer of_device_get_match_data() PCI: dra7xx: Prefer of_device_get_match_data() PCI: designware-plat: Prefer of_device_get_match_data() PCI: cadence: Prefer of_device_get_match_data() PCI: artpec6: Prefer of_device_get_match_data() PCI: altera: Prefer of_device_get_match_data() # Conflicts: # drivers/pci/controller/pcie-mt7621.c

PCI: Correct misspelled words

2022-01-08T02:43:23Z

Fix a number of misspelled words, and while at it, correct two phrases used to indicate a status of an operation where words used have been cleverly truncated and thus always trigger a spellchecking error while performing a static code analysis over the PCI tree. [bhelgaas: reverse sense of quirk ternary] Link: https://lore.kernel.org/r/20220107225942.121484-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński Signed-off-by: Bjorn Helgaas