<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/pci/controller/cadence, branch linux-5.12.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.12.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.12.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2021-02-24T20:59:23Z</updated>
<entry>
<title>Merge branch 'pci/ntb'</title>
<updated>2021-02-24T20:59:23Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2021-02-24T20:59:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2ef38d7e2b01d5668c1e607ef49d866b40403806'/>
<id>urn:sha1:2ef38d7e2b01d5668c1e607ef49d866b40403806</id>
<content type='text'>
- Account for 64-bit BARs in pci_epc_get_first_free_bar() (Kishon Vijay
  Abraham I)

- Add pci_epc_get_next_free_bar() helper (Kishon Vijay Abraham I)

- Return error codes on failure of endpoint BAR interfaces (Kishon Vijay
  Abraham I)

- Remove unused pci_epf_match_device() (Kishon Vijay Abraham I)

- Add support for secondary endpoint controller to prepare for NTB endpoint
  functionality (Kishon Vijay Abraham I)

- Add configfs support for secondary endpoint controller (Kishon Vijay
  Abraham I)

- Add MSI address mapping ops for NTB doorbell support (Kishon Vijay
  Abraham I)

- Add ops for endpoint function-specific attributes (Kishon Vijay Abraham
  I)

- Allow configfs subdirectory for endpoint function configuration (Kishon
  Vijay Abraham I)

- Implement cadence MSI address mapping ops (Kishon Vijay Abraham I)

- Configure cadence LM_EP_FUNC_CFG based on epc-&gt;function_num_map (Kishon
  Vijay Abraham I)

- Add endpoint-side driver to provide NTB functionality (Kishon Vijay
  Abraham I)

- Add host-side driver for generic EPF NTB functionality (Kishon Vijay
  Abraham I)

- Document NTB endpoint functionality (Kishon Vijay Abraham I)

* pci/ntb:
  Documentation: PCI: Add PCI endpoint NTB function user guide
  Documentation: PCI: Add configfs binding documentation for pci-ntb endpoint function
  NTB: Add support for EPF PCI Non-Transparent Bridge
  PCI: Add TI J721E device to PCI IDs
  PCI: endpoint: Add EP function driver to provide NTB functionality
  PCI: cadence: Configure LM_EP_FUNC_CFG based on epc-&gt;function_num_map
  PCI: cadence: Implement -&gt;msi_map_irq() ops
  PCI: endpoint: Allow user to create sub-directory of 'EPF Device' directory
  PCI: endpoint: Add pci_epf_ops to expose function-specific attrs
  PCI: endpoint: Add pci_epc_ops to map MSI IRQ
  PCI: endpoint: Add support in configfs to associate two EPCs with EPF
  PCI: endpoint: Add support to associate secondary EPC with EPF
  PCI: endpoint: Remove unused pci_epf_match_device()
  PCI: endpoint: Make *_free_bar() to return error codes on failure
  PCI: endpoint: Add helper API to get the 'next' unreserved BAR
  PCI: endpoint: Make *_get_first_free_bar() take into account 64 bit BAR
  Documentation: PCI: Add specification for the PCI NTB function device
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/cadence'</title>
<updated>2021-02-24T20:59:21Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2021-02-24T20:59:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=59189d06e06cfc57d215a8ad1d92d42b2730e380'/>
<id>urn:sha1:59189d06e06cfc57d215a8ad1d92d42b2730e380</id>
<content type='text'>
- Retrain Link to work around Gen2 training defect (Nadeem Athani)

* remotes/lorenzo/pci/cadence:
  PCI: cadence: Retrain Link to work around Gen2 training defect
</content>
</entry>
<entry>
<title>PCI: cadence: Configure LM_EP_FUNC_CFG based on epc-&gt;function_num_map</title>
<updated>2021-02-23T20:12:18Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
</author>
<published>2021-02-01T19:58:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a62074a9ba856082a60ff60693abd79f4b55177d'/>
<id>urn:sha1:a62074a9ba856082a60ff60693abd79f4b55177d</id>
<content type='text'>
The number of functions supported by the endpoint controller is configured
in LM_EP_FUNC_CFG based on func_no member of struct pci_epf.  Now that an
endpoint function can be associated with two endpoint controllers (primary
and secondary), just using func_no will not suffice as that will take into
account only if the endpoint controller is associated with the primary
interface of endpoint function. Instead use epc-&gt;function_num_map which
will already have the configured functions information (irrespective of
whether the endpoint controller is associated with primary or secondary
interface).

Link: https://lore.kernel.org/r/20210201195809.7342-13-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Tom Joseph &lt;tjoseph@cadence.com&gt;
</content>
</entry>
<entry>
<title>PCI: cadence: Implement -&gt;msi_map_irq() ops</title>
<updated>2021-02-23T20:12:12Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
</author>
<published>2021-02-01T19:58:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=dbcc542f36086abcaec28a858b17f2c358d57973'/>
<id>urn:sha1:dbcc542f36086abcaec28a858b17f2c358d57973</id>
<content type='text'>
Implement -&gt;msi_map_irq() ops in order to map physical address to MSI
address and return MSI data.

Link: https://lore.kernel.org/r/20210201195809.7342-12-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Tom Joseph &lt;tjoseph@cadence.com&gt;
</content>
</entry>
<entry>
<title>PCI: cadence: Fix DMA range mapping early return error</title>
<updated>2021-02-18T16:56:02Z</updated>
<author>
<name>Krzysztof Wilczyński</name>
</author>
<published>2021-02-16T20:59:35Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1002573ee33efef0988a9a546c075a9fa37d2498'/>
<id>urn:sha1:1002573ee33efef0988a9a546c075a9fa37d2498</id>
<content type='text'>
Function cdns_pcie_host_map_dma_ranges() iterates over a PCIe host bridge
DMA ranges using the resource_list_for_each_entry() iterator, returning an
error if cdns_pcie_host_bar_config() fails.

49e427e6bdd1 ("Merge branch 'pci/host-probe-refactor'") botched a merge so
it *always* returned after the first DMA range, even if no error occurred.

Fix the error checking so we return early only when an error occurs.

[bhelgaas: commit log]
Fixes: 49e427e6bdd1 ("Merge branch 'pci/host-probe-refactor'")
Link: https://lore.kernel.org/r/20210216205935.3112661-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński &lt;kw@linux.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: cadence: Retrain Link to work around Gen2 training defect</title>
<updated>2021-02-10T12:48:45Z</updated>
<author>
<name>Nadeem Athani</name>
</author>
<published>2021-02-09T14:46:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4740b969aaf58adeca6829947a3ad8da423976cf'/>
<id>urn:sha1:4740b969aaf58adeca6829947a3ad8da423976cf</id>
<content type='text'>
Cadence controller will not initiate autonomous speed change if strapped
as Gen2. The Retrain Link bit is set as quirk to enable this speed change.

Link: https://lore.kernel.org/r/20210209144622.26683-3-nadeem@cadence.com
Signed-off-by: Nadeem Athani &lt;nadeem@cadence.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl" phandle arg</title>
<updated>2020-12-10T14:37:48Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
</author>
<published>2020-12-10T12:49:17Z</published>
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<id>urn:sha1:7aa256234c4c86d8b8fa19a7647051b8fd9721d9</id>
<content type='text'>
Get "syscon" pcie_ctrl offset from the argument of "ti,syscon-pcie-ctrl"
phandle. Previously a subnode to "syscon" node was added which has the
exact memory mapped address of pcie_ctrl but now the offset of pcie_ctrl
within "syscon" is now being passed as argument to "ti,syscon-pcie-ctrl"
phandle.

If the offset is not provided in "ti,syscon-pcie-ctrl", the
full memory mapped address of pcie_ctrl is used in order to maintain old
DT compatibility.

This change is as discussed in [1]

[1] -&gt; http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com

Link: https://lore.kernel.org/r/20201210124917.24185-5-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: cadence: Do not error if "cdns,max-outbound-regions" is not found</title>
<updated>2020-11-20T17:23:31Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
</author>
<published>2020-11-06T15:11:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e87d17ca6af5ba4466538de87785cfc8c20af59a'/>
<id>urn:sha1:e87d17ca6af5ba4466538de87785cfc8c20af59a</id>
<content type='text'>
Now that "cdns,max-outbound-regions" is made an optional property, do
not error out if "cdns,max-outbound-regions" device tree property is
not found.

Link: http://lore.kernel.org/r/20201105165331.GA55814@bogus
Link: https://lore.kernel.org/r/20201106151107.3987-3-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: cadence: Simplify cdns_pcie_host_init_address_translation() return expression</title>
<updated>2020-10-02T11:52:37Z</updated>
<author>
<name>Qinglang Miao</name>
</author>
<published>2020-09-21T13:10:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9aae3af8767cdfbdcb2d59c008b9477e82ab1029'/>
<id>urn:sha1:9aae3af8767cdfbdcb2d59c008b9477e82ab1029</id>
<content type='text'>
Simplify the return expression.

Link: https://lore.kernel.org/r/20200921131053.92752-1-miaoqinglang@huawei.com
Signed-off-by: Qinglang Miao &lt;miaoqinglang@huawei.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: cadence-ep: Remove obsolete path from comment</title>
<updated>2020-09-07T15:10:15Z</updated>
<author>
<name>Flavio Suligoi</name>
</author>
<published>2020-06-23T07:48:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c7e592a6a5413c780f846d9b053fb132fedb63b8'/>
<id>urn:sha1:c7e592a6a5413c780f846d9b053fb132fedb63b8</id>
<content type='text'>
This comment still refers to the old driver pathname,
when all PCI drivers were located directly under the
drivers/pci directory.

Anyway the function name itself is enough, so we can
remove the overabundant path reference.

Link: https://lore.kernel.org/r/20200623074851.7832-1-f.suligoi@asem.it
Signed-off-by: Flavio Suligoi &lt;f.suligoi@asem.it&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
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