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<title>kernel.git/drivers/pci/ats.c, branch linux-4.13.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.13.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.13.y'/>
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<updated>2017-05-30T20:40:50Z</updated>
<entry>
<title>PCI: Restore PRI and PASID state after Function-Level Reset</title>
<updated>2017-05-30T20:40:50Z</updated>
<author>
<name>CQ Tang</name>
</author>
<published>2017-05-30T16:25:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4ebeb1ec56d4c54a56b6f43c2603d9a4688c83ba'/>
<id>urn:sha1:4ebeb1ec56d4c54a56b6f43c2603d9a4688c83ba</id>
<content type='text'>
After a Function-Level Reset, PCI states need to be restored.  Save PASID
features and PRI reqs cached.

[bhelgaas: search for capability only if PRI/PASID were enabled]
Signed-off-by: CQ Tang &lt;cq.tang@intel.com&gt;
Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Joerg Roedel &lt;joro@8bytes.org&gt;
Cc: Jean-Phillipe Brucker &lt;jean-philippe.brucker@arm.com&gt;
Cc: David Woodhouse &lt;dwmw2@infradead.org&gt;</content>
</entry>
<entry>
<title>PCI: Cache PRI and PASID bits in pci_dev</title>
<updated>2017-05-30T20:39:15Z</updated>
<author>
<name>Jean-Philippe Brucker</name>
</author>
<published>2017-05-30T16:25:48Z</published>
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<id>urn:sha1:a4f4fa681add289ebfec6d776376ad7a2ffda669</id>
<content type='text'>
Device drivers need to check if an IOMMU enabled ATS, PRI and PASID in
order to know when they can use the SVM API.  Cache PRI and PASID bits in
the pci_dev structure, similarly to what is currently done for ATS.

Signed-off-by: Jean-Philippe Brucker &lt;jean-philippe.brucker@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>PCI: Remove pci_ats_enabled()</title>
<updated>2015-08-13T20:59:59Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2015-07-20T14:23:37Z</published>
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<id>urn:sha1:f7ef1340bb501717372a39f4807d0ad519ebd432</id>
<content type='text'>
Remove pci_ats_enabled().  There are no callers outside the ATS code
itself.  We don't need to check ats_cap, because if we don't find an ATS
capability, we'll never set ats_enabled.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;</content>
</entry>
<entry>
<title>PCI: Stop caching ATS Invalidate Queue Depth</title>
<updated>2015-08-13T20:59:58Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2015-07-20T14:24:32Z</published>
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<id>urn:sha1:a71f938f3a9a7bc879296cd34ecae9effe5edf3f</id>
<content type='text'>
Stop caching the Invalidate Queue Depth in struct pci_dev.
pci_ats_queue_depth() is typically called only once per device, and it
returns a fixed value per-device, so callers who need the value frequently
can cache it themselves.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;</content>
</entry>
<entry>
<title>PCI: Clean up ATS error handling</title>
<updated>2015-08-13T20:57:30Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2015-07-17T20:43:27Z</published>
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<id>urn:sha1:a021f3019db7b40f0fe85b0a64c6be21e3665fbf</id>
<content type='text'>
There's no need to BUG() if we enable ATS when it's already enabled.  We
don't need to BUG() when disabling ATS on a device that doesn't support ATS
or if it's already disabled.  If ATS is enabled, certainly we found an ATS
capability in the past, so it should still be there now.

Clean up these error paths.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;</content>
</entry>
<entry>
<title>PCI: Use pci_physfn() rather than looking up physfn by hand</title>
<updated>2015-08-13T20:57:23Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2015-07-17T20:38:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c39127dbaf6c267f18d1cac14e2b0ecbfaa52d63'/>
<id>urn:sha1:c39127dbaf6c267f18d1cac14e2b0ecbfaa52d63</id>
<content type='text'>
Use the pci_physfn() helper rather than looking up physfn by hand.
No functional change.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;</content>
</entry>
<entry>
<title>PCI: Inline the ATS setup code into pci_ats_init()</title>
<updated>2015-08-13T20:57:23Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2015-07-17T20:35:18Z</published>
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<id>urn:sha1:afdd596c42c4540308eae9f4c685d9bccc525cfc</id>
<content type='text'>
The ATS setup code in ats_alloc_one() is only used by pci_ats_init(), so
inline it there.  No functional change.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;</content>
</entry>
<entry>
<title>PCI: Rationalize pci_ats_queue_depth() error checking</title>
<updated>2015-08-13T20:57:22Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2015-07-17T20:30:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3c765399524308ab36777a443ce77e19810a97d7'/>
<id>urn:sha1:3c765399524308ab36777a443ce77e19810a97d7</id>
<content type='text'>
We previously returned -ENODEV for devices that don't support ATS (except
that we always returned 0 for VFs, whether or not they support ATS).

For consistency, always return -EINVAL (not -ENODEV) if the device doesn't
support ATS.  Return zero for VFs that support ATS.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;</content>
</entry>
<entry>
<title>PCI: Embed ATS info directly into struct pci_dev</title>
<updated>2015-08-13T20:57:21Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2015-07-17T20:15:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d544d75ac96aa1b0a8a378826626a0fbd8ce4380'/>
<id>urn:sha1:d544d75ac96aa1b0a8a378826626a0fbd8ce4380</id>
<content type='text'>
The pci_ats struct is small and will get smaller, so I don't think it's
worth allocating it separately from the pci_dev struct.

Embed the ATS fields directly into struct pci_dev.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;</content>
</entry>
<entry>
<title>PCI: Allocate ATS struct during enumeration</title>
<updated>2015-08-13T20:57:21Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2015-07-17T20:05:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=edc90fee916b4f0d14af9c6b5c08666747488ef8'/>
<id>urn:sha1:edc90fee916b4f0d14af9c6b5c08666747488ef8</id>
<content type='text'>
Previously, we allocated pci_ats structures when an IOMMU driver called
pci_enable_ats().  An SR-IOV VF shares the STU setting with its PF, so when
enabling ATS on the VF, we allocated a pci_ats struct for the PF if it
didn't already have one.  We held the sriov-&gt;lock to serialize threads
concurrently enabling ATS on several VFS so only one would allocate the PF
pci_ats.

Gregor reported a deadlock here:

  pci_enable_sriov
    sriov_enable
      virtfn_add
        mutex_lock(dev-&gt;sriov-&gt;lock)      # acquire sriov-&gt;lock
        pci_device_add
          device_add
            BUS_NOTIFY_ADD_DEVICE notifier chain
            iommu_bus_notifier
              amd_iommu_add_device        # iommu_ops.add_device
                init_iommu_group
                  iommu_group_get_for_dev
                    iommu_group_add_device
                      __iommu_attach_device
                        amd_iommu_attach_device  # iommu_ops.attach_device
                          attach_device
                            pci_enable_ats
                              mutex_lock(dev-&gt;sriov-&gt;lock) # deadlock

There's no reason to delay allocating the pci_ats struct, and if we
allocate it for each device at enumeration-time, there's no need for
locking in pci_enable_ats().

Allocate pci_ats struct during enumeration, when we initialize other
capabilities.

Note that this implementation requires ATS to be enabled on the PF first,
before on any of the VFs because the PF controls the STU for all the VFs.

Link: http://permalink.gmane.org/gmane.linux.kernel.iommu/9433
Reported-by: Gregor Dick &lt;gdick@solarflare.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;</content>
</entry>
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