<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/net/phy/marvell.c, branch linux-3.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.3.y</id>
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<updated>2010-11-22T16:34:23Z</updated>
<entry>
<title>of/phylib: Use device tree properties to initialize Marvell PHYs.</title>
<updated>2010-11-22T16:34:23Z</updated>
<author>
<name>David Daney</name>
</author>
<published>2010-11-19T12:13:18Z</published>
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<id>urn:sha1:cf41a51db89850033efc11c18a5257de810b5417</id>
<content type='text'>
Some aspects of PHY initialization are board dependent, things like
indicator LED connections and some clocking modes cannot be determined
by probing.  The dev_flags element of struct phy_device can be used to
control these things if an appropriate value can be passed from the
Ethernet driver.  We run into problems however if the PHY connections
are specified by the device tree.  There is no way for the Ethernet
driver to know what flags it should pass.

If we are using the device tree, the struct phy_device will be
populated with the device tree node corresponding to the PHY, and we
can extract extra configuration information from there.

The next question is what should the format of that information be?
It is highly device specific, and the device tree representation
should not be tied to any arbitrary kernel defined constants.  A
straight forward representation is just to specify the exact bits that
should be set using the "marvell,reg-init" property:

      phy5: ethernet-phy@5 {
        reg = &lt;5&gt;;
        compatible = "marvell,88e1149r";
        marvell,reg-init =
                /* led[0]:1000, led[1]:100, led[2]:10, led[3]:tx */
                &lt;3 0x10 0 0x5777&gt;, /* Reg 3,16 &lt;- 0x5777 */
                /* mix %:0, led[0123]:drive low off hiZ */
                &lt;3 0x11 0 0x00aa&gt;, /* Reg 3,17 &lt;- 0x00aa */
                /* default blink periods. */
                &lt;3 0x12 0 0x4105&gt;, /* Reg 3,18 &lt;- 0x4105 */
                /* led[4]:rx, led[5]:dplx, led[45]:drive low off hiZ */
                &lt;3 0x13 0 0x0a60&gt;; /* Reg 3,19 &lt;- 0x0a60 */
      };

      phy6: ethernet-phy@6 {
        reg = &lt;6&gt;;
        compatible = "marvell,88e1118";
        marvell,reg-init =
                /* Fix rx and tx clock transition timing */
                &lt;2 0x15 0xffcf 0&gt;, /* Reg 2,21 Clear bits 4, 5 */
                /* Adjust LED drive. */
                &lt;3 0x11 0 0x442a&gt;, /* Reg 3,17 &lt;- 0442a */
                /* irq, blink-activity, blink-link */
                &lt;3 0x10 0 0x0242&gt;; /* Reg 3,16 &lt;- 0x0242 */
      };

The Marvell PHYs have a page select register at register 22 (0x16), we
can specify any register by its page and register number.  These are
the first and second word.  The third word contains a mask to be ANDed
with the existing register value, and the fourth word is ORed with the
result to yield the new register value.  The new marvell_of_reg_init
function leaves the page select register unchanged, so a call to it
can be dropped into the .config_init functions without unduly
affecting the state of the PHY.

If CONFIG_OF_MDIO is not set, there is no of_node, or no
"marvell,reg-init" property, the PHY initialization is unchanged.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Cc: Cyril Chemparathy &lt;cyril@ti.com&gt;
Cc: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Reviewed-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phylib: Add support for Marvell 88E1149R devices.</title>
<updated>2010-11-22T16:34:23Z</updated>
<author>
<name>David Daney</name>
</author>
<published>2010-11-19T11:58:53Z</published>
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<id>urn:sha1:90600732d8b2fbc422bc9c57bdc73513d909367f</id>
<content type='text'>
The 88E1149R is 10/100/1000 quad-gigabit Ethernet PHY.  The
.config_aneg function can be shared with 88E1118, but it needs its own
.config_init.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Cyril Chemparathy &lt;cyril@ti.com&gt;
Cc: Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Wolfram Sang &lt;w.sang@pengutronix.de&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phylib: Use common page register definition for Marvell PHYs.</title>
<updated>2010-11-22T16:34:22Z</updated>
<author>
<name>David Daney</name>
</author>
<published>2010-11-19T11:58:52Z</published>
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<id>urn:sha1:27d916d680e7b324087a75d080f215e7c34a4e8f</id>
<content type='text'>
The definition of the Marvell PHY page register is not specific to
88E1121, so rename the macro to MII_MARVELL_PHY_PAGE, and use it
throughout.

Suggested-by: Cyril Chemparathy &lt;cyril@ti.com&gt;
Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Cyril Chemparathy &lt;cyril@ti.com&gt;
Cc: Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy/marvell: rename 88ec048 to 88e1318s and fix mscr1 addr</title>
<updated>2010-10-29T20:50:25Z</updated>
<author>
<name>Cyril Chemparathy</name>
</author>
<published>2010-10-29T20:50:25Z</published>
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<id>urn:sha1:337ac9d5218cc19f40fca13fa4deb3c658c4241b</id>
<content type='text'>
The marvell 88ec048's official part number is 88e1318s.  This patch renames
definitions in the driver to reflect this.

In addition, a minor bug fix has been added to write back the MSCR1 register
value properly.

Signed-off-by: Cyril Chemparathy &lt;cyril@ti.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy/marvell: fix 88e1121 support</title>
<updated>2010-10-21T10:59:57Z</updated>
<author>
<name>Arnaud Patard</name>
</author>
<published>2010-10-21T10:59:57Z</published>
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<id>urn:sha1:be8c648051048bc66fbca590d00f3e8543ec32af</id>
<content type='text'>
Commit c477d0447db08068a497e7beb892b2b2a7bff64b added support for RGMII
rx/tx delays except that it ends up clearing rx/tx delays bit for modes
differents that RGMII*ID. Due to this, ethernet is not working anymore
on my guruplug server +. This patch is fixing that.

Signed-off-by: Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net/phy: fix many "defined but unused" warnings</title>
<updated>2010-10-05T07:34:29Z</updated>
<author>
<name>Uwe Kleine-König</name>
</author>
<published>2010-10-03T23:43:32Z</published>
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<id>urn:sha1:cf93c94581bab447a5634c6d737c1cf38c080261</id>
<content type='text'>
MODULE_DEVICE_TABLE only expands to something if it's compiled
for a module.  So when building-in support for the phys, the
mdio_device_id tables are unused.  Marking them with __maybe_unused
fixes the following warnings:

	drivers/net/phy/bcm63xx.c:134: warning: 'bcm63xx_tbl' defined but not used
	drivers/net/phy/broadcom.c:933: warning: 'broadcom_tbl' defined but not used
	drivers/net/phy/cicada.c:162: warning: 'cicada_tbl' defined but not used
	drivers/net/phy/davicom.c:222: warning: 'davicom_tbl' defined but not used
	drivers/net/phy/et1011c.c:114: warning: 'et1011c_tbl' defined but not used
	drivers/net/phy/icplus.c:137: warning: 'icplus_tbl' defined but not used
	drivers/net/phy/lxt.c:226: warning: 'lxt_tbl' defined but not used
	drivers/net/phy/marvell.c:724: warning: 'marvell_tbl' defined but not used
	drivers/net/phy/micrel.c:234: warning: 'micrel_tbl' defined but not used
	drivers/net/phy/national.c:154: warning: 'ns_tbl' defined but not used
	drivers/net/phy/qsemi.c:141: warning: 'qs6612_tbl' defined but not used
	drivers/net/phy/realtek.c:82: warning: 'realtek_tbl' defined but not used
	drivers/net/phy/smsc.c:257: warning: 'smsc_tbl' defined but not used
	drivers/net/phy/ste10Xp.c:135: warning: 'ste10Xp_tbl' defined but not used
	drivers/net/phy/vitesse.c:195: warning: 'vitesse_tbl' defined but not used

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6</title>
<updated>2010-08-04T18:47:58Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2010-08-04T18:47:58Z</published>
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<id>urn:sha1:6ba74014c1ab0e37af7de6f64b4eccbbae3cb9e7</id>
<content type='text'>
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1443 commits)
  phy/marvell: add 88ec048 support
  igb: Program MDICNFG register prior to PHY init
  e1000e: correct MAC-PHY interconnect register offset for 82579
  hso: Add new product ID
  can: Add driver for esd CAN-USB/2 device
  l2tp: fix export of header file for userspace
  can-raw: Fix skb_orphan_try handling
  Revert "net: remove zap_completion_queue"
  net: cleanup inclusion
  phy/marvell: add 88e1121 interface mode support
  u32: negative offset fix
  net: Fix a typo from "dev" to "ndev"
  igb: Use irq_synchronize per vector when using MSI-X
  ixgbevf: fix null pointer dereference due to filter being set for VLAN 0
  e1000e: Fix irq_synchronize in MSI-X case
  e1000e: register pm_qos request on hardware activation
  ip_fragment: fix subtracting PPPOE_SES_HLEN from mtu twice
  net: Add getsockopt support for TCP thin-streams
  cxgb4: update driver version
  cxgb4: add new PCI IDs
  ...

Manually fix up conflicts in:
 - drivers/net/e1000e/netdev.c: due to pm_qos registration
   infrastructure changes
 - drivers/net/phy/marvell.c: conflict between adding 88ec048 support
   and cleaning up the IDs
 - drivers/net/wireless/ipw2x00/ipw2100.c: trivial ipw2100_pm_qos_req
   conflict (registration change vs marking it static)
</content>
</entry>
<entry>
<title>phy/marvell: add 88ec048 support</title>
<updated>2010-08-04T02:36:06Z</updated>
<author>
<name>Cyril Chemparathy</name>
</author>
<published>2010-08-04T02:36:06Z</published>
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<id>urn:sha1:3ff1c25927e3af61c6bf0e4ed959504058ae4565</id>
<content type='text'>
Marvell 88ec048 is a derivative of its 88e1121r device.  From the programmer's
perspective, the one major difference is the addition of an additional control
bit in Page 2 Register 16 - used to control the padding of odd nibble
preambles.

This patch adds support for this new device, while inheriting as much code as
possible from the existing 88e1121r implementation.

Signed-off-by: Cyril Chemparathy &lt;cyril@ti.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy/marvell: add 88e1121 interface mode support</title>
<updated>2010-08-03T05:07:45Z</updated>
<author>
<name>Cyril Chemparathy</name>
</author>
<published>2010-08-02T09:44:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c477d0447db08068a497e7beb892b2b2a7bff64b'/>
<id>urn:sha1:c477d0447db08068a497e7beb892b2b2a7bff64b</id>
<content type='text'>
This patch adds support for RGMII RX/TX delay configuration on marvell 88e1121
and derivatives.  With this patch, PHY_INTERFACE_MODE_RGMII_*ID modes are now
supported on these devices.

Signed-off-by: Cyril Chemparathy &lt;cyril@ti.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net/phy/marvell: Expose IDs and flags in a .h and add dns323 LEDs setup flag</title>
<updated>2010-07-17T02:01:58Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2010-06-21T03:20:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2f495c398edca50ac251c134f1995a2fb3c06cb7'/>
<id>urn:sha1:2f495c398edca50ac251c134f1995a2fb3c06cb7</id>
<content type='text'>
This moves the various known Marvell PHY IDs to include/linux/marvell_phy.h
along with dev_flags definitions for use by the driver.

I then added a flag that changes the PHY init code to setup the LEDs
config to the values needed to operate a dns323 rev C1 NAS.

I moved the existing "resistance" flag to the .h as well, though I've
been unable to find whoever sets this to convert it to use that constant.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Reviewed-by: Wolfram Sang &lt;w.sang@pengutronix.de&gt;
Acked-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Nicolas Pitre &lt;nico@fluxnic.net&gt;
</content>
</entry>
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