kernel.git/drivers/net/ethernet/amd, branch linux-4.13.y

amd-xgbe: fix spelling mistake: "avialable" -> "available"

2017-06-29T19:35:50Z

Trivial fix to spelling mistake in netdev_err message Signed-off-by: Colin Ian King Signed-off-by: David S. Miller

amd-xgbe: Adjust register settings to improve performance

2017-06-29T19:14:19Z

Add support to change some general performance settings and to provide some performance settings based on the device that is probed. This includes: - Setting the maximum read/write outstanding request limit - Reducing the AXI interface burst length size - Selectively setting the Tx and Rx descriptor pre-fetch threshold - Selectively setting additional cache coherency controls Tested and verified on all versions of the hardware. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller

amd-xgbe: Simplify the burst length settings

2017-06-29T19:14:19Z

Currently the driver hardcodes the PBLx8 setting. Remove the need for specifying the PBLx8 setting and automatically calculate based on the specified PBL value. Since the PBLx8 setting applies to both Tx and Rx use the same PBL value for both of them. Also, the driver currently uses a bit field to set the AXI master burst len setting. Change to the full bit field range and set the burst length based on the specified value. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller

amd-xgbe: Prepare for more fine grained cache coherency controls

2017-06-29T19:14:18Z

In prep for setting fine grained read and write DMA cache coherency controls, allow specific values to be used to set the cache coherency registers. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller

amd-xgbe: Add NUMA affinity support for IRQ hints

2017-06-29T19:14:18Z

For IRQ affinity, set the affinity hints for the IRQs to be (initially) on the processors corresponding to the NUMA node of the device. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller

amd-xgbe: Add NUMA affinity support for memory allocations

2017-06-29T19:14:18Z

Add support to perform memory allocations on the node of the device. The original allocation or the ring structure and Tx/Rx queues allocated all of the memory at once and then carved it up for each channel and queue. To best ensure that we get as much memory from the NUMA node as we can, break the channel and ring allocations into individual allocations. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller

amd-xgbe: Re-issue interrupt if interrupt status not cleared

2017-06-29T19:14:18Z

Some of the device interrupts should function as level interrupts. For some hardware configurations this requires setting some control bits so that if the interrupt status has not been cleared the interrupt should be reissued. Additionally, when using MSI or MSI-X interrupts, run the interrupt service routine as a tasklet so that the re-issuance of the interrupt is handled properly. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller

amd-xgbe: Limit the I2C error messages that are output

2017-06-29T19:14:17Z

When I2C communication fails, it tends to always fail. Rather than continuously issue an error message (once per second in most cases), change the message to be issued just once. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller

amd-xgbe: Fixes for working with PHYs that support 2.5GbE

2017-06-29T19:14:17Z

The driver has some missing functionality when operating in the mode that supports 2.5GbE. Fix the driver to fully recognize and support this speed. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller

amd-xgbe: Handle return code from software reset function

2017-06-29T19:14:17Z

Currently the function that performs a software reset of the hardware provides a return code. During driver probe check this return code and exit with an error if the software reset fails. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller