<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/mtd/nand, branch linux-6.18.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.18.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.18.y'/>
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<updated>2026-03-04T12:21:23Z</updated>
<entry>
<title>mtd: rawnand: pl353: Fix software ECC support</title>
<updated>2026-03-04T12:21:23Z</updated>
<author>
<name>Andrea Scian</name>
</author>
<published>2026-02-04T17:41:44Z</published>
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<id>urn:sha1:ead66f2ed16f3e61aea352f0094433ee05cf3e2d</id>
<content type='text'>
[ Upstream commit 89b831ebdaca0df4ca3b226f7e7a1d1db1629060 ]

We need to set also write_page_raw in ecc structure to allow
choosing SW ECC instead of HW one, otherwise write operation fail.

Fixes: 08d8c62164a322 ("mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller")
Signed-off-by: Andrea Scian &lt;andrea.scian@dave.eu&gt;
Cc: stable@kernel.org
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: spinand: Disable continuous read during probe</title>
<updated>2026-03-04T12:21:19Z</updated>
<author>
<name>David LaPorte</name>
</author>
<published>2026-01-30T01:33:22Z</published>
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<id>urn:sha1:bc1492651253e59936eab1858efa9033c8086ed7</id>
<content type='text'>
[ Upstream commit b4af7d194dc879353829f3c56988a68fbba1fbdd ]

Macronix serial NAND devices with continuous read support do not
clear the configuration register on soft reset and lack a hardware
reset pin. When continuous read is interrupted (e.g., during reboot),
the feature remains enabled at the device level.

With continuous read enabled, the OOB area becomes inaccessible and
all reads are instead directed to the main area. As a result, during
partition allocation as part of MTD device registration, the first two
bytes of the main area for the master block are read and indicate that
the block is bad. This process repeats for every subsequent block for
the partition.

All reads and writes that reference the BBT find no good blocks and
fail.

The only paths for recovery from this state are triggering the
continuous read feature by way of raw MTD reads or through a NAND
device power drain.

Disable continuous read explicitly during spinand probe to ensure
quiescent feature state.

Fixes: 631cfdd0520d ("mtd: spi-nand: Add continuous read support")
Cc: stable@vger.kernel.org
Signed-off-by: David LaPorte &lt;dalaport@amazon.com&gt;
Reviewed-by: Gunnar Kudrjavets &lt;gunnarku@amazon.com&gt;
Reviewed-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: cadence: Fix return type of CDMA send-and-wait helper</title>
<updated>2026-02-26T22:59:25Z</updated>
<author>
<name>Alok Tiwari</name>
</author>
<published>2025-12-19T11:09:30Z</published>
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<id>urn:sha1:4d02e3870c88fa8a4fd10d5be2d1d3e765e65419</id>
<content type='text'>
[ Upstream commit 6d8226cbbf124bb5613b532216b74c886a4361b7 ]

cadence_nand_cdma_send_and_wait() propagates negative errno values
from cadence_nand_cdma_send(), returns -ETIMEDOUT on failure and -EIO
when the CDMA engine reports a command failure.

However, it is declared as u32, causing error codes to wrap.
Change the return type to int to correctly propagate errors.

Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Signed-off-by: Alok Tiwari &lt;alok.a.tiwari@oracle.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: renesas: Handle devm_pm_runtime_enable() errors</title>
<updated>2025-12-18T13:03:26Z</updated>
<author>
<name>Haotian Zhang</name>
</author>
<published>2025-11-23T16:35:51Z</published>
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<id>urn:sha1:44309fda9c60d792cdd4da96d35c4af0895dfbe7</id>
<content type='text'>
[ Upstream commit a3623e1ae1ed6be4d49b2ccb9996a9d2b65c1828 ]

devm_pm_runtime_enable() can fail due to memory allocation failures.
The current code ignores its return value and proceeds with
pm_runtime_resume_and_get(), which may operate on incorrectly
initialized runtime PM state.

Check the return value of devm_pm_runtime_enable() and return the
error code if it fails.

Fixes: 6a2277a0ebe7 ("mtd: rawnand: renesas: Use runtime PM instead of the raw clock API")
Signed-off-by: Haotian Zhang &lt;vulab@iscas.ac.cn&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: lpc32xx_slc: fix GPIO descriptor leak on probe error and remove</title>
<updated>2025-12-18T13:02:42Z</updated>
<author>
<name>Haotian Zhang</name>
</author>
<published>2025-10-28T09:47:47Z</published>
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<id>urn:sha1:8f4e27e870960cdc102e3e9ad89517f3c42ab8ae</id>
<content type='text'>
[ Upstream commit cdf44f1add4ec9ee80569d5a43e6e9bba0d74c7a ]

The driver calls gpiod_get_optional() in the probe function but
never calls gpiod_put() in the remove function or in the probe
error path. This leads to a GPIO descriptor resource leak.
The lpc32xx_mlc.c driver in the same directory handles this
correctly by calling gpiod_put() on both paths.

Add gpiod_put() in the remove function and in the probe error path
to fix the resource leak.

Fixes: 6b923db2867c ("mtd: rawnand: lpc32xx_slc: switch to using gpiod API")
Signed-off-by: Haotian Zhang &lt;vulab@iscas.ac.cn&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: nand: relax ECC parameter validation check</title>
<updated>2025-12-18T13:02:42Z</updated>
<author>
<name>Aryan Srivastava</name>
</author>
<published>2025-10-24T00:19:42Z</published>
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<id>urn:sha1:34de3867bdfdf5bee1e9b27efa91a0aab2e5d11e</id>
<content type='text'>
[ Upstream commit 050553c683f21eebd7d1020df9b2ec852e2a9e4e ]

Due to the custom handling and layouts of certain nand controllers this
validity check will always fail for certain layouts. The check
inherently depends on even chunk sizing and this is not always the
case.

Modify the check to only print a warning, instead of failing to
init the attached NAND. This allows various 8 bit and 12 ECC strength
layouts to be used.

Fixes: 68c18dae6888 ("mtd: rawnand: marvell: add missing layouts")
Signed-off-by: Aryan Srivastava &lt;aryan.srivastava@alliedtelesis.co.nz&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Revert "mtd: rawnand: marvell: fix layouts"</title>
<updated>2025-12-18T13:02:42Z</updated>
<author>
<name>Aryan Srivastava</name>
</author>
<published>2025-10-24T00:19:41Z</published>
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<id>urn:sha1:af76d442a543f596fd78a13f7369a20831fa1c76</id>
<content type='text'>
[ Upstream commit fbd72cb463fdea3a0c900dd5d6e813cdebc3a73c ]

This reverts commit e6a30d0c48a1e8a68f1cc413bee65302ab03ddfb.

This change resulted in the 8bit ECC layouts having the incorrect amount
of read/write chunks, the last spare bytes chunk would always be missed.

Fixes: e6a30d0c48a1 ("mtd: rawnand: marvell: fix layouts")
Signed-off-by: Aryan Srivastava &lt;aryan.srivastava@alliedtelesis.co.nz&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: onenand: Pass correct pointer to IRQ handler</title>
<updated>2025-11-03T10:37:57Z</updated>
<author>
<name>Dan Carpenter</name>
</author>
<published>2025-11-01T13:25:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=97315e7c901a1de60e8ca9b11e0e96d0f9253e18'/>
<id>urn:sha1:97315e7c901a1de60e8ca9b11e0e96d0f9253e18</id>
<content type='text'>
This was supposed to pass "onenand" instead of "&amp;onenand" with the
ampersand.  Passing a random stack address which will be gone when the
function ends makes no sense.  However the good thing is that the pointer
is never used, so this doesn't cause a problem at run time.

Fixes: e23abf4b7743 ("mtd: OneNAND: S5PC110: Implement DMA interrupt method")
Signed-off-by: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: spinand: fmsh: remove QE bit for FM25S01A flash</title>
<updated>2025-11-03T10:33:04Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
</author>
<published>2025-11-03T01:01:48Z</published>
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<id>urn:sha1:a1d3bc606bf5c3b3ea811cc2019df6285d75b00f</id>
<content type='text'>
According to datasheet (http://eng.fmsh.com/nvm/FM25S01A_ds_eng.pdf)
there is no QE (Quad Enable) bit for FM25S01A flash, so remove it.

Fixes: 5f284dc15ca86 ("mtd: spinand: add support for FudanMicro FM25S01A")
Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
Tested-by: Tianling Shen &lt;cnsztl@gmail.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: cadence: fix DMA device NULL pointer dereference</title>
<updated>2025-10-23T07:03:13Z</updated>
<author>
<name>Niravkumar L Rabara</name>
</author>
<published>2025-10-23T03:32:01Z</published>
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<id>urn:sha1:5c56bf214af85ca042bf97f8584aab2151035840</id>
<content type='text'>
The DMA device pointer `dma_dev` was being dereferenced before ensuring
that `cdns_ctrl-&gt;dmac` is properly initialized.

Move the assignment of `dma_dev` after successfully acquiring the DMA
channel to ensure the pointer is valid before use.

Fixes: d76d22b5096c ("mtd: rawnand: cadence: use dma_map_resource for sdma address")
Cc: stable@vger.kernel.org
Signed-off-by: Niravkumar L Rabara &lt;niravkumarlaxmidas.rabara@altera.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
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