<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/mtd/nand, branch linux-2.6.13.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.13.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.13.y'/>
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<updated>2005-07-16T07:27:52Z</updated>
<entry>
<title>[MTD] NAND: Fix broken bad block scan for 16 bit devices</title>
<updated>2005-07-16T07:27:52Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2005-07-15T13:53:51Z</published>
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<id>urn:sha1:19870da7ea2fc483bf73a189046a430fd9b01391</id>
<content type='text'>
The previous change to read a single byte from oob breaks the
bad block scan on 16 bit devices, when the byte is on an odd
address. Read the complete oob for now.
Remove the unused arguments from check_short_pattern()
Move the wait for ready function so it is only executed when
consecutive reads happen.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND s3c2410: Add missing NULL pointer check</title>
<updated>2005-07-06T20:26:05Z</updated>
<author>
<name>Ben Dooks</name>
</author>
<published>2005-07-06T20:05:10Z</published>
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<id>urn:sha1:fb8d82a865b1ff601fad8293cd6a2a1b1908545b</id>
<content type='text'>
Fix OOPs if there was no platform set information passed

Signed-off-by: Ben Dooks &lt;ben@simtec.co.uk&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND: Remove unmaintained tx49xx board drivers</title>
<updated>2005-07-06T09:40:12Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2005-07-06T09:40:12Z</published>
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<id>urn:sha1:ba9fb37ba07219fa251edbab1a50fdc7b33da5fa</id>
<content type='text'>
The drivers are unmaintained since long and reference include files
which are not available in the kernel. Original author is not longer
responsible and no new maintainer showed up within 3 month.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND: sharpsl.c set correct file permissions</title>
<updated>2005-07-06T09:28:27Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2005-07-06T09:28:27Z</published>
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<id>urn:sha1:0c80336e5e81846fcb028d5a677794f08201fa1c</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND: Add ST chip IDs. </title>
<updated>2005-06-29T12:36:53Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2005-06-23T09:38:54Z</published>
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<id>urn:sha1:bd7bcf52dabba9c391142fd515221fcb87b7c712</id>
<content type='text'>
From: Domenico DI TULLIO &lt;domenico.di-tullio@st.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND: s3c24xx updates</title>
<updated>2005-06-29T12:30:47Z</updated>
<author>
<name>Ben Dooks</name>
</author>
<published>2005-06-20T11:48:25Z</published>
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<id>urn:sha1:a4f957f16d41b9ff944dddd84c4892496a129f68</id>
<content type='text'>
Fix error in timing generation, Tacls is only in the range 0..3

Add proper support for the s3c2440 NAND controller, which has now
been tested on several s3c2440 implementations.

Signed-off-by: Ben Dooks &lt;ben@simtec.co.uk&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND: Change exports to _GPL</title>
<updated>2005-06-29T12:27:41Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2005-06-17T15:02:09Z</published>
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<id>urn:sha1:d7e78d4f2173298c34e88f496c3acea247feec61</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND: Fix broken bad block table scan</title>
<updated>2005-06-29T12:24:41Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2005-06-14T15:39:57Z</published>
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<id>urn:sha1:c9e0536523f5191395d62f6c84d007e6ffd38d33</id>
<content type='text'>
Make the bad block table search functional again

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND: Reorganize chip locking</title>
<updated>2005-06-29T12:15:17Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2005-05-31T19:39:20Z</published>
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<id>urn:sha1:0dfc62465ef92c7ddcb1ba223bf062453566fd0f</id>
<content type='text'>
The code was wrong in several aspects. The locking order was
inconsistent, the device aquire code did not reset a variable
after a wakeup and the wakeup handling was not working for
applications where multiple chips are sharing a single
hardware controller.
When a hardware controller is available the locking is now
reduced to the hardware controller lock and the waitqueue is
moved to the hardware controller structure in order to avoid
a wake_up_all().

The problem was pointed out by Ben Dooks, who also found the
missing variable reset as main cause for his deadlock problem.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MTD] NAND: Add Hynix to manufacturer list</title>
<updated>2005-05-27T08:40:27Z</updated>
<author>
<name>Nicolas S. Dade</name>
</author>
<published>2005-05-24T08:46:34Z</published>
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<id>urn:sha1:f1f67a9874f1a4bba1adff6d694aa52e5f52ff1a</id>
<content type='text'>
Signed-off-by: Nicolas S. Dade &lt;daden@symbol.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
</feed>
